To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F7 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F4 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F3 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F2 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.
Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the L4 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the L0 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F1 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F0 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adding i2c slave requires overlay with node definitions and
proper aliases depending on driver implementation.
Modified i2c_slave_api test to use information from dts.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Added basic PSoC6 UART driver and added two UART nodes in the PSoC6
device tree to have output from CM0+ and CM4 cores.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
Enable UART 16550 driver for Nios-II QEMU platform.
Note: This PR is tested with patched version Qemu 3.0.0 which
adds support for altera_10m50_zephyr machine type.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
'use-prop-name' is not documented.
Update dts/bindings/device_node.yaml.template to fix this.
Document that 'type' attribute is not used.
Fixes#9971
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash controller-node for stm32f2 based SoCs was missing basic
properties such as compatible, labeln reg and interrupts.
Fix this and add matching yaml binding file;
Fixes#10057
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When we fixed the missing reg property in the cpu node, we forgot to
add #address-cells & #size-cells for the node.
This fix the following warnings we get:
Warning (reg_format): "reg" property in /cpus/cpu@0 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This change aims at fixing 'unit_address_vs_reg' warning in
stm32 *-pinctrl.dtsi files.
This warning pops up when a node name is made up with an address
(node_name@xx) but does not contain a reg property.
This case was encountered for led nodes for instance,
where a reg property has no meaning.
Fix this by changing node_name@xx to node_name_xx which removes the
guilty '@xx' syntax but preserves node_name uniqueness.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /soc/virtualcom@0:
node has a unit name, but no reg property
Fix by dropping the unit address from the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /flash: node has a reg or ranges
property, but no unit name
or
Warning (unit_address_vs_reg): /memory: node has a reg or ranges
property, but no unit name
Fix by adding unit address that is missing to flash & memory nodes.
Additionally the Silabs memory nodes didn't have a compatiable or
device_type, so add those properties as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/cpu@0: node has a
unit name, but no reg property
Fix by adding reg property to missing cpu nodes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/arcv2-intc@0:
node has a unit name, but no reg property
Fix by removing the unit address from the nodes. Some cases we had a
reg property and a unit address for such interrupt controllers, in those
cases remove both the reg & unit address in the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_format): /soc/uart@000003f8:
unit name should not have leading 0s
Fix these by remove the leading 0s.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_NRF51822_QFAA
CONFIG_SOC_NRF51822_QFAB
CONFIG_SOC_NRF51822_QFAC
CONFIG_SOC_NRF52810_QFAA
CONFIG_SOC_NRF52832_QFAA
CONFIG_SOC_NRF52832_CIAA
CONFIG_SOC_NRF52832_QFAB
CONFIG_SOC_NRF52840_QIAA
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_PART_NUMBER_SAME70*
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere. We also have DT_SIZE_M, so use that in a few
places as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The RTC node for some reason was setting #address-cells and #size-cells.
However it has no children so there isn't really any reason to do this.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In case of out of tree SoC, mem.h will trigger and error since
it is not aware of new SoC CONFIG_SOC_<reference>.
Modify error condition in order to generate the error only if
the flash and error size are not defined at this point (even in
out of tree case).
Fixes#9978
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_PART_NUMBER_EFM32WG990F256
CONFIG_SOC_PART_NUMBER_EFR32FG1P133F256GM48
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_CC3220SF
CONFIG_SOC_MSP432P401R
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add 'generation: define' directive to 'compatible' property.
When existing for a type of device, move compatible property
description in device base structure (eg: i2c.yaml)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
All flash controllers have a mandatory compatible property.
Add it to the generic binding that is included by all.
Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
UART pins (TX, RX, RTS, CTS) are now configured in DTS files.
RTS and CTS definitions are optional. If flow control is enabled
and RTS/CTS pins are not defined, then compiler will issue
an error message.
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
The LEDs, buttons and necessary aliases are now configured via dts.
This commit breaks the sample under samples/boards/nrf52/power_mgr.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
According to Device Tree specification, previously
defined nodes may be deleted with the followin
syntax:
/delete-node/ node-name;
or
/delete-node/ &label;
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This change adds DTS definition of SPI device for nRF chips.
It also removes SPI pin configuration from Kconfig and moves it to
chip DTS.
Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
This commit adds ADC nodes to DTS files for nRF SoCs and introduces
corresponding bindings for these nodes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The whole STM32L4 family has a flash with a constant page size of 2kB.
Specify this value in the DTS as the nvs sample application pull it
from there.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The nvs sample assumed a 1 KB flash erase block size, which caused the
sample to fail on frdm_k64f because its erase block size is 4 KB. Get
the erase block size from dts instead.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add support for TI LP5562 I2C 4-channel LED driver.
Supported blinking period: 1ms - 1000ms
Supported brightness value: 0% - 100%
This driver supports the entire currently available API.
Signed-off-by: Johannes Hutter <johannes@proglove.de>
Add support for usbotg_fs, by adding the DT fixup, pinmux macros,
and the DT entries in stm32f2.dtsi.
Signed-off-by: Istvan Bisz <istvan.bisz@t-online.hu>
The L433 chip is a superset of the L432, just grabbing a few additional
interfaces (LCD, I2C2, USART3, SPI2, SDMMC). All the support/HAL files
are already there, so enabling these is just a matter of build system
setup.
Tested on an application specific board (builds correctly and I2C2
works.) I unfortunately don't have a nucleo/discovery board to create a
reference board for.
Signed-off-by: David Lamparter <equinox@diac24.net>
This patch adds the RDC (Resource Domain Controller) peripheral
permissions settings for the i.MX applications cores (Cortex A9 on
i.MX6 and Cortex A7 on i.MX7).
This will enable both Linux (on application's core) and Zephyr (on M4
core) to share the peripherals and coexist.
The settings are defined at devicetree level and applied in the soc.c.
A complete solution should involve the SEMA4 to control the peripherals
access and prevent resource deadlocking and misusage.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
The WNC-M14A2A (LTE / LTE-M) modem is presented as an Arduino-
compatible shield via AT&T's IoT Starter Kit v1.0. It was
originally intended to work with the FRDM-K64F board, but
in theory as long as the right pins are configured it can
work with any board that supports Arduino-compatible headers.
The driver utilizes the CONFIG_NET_OFFLOAD setting to avoid the
normal handling of IP packets, and instead uses a socket-like
UART interface to handle incoming and outgoing data.
Signed-off-by: Michael Scott <mike@foundries.io>
Only basic features supported initially but more could be added from:
https://www.nxp.com/docs/en/data-sheet/MMA8451Q.pdffixes#9006
A sample app will be provided in a separate PR.
Signed-off-by: Lars Knudsen <larsgk@gmail.com>
The STM32F7 uses the V2 version of the STM32 I2C controller. Add the
corresponding Kconfig, DTS, DTS fixup and pinmux entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit adds support for the nrf52840_pca10059 board.
The flash partitions are configured to allow migrating from
the stock bootloader to MCUBoot.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
This adds the SoC configuration for Apollo Lake. This is based
on the Atom configuration.
Origin: Original
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
After running some tests which enable assert macro I found some issues
with the i.MX UART configuration.
This patch configures the Tx Fifo Watermark and Modem Mode accordingly.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
The common spi.yaml defines an optional clocks property that can be
overridden by specific spi driver bindings to be required. The
description and generation attributes are duplicated.
This fixes build warnings:
extract_dts_includes.py: Merge of 'description': 'Clock gate control
information' overwrites 'Clock gate information'.
extract_dts_includes.py: Merge of 'generation': 'structures' overwrites
'define'.
And introduces a different build warning, which is intended behavior:
extract_dts_includes.py: Merge of 'category': 'required' overwrites
'optional'.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The common uart.yaml defines an optional clocks property that can be
overridden by specific serial driver bindings to be required. The
description and generation attributes are duplicated.
This fixes build warnings:
extract_dts_includes.py: Merge of 'description': 'Clock gate control
information' overwrites 'Clock gate information'.
extract_dts_includes.py: Merge of 'generation': 'structures' overwrites
'define'.
And introduces a different build warning, which is intended behavior:
extract_dts_includes.py: Merge of 'category': 'required' overwrites
'optional'.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds support for the Analog Devices ADT7420 High-Accuracy
16-bit Digital I2C Temperature Sensors. Optionally sensor threshold
events are supported.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
The STM32F7 uses the same USB OTG FS controller than the STM32F4 series.
It is therefore trivial to add support for it, by adding the DT fixup
and pinmux macros, and the DT entries in stm32f7.dtsi. Keep it disabled,
it should be enabled at the board level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
samd21.dtsi includes now the same content need for SAMD20,
move it to samd.dtsi and include it from samd21.dtsi.
Then later USB support can be added to the samd21.dtsi seperatly
from the samd20 etc.
Signed-off-by: Sean Nyekjaer <sean@nyekjaer.dk>
The EFR32 Flex Gecko Wireless Starter Kit contains sensors and
peripherals demonstarting the usage of the EFR32FG1P SoC
family. This patch add basic support for this board.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Since the UART0 @ 0x40002000 can either be UART or UARTE the user of the
soc.dtsi needs to select either compatible = "nordic,nrf-uarte" or
"nordic,nrf-uart"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The STM32F769 has more interrupts and features than the STM32F746,
but the basic support is similar with STM32F746
Signed-off-by: Yong Jin <jinyong.iot@foxmail.com>
The nvic yaml files were missing an id property. So we'd get a warning
like:
extract_dts_includes.py: 'id' property missing in 'ARMv7-M NVIC Interrupt Controller' binding. Using '<unknown id>
Add the id to fix this warning.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
clear RXNE flag in fifo_read, remove TEACK and REACK
check when uart_stm32_init because stm32f2 doesn't
has those flags.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
The STM32F723 has more interrupts than the STM32F746 due to the
additional SDMMC controller. Besides that the changes are very
similar to the ones of the STM32F746.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add support for NXP PCA9633 an I2C 4-bit LED driver.
Supported blinkink period: 41ms to 10667ms
Supported brightness value: 0 to 100%
This driver supports the following APIs:
1. led_blink
2. led_set_brightness
3. led_on
4. led_off
Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
This patch includes:
STM32F7 family device tree file with basic and UART definitions.
STM32F746 subfamily device tree file.
Memory definitions for STM32F746xG subfamily.
Signed-off-by: Yurii Hamann <yurii@hamann.site>
STM32F412/413/446/469 SoCs have 6 bidirectional endpoints
according to the reference manuals RM0402, RM0430,
RM0390 and RM0386.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This commit moves the definitions for the LED and Buttons
supported in nrf52810_pca10040 DK in DTS from board.h. Aliases
are kept in board.h to make basic examples pass.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The nRF52810 is a low-cost variant of the nRF52832, with a reduced set
of peripherals and memory. This commit adds basic support for it in the
arch SoC and dts folders.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Ioannis Glaropoulos <ioannis.glaropoulos@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
The i.MX 6SoloX SoC is a hybrid multi-core processor composed by one
Cortex A9 core and one Cortex M4 core.
Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A9 core (running Linux) via RPMsg.
The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README
The A9 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A9 can perform these steps at bootloader level after the Linux
system has booted.
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
The various STM32 reference manuals sometimes define the USB endpoints
as IN or OUT only and sometimes as bidirectional, even in the same
manual. This is likely because the OTG implementation has one set of
registers for the IN endpoints and one other set for OUT endpoints.
However at the end a given endpoint address can both transmit and
receive data.
This causes some confusion how to declare the endpoints in the device
tree, and depending on the SoC, they are either the same number of IN
and OUT endpoints declared, or they are declared as bidirectional. At
the end it doesn't really matter given how the driver uses those values:
#define NUM_IN_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
CONFIG_USB_NUM_IN_ENDPOINTS)
#define NUM_OUT_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
CONFIG_USB_NUM_OUT_ENDPOINTS)
#define NUM_BIDIR_EP NUM_OUT_EP
This patch therefore cleanup the driver, the DTS, and the DTS fixups to
only define the number of bidirectional endpoints.
In addition to the cleanup, that fixes a regression introduced by commit
52eacf16a2 ("driver: usb: add check for endpoint capabilities"), which
introduced a wrong check for SoC only defining the number of
bidirectional endpoints.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
This commit splits the common interrupt into rx and tx parts because
only STM32F0 series has a common interrupt.
Moved clock source definition to device-tree.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
The prepended 0x causes DTC warnings and shouldn't be there.
Tested by compiling hello_world for nrf52840_pca10056 before and after.
Fixes#8334.
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
This adds basic support for declaring gpio nodes in dts for nrf52.
The dts.fixup provides mapping for the generated defines to the config
defines currently used by the nrf gpio driver.
Existing boards that use nrf52 are updated.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
This commit moves the bit timing (PROP, BS1, BS2 segments and SWJ)
from Kconfig to the device-tree and fixes issue #7933
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
ARC only supports only 2 priority levels so make sure
the IRQ priority is not greather than 1.
The test was passing in previous build because the ASSERT was
not enabled.
Fixes Issue #8099
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
"clocks" property is defined in st,stm32-u(s)art.yaml
files while aslo defined in uart.yaml.
Remove redundant information.
Fixes#7974
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable supporting UART4 on STM32F107 and STM32F103Xe SoCs.
Modified stm32f1/dts.fixup for replacing USART with UART.
Signed-off-by: Jun Li <jun.r.li@intel.com>
LPUART (Low-power UART) peripheral is just like ordinary U(S)ART
which lives in a separate clock/power domain.
Therefore already existing code could be reused as is
almost entirely.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Correctly process multiple include files given to the
!include command of the YAML loader.
The fix only targets the sequential definition of include files.
Fixes#7067
Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
The STM32L432 SoC has a standard non-OTG USB controller. Add an entry
for it in stm32l432.dtsi and add the corresponding DTS fixup entries.
The controller is kept disabled and should be enabled at the board
level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
USB OTG is currently enable for the whole STM32L4 family, while only a
few of them actually support it:
- STM32L475, STM32L476 and STM32L496 have an OTG controller
- STM32L432, STM32L433 and STM32L452 have an USB controller
- STM32L431, STM32L451 and STM32L471 do not have any USB controller
Fix that by moving the DT entry from stm32l4.dtsi to stm32l475.dtsi
and by adding a #ifdef #endif around the corresponding DTS fixup
entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
QMSI bindings were created prior to this base, and unfortunately not
updated to latest changes on last rebase.
Fixes#7694
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
The LSM6DSL accel/gyro sensor can be accessed through
SPI bus. So the required configuration can be passed through
dts file.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Get the name generated through dts as well.
Fix the rtc driver and relevant SoCs accordingly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.
Irq priority is not set by dts for D2000 as it's irq controller does
not support it.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Zephyr exposes the ability to set IRQ priority on IOAPIC.
To keep compatibility with Linux, let's add the priority at the end
after sense. So imported dtsi with interrupt-cells set to 2 will work as
usual.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add driver for MCUX mailbox which can be used for lpcxpresso54114
and other lpc and kinetis socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add soc configuration support and dts files for nxp_lpc54xxx_m0.
Adjusted nxp_lpc54xxx soc, configuration and dts files for the
presence of slave core.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds dts bindings for the kinetis watchdog peripheral, and updates the
watchdog nodes for the k64 and kw2xd socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds some DTS information to flesh out the NXP Kinetis
based RTC blocks. DTS fixups were added as well to match up the driver
usage to the DTS output.
Signed-off-by: Andy Gross <agross@kernel.org>
Add use-prop-name to disconnect-gpios property in st,stm32-usb
yaml, in order to generate friendly name for the definitions.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Rename various SoC related defines and files from just being LPC54114
to LPC54114_M4. This is in prep for supporting a build for the second
core on the LPC54114 (the Cortex-M0+).
* Renamed Kconfig SOC_LPC54114 to SOC_LPC54114_M4
* Renamed Kconfig.defconfig.lpc54114 to Kconfig.defconfig.lpc54114_m4
* Introduced nxp_lpc54xxx_m4.dtsi based on nxp_lpc54xxx.dtsi
* Moved some pinmux related defines into SoC code.
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Define reset-gpio and irq-gpio in zephyr,bt-hci-spi yaml, to
generate GPIO definitions for control pins of Bluetooth HCI
SPI module.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
* add gpio, i2c, spi definitions
* optimize and bug fix the dts.fixup
* optimize and bug fix the em_starterkit related definitions
in dts folder
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
- Changed define for SETTINGS_CONFIG_PAGE_SIZE from a hard coded value
to reference build system generated FLASH_ERASE_BLOCK_SIZE. This value
comes from 'erase-block-size' found in the dtsi file of devices.
- Modified nrf52840.dtsi to include definition for 'erase-block-size'
Fixes#7107
Signed-off-by: David Leach <david.leach@nxp.com>
Commit introduces support for watchdog configuration for Nordic
Semiconductor nRF SoCs in device tree.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Adds dts bindings for the mcr20a wireless transceiver. The frdm_k64f
board supports the mcr20a via an Arduino shield, therefore the dts node
is added to the board dts. The kw2xd is a SiP and thus the mcr20a dts
node is added to the soc dts.
The networking samples using prj_frdm_k64f_mcr20a.conf have been broken
since the refactoring of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts spi bindings for the kinetis dspi controller, and updates the
k64, kw2xd, kw40z, kw41z dts nodes accordingly.
Updates the dts interrupt priorities to match the board defconfigs
(e.g., boards/arm/frdm_k64f/Kconfig.defconfig)
For k64, fixes an error in the spi1 interrupt number and adds a third
instance (spi2).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts bindings for the fxas21002 interrupt pins to all boards that
have this sensor.
The fxas21002 driver is currently only aware of one sensor interrupt
pin, therefore the routing of INT1 or INT2 to the driver is handled in
each board's dts.fixup.
The fxas21002 sample application has been broken since the refactoring
of the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts bindings for the fxos8700 interrupt pins to all boards that
have this sensor. The frdm_k64f and hexiwear_k64 connect both sensor
interrupt pins to the mcu, but the frdm_kw41z connects only one.
The fxos8700 driver is currently only aware of one sensor interrupt pin,
therefore the routing of INT1 or INT2 to the driver is handled in each
board's dts.fixup.
The fxos8700 sample application has been broken since the refactoring of
the mcux gpio driver to dts in commit
4e8f29f319. The sample is now fixed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add a set of Kconfig symbols that allow us to set that the GPIO
driver/SoC support DTS (HAS_DTS_GPIO) and that drivers that need/use
GPIO support DTS as well (HAS_DTS_GPIO_DEVICE).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to generate GPIO definition for control pin of BlueNRG module
define reset-gpio and irq-gpio in st,spbtle-rf yaml binding.
Add HAS_DTS_SPI_PINS kconfig symbol to control use of the '#define'
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that we can generate gpio info from dts lets add optional support
fot the cs-gpios property in the bus controller node. This matches the
binding spec from Linux on how cs-gpios are handled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
'cell_string' yaml attribute has been introduced in order to
help enforcement of specific string during defines generation.
This adds complexity in understanding script behavior as a black
box and create additional dependency which is not strictly required.
For node specific generation functions (pinctrl and interrupts),
this could be replaced directly by an hardcoded version
(as everyone used the same 'cell_string' anyway).
For extract_cells functions, string could be replaced by extracted
property name. As a consequence, we're now able to generate defines
for properties refering to these controllers via phandle.
For instance, in following node
spbtle-rf@0 {
compatible = "st,spbtle-rf";
reg = <0>;
reset-gpios = <&gpioa 8 0>;
};
We'll be able to generate:
#define ST_STM32_SPI_...LE_RF_0_RESET_GPIOS_CONTROLLER "GPIOA"
#define ST_STM32_SPI_...PBTLE_RF_0_RESET_GPIOS_FLAGS_0 0
#define ST_STM32_SPI_..._SPBTLE_RF_0_RESET_GPIOS_PIN_0 8
Only impact for this whole change is for NXP clocks which were the
only ones using 'cell_string' attribute with a value different than
the default one.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Adds flexspi and semc memory controllers to the i.MX RT SoC. Adds
hyperflash, qspi, and sdram external memories to the mimxrt1050_evk
board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Previously, when !CONFI_XIP, BOOTLOADER_SRAM_SIZE was defaulted
to 16 (K), reducing the size of SRAM available for the program.
Also, though it has no effect, the value for SRAM start in the
dtsi file was incorrect.
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
To prepare to upcoming dtc v1.4.6, fix warnings in dts files.
This commit addresses the following warning:
Warning (unit_address_vs_reg): Node /soc/pin-controller has a reg
or ranges property, but no unit name
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To prepare to upcoming dtc v1.4.6, fix warnings in dts files.
This commit addresses the following warning:
Warning (clocks_property): Missing property '#clock-cells' in node
/soc/rcc@40021000 or bad phandle (referred from
/soc/pin-controller/gpio@40011800:clocks[0])
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Adds gpio labels to all kinetis socs in preparation for refactoring the
mcux gpio driver to dts. The kl25z was missing gpio nodes altogether, so
they are added.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Create a dt-bindings/gpio.h file.
Bindings definitions are extracted from existing gpio.h.
gpio dt-bindings file is required because existing gpio.h file could
not be parsed by dts parser.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual
Cortex A7 core and Single Cortex M4 core.
Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A7 core (running Linux) via RPmsg.
The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README
The A7 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A7 can perform these steps at bootloader level after the Linux
system has booted.
The M4 can use up to 5 different RAMs. These are the memory mapping for
A7 and M4:
+---------------+-----------------+---------------------------+
| Memory Name | Start Address | Size |
+===============+=================+===========================+
| TCML | 0x007F8000 | 32KB |
+---------------+-----------------+---------------------------+
| TCMU | 0x20000000 | 32KB |
+---------------+-----------------+---------------------------+
| OCRAM_S | 0x20180000 | 32KB |
+---------------+-----------------+---------------------------+
| OCRAM | 0x00900000 | 128KB |
+---------------+-----------------+---------------------------+
| DDR | 0x10000000 | 256MB |
+---------------+-----------------+---------------------------+
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Adds a shim layer around the imx uart driver to adapt it to the Zephyr
serial interface.
Modem mode was introduce to control it as DCE and DTE and can be
configured in the device tree:
modem-mode:
type: int
category: required
description: Set the UART Port to modem mode 0 (dce) 1 (dte)
generation: define
For now only the UART 2 was tested.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Add initial device tree support for the em{7,9,11}d SoC and associated
em_starterkit boards. The device tree at this point specifies cpu core,
memory, interrupt controller, uart's and i2c controllers.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will generate the necessary configuration for the i2c controller
on quark_d2000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Applying the change to relevant arch/boards, either in their Kconfig or
the dts specific files.
Taking the opportunity in dw driver to rename the variable the same way
as they are everywhere else in the code (s/dev/dw and s/port/dev) in
init function.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the i2c controller on
quark_x1000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000_ss.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
With upcoming ICs that are not in the nRF5x family, rename the flash
driver and all its dependencies from nrf5 to nrf.
Should also fix the issue introduced by f49150cab6 which broke the
assignment of the flash device due to a partial rename.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Adds a driver for SX1509B I2C GPIO chip. This driver only supports the
basic GPIO features and does not currently implement the LED driver and
keypad matrix features.
Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
Add initial support for STM32L073xZ SOC which is not very different
from already supported STM32L072xZ.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Since not all boards enable all devices, we typically have the SoC dtsi
file have a device marked with status = "disabled" and have the
board.dts explicitly enable with status = "ok". Update it so USB on
Atmel SAMD21 work this way.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added device tree support to the ARM SBCon I2C controller. We utilize
the compatiable "arm,versatile-i2c" the binding from Linux for the some
peripheral block.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch the SoC device tree to define a single entry per SERCOM instead
of one per mode.
Define a Device Tree binding for the SAM0 SPI and use it instead of
Kconfig for enabling / disabaling instances
Switch the Arduino Zero, Adafruit Feather M0 Basic Proto, and
Trinket M0 to use the new defintion.
Add the APA102 LED that's on the Trinket as a test.
Signed-off-by: Michael Hope <mlhx@google.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Implements interrupt driven UART for the serial driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Justin Watson <jwatson5@gmail.com>
The spi nodes should have #address-cells and #size-cells properties much
like i2c does. Add these missing properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Most STM32F429 SoCs have 6 SPIs, but STM32F429Vx SoCs only have
4 SPIs. This is one of the rare conditions where device-tree
directive /delete-node/ should be used.
Add spi5 and spi6 node to stm32f429.dtsi. Create file
stm32f429vX.dtsi to delete those nodes and document usage of
/delete-node/ directive.
Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
Some stm32f4 SoCs don't support spi2, so remove spi2
device-tree node from stm32f4.dtsi file.
Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
stm32f405 is not an expansion of stm32f411, since stm32f411 has more
SPIs than stm32f405.
Fix this by including stm32f401.dtsi in stm32f405.dtsi
(instead of stm32f411.dtsi).
Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
The APA102 is a RGB LED with integrated controller. LEDs can be
daisy-chained and use SPI for communication. The SPI port is
configured via Device Tree.
Tested on the Adafruit Trinket M0.
Signed-off-by: Michael Hope <mlhx@google.com>
Configure ccm size and address via dts. According to the DT
specification, the unit-address of a node must match the
first address specified in the reg property of the node.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
stm32f334 is not an expansion of stm32f303, since
stm32f303 has more I2C, SPI ports than stm32f303.
Fix this by including stm32f3.dtsi in stm32f334.dtsi.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
When the Kconfig BOOTLOADER_MCUBOOT is selected, an overlay to place the
image at the slot0 location is required. In order to avoid having to do
this manually for all samples when targetting MCUboot, include the logic
inside the dts.cmake script to prepend a new common.dts file that then
conditionally includes mcuboot.overlay.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This commit updates the title and the description of the
ARMv6-M, ARMv7-M NVIC dts bindings, so that both the title
and the description reference the respective ARM architecture
and not the Cortex M cores.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This PR includes the required changes in order to support
conditional compilation for Armv8-M architecture. Two
variants of the Armv8-M architecture are defined:
- the Armv8-M Baseline (backwards compatible with ARMv6-M),
- the Armv8-M Mainline (backwards compatible with ARMv7-M).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Added a label for soc-nv-flash nodes. Made some updates to the
generation to maintain creating defines for properties like
erase-block-size and write-block-size so they we get both
FLASH_ERASE_BLOCK_SIZE and FLASH_${LABEL}_ERASE_BLOCK_SIZE (same for
WRITE_BLOCK_SIZE).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for AMS CCS811 Digital Gas Sensor for monitoring
indoor air quality. This sensor reports the following parameters:
1. Co2 concentration
2. VOC concentration
3. Sensor voltage
4. Sensor current
This driver only supports polling mode as of now.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This patch changes the manner in which we collect DTS overlay files so
that they comply with the same approach taken for configuration fragment
files (.conf).
Additionally it also documents the usage of those files in the
Application Developer Guide.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Pin multiplexing is a function of the PORT peripheral. This change
defines a separate pinmux device at the same address as the PORTs
themselves.
Signed-off-by: Michael Hope <mlhx@google.com>
Adds a new optional dts property to define the erase block size of a
flash device. This will be used by the mcux flash driver to implement
the flash page layout function.
The value is set for all kinetis devices to match
FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts yaml bindings for the max30101 sensor to allow the sensor
driver name, i2c driver name, and i2c address to be extracted from dts
instead of kconfig.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts yaml bindings for the fxas21002 sensor to allow the sensor
driver name, i2c driver name, and i2c address to be extracted from dts
instead of kconfig.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts yaml bindings for the fxos8700 sensor to allow the sensor
driver name, i2c driver name, and i2c address to be extracted from dts
instead of kconfig.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add device tree support for the "nxp,kinetis-ftfa" flash controller used
on the NXP KL2X and KW4xZ SoCs.
Fixes: #5788
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert NXP k6x and kw2xd flash driver to use device tree to get the
flash controller name from device tree. We introduce yaml bindings for
the "nxp,kinetis-ftfe" and "nxp,kinetis-ftfl" devices.
Fixes: #5788
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On the various NXP Kinetis SoCs add the write-block-size property and
set it to match FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE for the
given SoC.
Fixes: #5788
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert Atmel SAM0 flash driver to use device tree to get the flash
controller name and base address.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We allow the application to have its own dts.fixup. The main use for
this right now is for the build all test to define dummy values for
defines we expect to be generated.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce flash controller nodes for STM32 SoCs that are supported in
the flash driver. This is a precusor to converting the flash driver on
stm32 over to using device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We duplicate a lot of fixup info per board which could be done at the
SoC family level. So introduce the concept of DTS_SOC_FIXUP_FILE which
we default to arch/<ARCH>/soc/<SOC_FAMILY>/<SOC_SERIES>/dts.fixup.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
So far, DT did not support the flash driver name.
Any flash-controller should have the appropriate
flash driver that should be identified by its name.
This path adds generic support for extract the description
from the flash-controller node,
adds implementation of this property for all nrf5x targets.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Where missing add compatible = "soc-nv-flash". Also added a label for
all the soc-nv-flash that we might use in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add usart-yaml in dts.
Build fsl_lpc_usart and fsl_lpc_flexcomm in
ext/hal/nxp/mcux/drivers/Makefile.
Only polling mode is implemented in usart now. Interrupt can be added in
future.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Provide dts yaml bindings for bluetooth modules
used by 96b_carbon and disco_l475_iot1 boards.
Devices are denoted as spi-devices and inherit from
spi-device.yaml
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This commits adds the "least common denominator" in the
stm32fX.dtsi files and fills the additional SPI nodes
in stm32fXYZ.dtsi files, only for the SOCs where boards
use the additional SPI peripheral.
We could add the rest SPI nodes in the stm32fXYZ.dtsi
files when we add SPI support to other boards.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The SAM0 has a 64 byte page (the programing unit) with 4 pages to a
row (the erase unit). This driver implements a read/modify/write to
emulate the byte level writes used by NFFS.
Signed-off-by: Michael Hope <mlhx@google.com>
Instead of accessing the environment variable ZEPHYR_BASE every time we
require accessing the source code root, use an intermediate variable
that has OS path separators correctly set to '/' to avoid issues on
Windows.
Note: This removes the ZEPHYR_SOURCE_DIR CMake variable. External
applications using that will need to change to use the new ZEPHYR_BASE
variable.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This was validated on the cc3220sf_launchxl board
using the Zephyr thermometer sample program
adapted to call the i2c driver directly, and fetching
samples from the on-board TMP006 temperature sensor.
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Any node which needs to generate defines from DTS must have a
"compatible" property, because the corresponding "constraint" is what
extract_dts_includes.py uses to match nodes with YAML files.
There are a few YAML files in the tree that list compatible as
"optional". Fix them.
Signed-off-by: Marti Bolivar <marti@opensourcefoundries.com>
Provide dts yaml bindings for 4 sensors supported by disco_l475_iot1
board:
-hts221, lis3mdl, lps22hb and lsm6dsl
Devices are denoted as i2c-devices and, as such, inherits from
i2c-device.yaml
Signed-Off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide generic yaml description for i2c-devices such as sensors
New yaml binding category 'parent/child' is added.
It aims at binding two types of related node such as bus master and
bus slave.
In case of i2c-device object, parent property is 'bus' with value 'i2c'.
In the mean time, i2c node gets child property bus. Master and slave bus
values should match.
As such, 'i2c' node is bus master and 'i2c-devices' nodes are bus slaves
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
According to yaml syntaxic rules, 'properties' described in dts
bindings yaml files could be seen as 'mapping'(key/value couple),
instead of 'series' (list of single elements).
yaml 'mappings' will then be converted by yaml python library as
python 'dict' which will ease treatment (instead of current list
as were before this commit).
Same treatment is applied to 'inherits'.
script extract_dts_inlcude is updated to take change of yaml_list
structre into account. This allows some code simplification. Largest
impact is yaml_collapse function which works now allow complete
overload method on all the attributes of a yaml nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As flash address changes between different boards of same Soc,
it is derived from .dts file instead of hard coding in .dtsi.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Add configuration, pinmux, dts and documentation for the STM32L476G
Discovery board based on the STM32L476VG SoC.
Signed-off-by: Arthur SFEZ <arthur.sfez@gmail.com>
patch removes the mem.h and marcos used in that file are
moved appropriate board files. As there are boards with
different flash configuration but of same soc, flash and
ram size are moved to dts file instead of dtsi
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Adds the mimxrt1052 SoC, which belongs to a new family (nxp_imx) and
series (rt) of SoCs. The mimxrt1052 integrates an Arm Cortex-M7 core,
512 KB TCM, and many peripherals including 2D graphics, an LCD display
controller, camera interface, SPDIF and I2S. Unlike other SoCs in
Zephyr, the mimxrt1052 has no internal flash.
This initial port to mimxrt1052 configures the system clock to operate
at 528 MHz, and enables the serial/uart and gpio interfaces to support
the hello_world and blinky samples. Support for additional Zephyr driver
interfaces will come later.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new gpio driver for the NXP i.MX family of SoCs. Read, write,
configure, and callback API functions are all implemented.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
When CONFIG_X86_MMU is enabled for arduino 101 the start address
should be aligned to 4kB. If not aligned the page tables would not
be created and the build fails.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Move the dts files into the board dir so that board ports can be more
standalone. This will allow us at some point to have board ports
outside of the tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the dts fixup files into the board dir so that board ports can be
more standalone. This will allow us at some point to have board ports
outside of the tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Allow for DTS_SOURCE to be defined in other locations (ie by board
directory code). Thus allow the board to set any location to find the
dts source file.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Allow for DTS_BOARD_FIXUP_FILE to be defined in other locations (ie by
board directory code). Thus allow the board to set any location to find
the fixup file.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rename the variables related to DTS fixup to be clear what they are used
for. This also lets us introduce a SOC level DTS fixup in the future
that is distinct from the board one.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If DTS does not depend on include paths determined in /ext then we can
move dts next to kconfig. Moving it next to kconfig means that DTS
CONFIG_ variables will be available at the same time as kconfig's
CONFIG_ variables which is the intended design and beneficial from a
usability perspective.
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Boot serial recovery feature consume additional
memory size so the mcuboot partition must been
expanded on cost of images partitions.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Boot serial recovery feature consume additional
memory size so the mcuboot partition must been
expanded on cost of images partitions.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The port will enable Zephyr to run as a guest OS on x86-64 systems. It
comes with a test on QEMU to validate that, thus this new board
introduction. It's "make run" target will issue QEMU with the same
configuration Jailhouse upstream uses for their confis/qemu-x86.c root
cell configuration:
Test configuration for QEMU Q35 VM, 1 GB RAM, 4 cores,
6 MB hypervisor, 60 MB inmates (-4K shared mem device)
This will work provided qemu-system-x86_64 is installed in the system
and a given (qcow2) image with the Jailhouse root cell in it is
provided (any of those will ever ship with Zephyr, it's out of its
scope).
Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
Add board configuration, dts and pinmux, based on
arm/stm32f4_disco and arm/nucleo_f411re boards.
Error free tests are executed on eval board with the following
sample applications:
- hello_world
- blinky-sample
- button-sample
- console_echo_sample
- console_getchar_sample
Signed-off-by: Jose F. Fernandez <jffernandez@fenix-es.com>
Moved yaml files to be under dts/bindings and have the bindings try
and match the linux doc device tree binding dir structure as the
canonical binding reference.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added I2C bus (TWI) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Arduino Due board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Adds device tree bindings for the Kinetis System Integration Module
(SIM), and defines peripheral source clocks (e.g., system clock or bus
clock) and clock gates for all Kinetis SoCs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds support for TI Simplelink MSP-EXP432P401R-LAUNCHXL
development board based on Cortex M4 family
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds support for on board UART_0 on MSP-EXP432P401R-LAUNCHXL.
Driver makes use of driverlib available in ROM by default, thus saving
code space.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
1. Use compatible "ns16550" to match upstream binding
2. Add reg-shift as optional property to binding yaml
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The EFM32 Wonder Gecko Starter Kit contains sensors and
peripherals demonstarting the usage of the EFM32WG MCU
family. This patch add basic support for this board.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFM32 Wonder Gecko MCU includes:
* Cortex-M4F core at 48MHz
* up to 256KB of flash and 32KB of RAM
* USB with host and OTG support
* multiple low power peripherals
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
stm32f407 SoC is an extension of stm32f405 SoC with additional
support of ethernet and DCMI. Hence, in dts description, this
should be represented by stm32f407.dtsi including stm32f405.dtsi.
The opposite was proposed today in stm32 .dtsi files.
This commit fixes the inclusion model and renames
stm32f407-pinctrl.dtsi into stm32f405-pinctrl.dtsi
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This patch adds partition for NFFS for nRF51, nRF52 and nRF52840.
The partition is placed at the end of flash. This is only added if NFFS
is enabled (since it's required) - in other case free space can be used
for other purposes.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Similar addition was don previous for nRF52840.
Added flash-controller description and moved flash description to
it. Added property for description of
the flash alignment required by write operations.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Similar addition was don previous for nRF52840.
Added flash-controller description and moved flash description to
it. Added property for description of
the flash alignment required by write operations.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Remove usart2_pins_b as this configuration is not possible
(PA15 could not be mapped on USART2).
Besides usart2_pins_c as this configuration is not used yet,
remove to reserve "usart2_pins_c" for future use
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board configuration, dts and pinmux based on both
stm32f469i_disco board and nucleo_f412zg board
Signed-off-by: Massimiliano Cialdi <massimiliano.cialdi@powersoft.it>
Fixes uart irq info in the device tree fixup files for frdm_k64f and
hexiwear_k64. They were incorrect in uart instance 5.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch enables I2C_2 support for 96b_carbon. Without
this patch, trying to build I2C_2 will result in build
error.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Added flash-controller description and moved flash description to
it (for coherence). Added property for description of
the flash alignment required by write operations.
Thanks to that l-value FLASH_WRITE_BLOCK_SIZE macro
will be generated. It is useful for any component uses
the flash.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
We use UART1 for UART pipe in a number of qemu tests, so lets do the
same thing for the bluetooth test and move the bluetooth uart to UART2.
Jira: ZEP-2412.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch add device tree support for develoement board of
quark_se_c1000. Previously pushed patch was flashing binary
at wrong address because of which UART was not working
Jira:ZEP-2459
test
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
This patch fixes the size and address cells yaml generation. Due to
the leading #, the yaml generation incorrectly parses the property
name. Adding quotes around the property name fixes this.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
As the device tree is board specific we should be using the board
Kconfig variable to decide which .dts to use and not the SoC one for
arduino_101.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Clarify that the clock-frequency is the bitrate at boot and introduce
defines that .dts files can use to set the clock-frequency.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
pin-controller reg is already set in stm32f407.dtsi which we include in
stm32f469.dtsi so no need to set it again.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds common and Kinetis-specific pwm device tree properties, and updates
the k64 SoC and board dts files to include all four pwm nodes.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
- board name olimex_stm32_p405
- CPU STM32F405RGT6 Cortex M4
- LED/BUTTON support
- Console on USART2 with 8n1 115200 baud
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The API name space for Bluetooth is bt_* and BT_* so it makes sense to
align the Kconfig name space with this. The additional benefit is that
this also makes the names shorter. It is also in line with what Linux
uses for Bluetooth Kconfig entries.
Some Bluetooth-related Networking Kconfig defines are renamed as well
in order to be consistent, such as NET_L2_BLUETOOTH.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move to using the generated IRQ defines from the DTS instead of soc.h.
This change also fixes a minor bug in that the error irq priority wasn't
getting correctly picked up from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
Populate stm32 f1 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
This is done thanks to <soc>-pinctrl.dtsi file matching
<soc>.dtsi files
Populate stm32 f3 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
This is done thanks to <soc>-pinctrl.dtsi file matching
the <soc>.dtsi files
Populate stm32 f4 based boards dts files with references
to uart pinctrl nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add pinctrl node on stm32l4 soc dts files, including uart
pinctrl configurations. This is done thanks to <soc>-pinctrl.dtsi
file matching the <soc>.dtsi file
Populate stm32 l4 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add pinmux yaml file and bindings before introduction
of pinmux node in stm32 soc device tree files
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
patch fix the build warning generated while building
application for quark_d2000. This is a fix for Jira ZEP-2437
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
When we introduced I2C DTS support on hexiwear_kw40z we got it wrong.
Its I2C1 not I2C0 that was being used on the hexiwear. Fix the dts and
fixup file to reflect that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the I2C defines in fixup files after the introduction
of cell prefix to interrupts-names generated defines
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Now that we generate BLUETOOTH_UART_ON_DEV_NAME, UART_PIPE_ON_DEV_NAME,
and BLUETOOTH_MONITOR_ON_DEV_NAME Kconfig defines for dts enabled
platforms add those into the appropriate dts files and remove from the
various board/Kconfig.defconfig files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to simplify maintenance of dts files for
stm32f4 series, introduce a stm32l4.dtsi file which
represent the smallest common denominator of IPs in
the family.
This allows to fix usart4 availability on stm32l432
which was not correct.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f1 series, introduce a stm32f3.dtsi file which
represent the smallest common denominator of IPs in
the family.
Besides, stm32f334 includes stm32f303, as it is a
extension of this SoC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f1 series, introduce a stm32f1.dtsi file which
represent the smallest common denominator of IPs in
the family.
Besides, stm32f103Xe includes stm32f103xb, as it is a
extension of this SoC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add "clocks" property on u(s)arts nodes on stm32 socs
Add a dt clocks binding file and rework clock_control
header file include new device tree binding file.
include/dt-bindings folder is introduced as dt-bindings
placeholder
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove memory node from skeleton dtsi and add device_type
property in every memory node in soc dtsi files
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch add the unit-address component to memory and flash
nodes. According to the DT specification, the unit-address of
a node must match the first address specified in the reg
property of the node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Remove all explicitly defined application state partition child nodes
from DTS flash nodes, in favor of comments noting that they are
reserved for use by the application.
This follows the pattern established in f58b36a ("dts: frdm_k64f: make
application state partition a reserved area"), and fixes an error
introduced in 9f7f83d2 ("dts: 96b_nitrogen: add flash partitions"),
which added both a reserved area comment and an explicit partition
node to 96b_nitrogen's dts.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Remove compatible = "flash" from any node that has it as this doesn't
have any well defined meaning right now. Also update any compatible =
"sram" to be "mmio-sram" (as there's a binding in linux for this).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the MCUX I2C driver and related platforms to get their I2C
information from the device tree. We also updated a few of the sensor
drivers found on the FRDM & Hexiwear boards to get their I2C bus name
from the device tree instead of directly from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds #address-cell, #size-cell properties to
cpus container node and device_type, reg properties to
cpu node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Adds common and Kinetis-specific adc device tree properties, and updates
all Kinetis SoC and board dts files to include adc nodes.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
patch adds zephyr,uart-pipe to devie tree as chosen property.
This is added for frdmk64f because sanitycheck test was
breaking with changes of generating configs for UART_PIPE
from device tree instead of Kconfig.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
patch adds zephyr,bt-uart, zephyr,uart-pipe and zephyr,bt-mon-uart
to device tree as chosen property.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
A number of sectors are declared in the frdm_k64f flash partitions
node as part of an "application state" partition. Rather than require
users to treat this area of flash as a single partition, delete the
application-state node and leave a comment in its place describing its
purpose.
This enables use cases where the flash sectors must be split into
multiple partitions without defining overlapping partitions in overlay
files.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Currently, flash partitions used by mcuboot are defined in the
SoC-level dtsi file for NXP K6X. This should be made more granular so
that product owners can choose partition layouts to suit their
needs. To that end, move the partitions into frdm_k64f.dts.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
The I2C controller nodes are the root of the I2C bus for that controller
and thus may have children nodes that represent the I2C devices on that
controller. Thus we need to specify the #address-cell & #size-cell
properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
+ The VBLUno52 board
nRF52832 ARM Cortex-M4F processor
Bluetooth Low Energy 5.0
DAPLink interface
UNO pinout
4 power
+ The following samples were tested:
hello_world
basic/button
basic/blinky
bluetooth/peripheral_hr
bluetooth/beacon
Signed-off-by: Nam Do <robotden@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since we support uart0 on the cc2650 sensortag we should have a
reference for zephyr,console in chosen for it. This will be useful as
we start to generate Kconfig defines based on zephyr,console.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configure I2C using DT for the following STM32 boards:
disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The SAM4S, SAM3X, SAME70 all use the uart_sam.c serial
driver. This patch puts the configuration in DTS and
out of Kconfig. The SAME70 uses the USART as well.
USART DTS support for the SAME70 is also in this patch.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
+ VBLUno51 board
nRF51822
Bluetooth Low Energy
DAPLink interface
UNO pinout
4 power
+ Wiki: https://vngiotlab.github.io/vbluno/
+ The following samples were tested:
hello_world
basic/button
basic/blinky
bluetooth/peripheral_hr
bluetooth/beacon
Signed-off-by: Nam Do <robotden@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With this partition: mcuboot up to 64KB, user app up to 432KB, an
application state of 64KB, and a swap sector of 24KB.
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
Renames k64sim to nxp,k64f-sim to be more consistent with other files.
The sim hardware can vary across Kinetis SoCs, so this dts is not made
to be generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same gpio hardware as the k64 and can use
the same mcux driver, so rename the dts to be more generic.
Also fixes some stranded references to kw41z-gpio to the new
kinetis-gpio.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same pinmux hardware as the k64 and can
use the same mcux driver, so rename the dts to be more generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same lpuart hardware as the kw41z and can
use the same mcux driver, so rename the dts to be more generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same uart hardware as the k64 and can use
the same mcux driver, so rename the dts to be more generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Add configuration and memory definitions to support STM32F103x8
Medium-density performance line SoC with 64 KB Flash.
Merge multiple files into single Kconfig.defconfig.stm32f103xx
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
patch adds necessary files and does the modification
to the existing files to add device support for
arduino_101 board.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
patch enables qmsi serial driver to pick baudrate and name
from device tree instead of Kconfig for UART0 and UART1
instance
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
patch adds necessary files and does the modification to the existing
files to add device support for x86 based intel quark microcontroller
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
The Sam4x HAL defines __NVIC_PRIO_BITS to 4. Fixes an issue where
interrupt priorities and masking were not being done correctly.
Issue: ZEP-2243
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update driver to use DTS-generated #defines for port names,
and not obsolete Kconfig variables.
Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
Recent changes (69255043, 91f67a13, 84628e8b, fa4a3932) add support
for a partition table in the flash. Add support for this to the nxp
k6x dtsi file. By default, code will occupy the entire flash. By
setting a chosen node in an application, the code can be linked into
one of the partitions. For example, and app could create a
'frdm_k64f.overlay' file at the top of their project with:
/ {
chosen {
zephyr,code-partition = &slot0_partition;
};
};
to place an application in slot 0.
Signed-off-by: David Brown <david.brown@linaro.org>
- board name olimex_stm32_e407
- CPU STM32F407ZGT6 Cortex M4
- LED/BUTTON support
- Console on USART1 with 8n1 115200 baud
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The Sam3x HAL defines __NVIC_PRIO_BITS to 4.
Fixes an issue where interrupt priorities and masking
were not being done correctly.
Issue: ZEP-2243
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch adds a YAML template file that describes the format of a
Zephyr device tree YAML specification.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary Kconfig and minimal device tree in order to support
STM32F412ZG variant as found on the Nucleo STM32F412 board.
Origin: Original
Change-Id: Ic98a686f478ce551dc6101466ed0cf16924109e8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
This commit rework stm32f4 series dtsi files hierarchy.
stm32f4.dtsi was used as maximum common set of IP while it should
be considered as the minimum common subset.
Then, following on stm32f4 series hierarchy and inheritance rules,
stm32f4xxx.dtsi files are reworked to include the "parent" soc dtsi
file and then add own IPs to each SoC.
Change-Id: I394278c84a8ea38921f9f143f4fc52ef1c645d05
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In stm32 dtsi linux files, uart generic node name is serial.
Rename uart node names of stm32 dtsi files from uart@ to serial@
Change-Id: Iac5cbf7955f23cee520bc1790b0f324a17bfcf9e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit fixes uart only nodes situation for stm32 devices.
st,stm32-uart yaml description is added to enable compilation
Change-Id: Iea78693bdfb90fbb09612b75685ed7ca0ccca6d6
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add configuration, dtsi and memory configuration fixup for the
STM32F469XI High Performance SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The chosen property that sets which serial port is being used for the
console device wasn't set. Add the property "zephyr,console" to the
Arduino Due, CC3200-LaunchXL, CC3220SF-LaunchXL, and QEMU Cortex M3
boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the Atmel SAM3 UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI Stellaris UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI CC32xx UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the ARM CMSDK APB UART out of the device
tree instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the NXP Kinetis UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the NRF UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the STM32 UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add optional label property to be generated as part of the UART yaml
spec. This lets us use the label string in a device tree to generate
the device name (for example CONFIG_UART_STM32_PORT_1_NAME).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add configuration, pinmux, dts and documentation for the STM32L496G
Discovery board based on the STM32L496AG SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add missing UARTs from the main device tree. They are declared as
disabled and can be enabled individually by each board.
Change-Id: I0ec73c59b4c3c4ee56f12ae70f2d6cdbec14fe33
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary Kconfig and minimal device tree in order to support
STM32F413xH variants as found on the Nucleo STM32F413 board.
Origin: Original
Change-Id: I60230c240d6acb610f16a02c62048d448476e9c5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Rename SOC_STM32F407XX to SOC_STM32F407XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file).
Change-Id: I0afa16e86b7c99b9e685004f96beeb888f9e7568
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename SOC_STM32F429XX to SOC_STM32F429XI to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: Id188b7703d2bce0a3ded09132ff0f205efa9c143
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The xC tag in the SoC reference indicates the flash size, use it in the
configuration to permit selection of correct flash size for dts.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This patch enables the generation of the ARM CMSDK UART base address
from the device tree.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This adds support for the nRF51 chip on the board.
If you'd like to run Zephyr on the STM32F4 chip on Carbon, you need to
use the 96b_carbon board instead.
The current SPI Bluetooth protocol only uses 5 wires, so we use the
remaining pin as UART TX.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Add configuration, dts and documentation for the Nucleo L432KC board
based on the STM32L432KC SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Converted Stellaris UART driver over to utilize device tree generated
defines. Added a yaml description for the uart, and converted over the
ti_lm3s6965 SoC & qemu_cortex_m3 board port over to utilize it.
Change-Id: Ie20844eb63d2c68eb59ad4160f7f5b5a35e2943b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a simple device tree for the TI lm3s6965 SoC and QEMU
Cortex-M3 board port. We get flash and memory base addresses and sizes
from the device tree as well as the ARM NVIC number of priority bits.
Change-Id: I4452b5543de7be55518997e54837ccbfd4f121df
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF51822 SoCs and Arduino 101-BLE,
Curie-BLE, BLE Nano, PCA10028-DK, and Quark-SE BLE boards. This
is minimal support for memory, flash, and UART.
Change-Id: I7e572bea537e384b6d66e520462f023ace0c9b35
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF52840 SoC and PCA10056-DK board. This
is minimal support for memory, flash, and UART.
For the nRF52840 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: I1c377e0cb97ff4716ea5489fffaa7c0e2b34d18a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for Nitrogen 96board, BLE Nano 2, and
nRF52-PCA10040 DK boards. This is minimal support for memory, flash,
and UART.
For the nRF52832 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: Ia247b9b710a72416e9ab0de3ca1429bfab8917f8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to allow the use of such board, a very preliminar port was
developed. It consists of board files, as well as pinmux, uart, gpio,
spi drivers and device tree files.
Change-Id: I5753064e39e0b023cf4481744c176de26d8dbebb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The CC3200 doesn't have on chip flash, so we should be including it in
the dts.
Change-Id: I8d4bbe2b09ed1aa563efe4c979da1f4729b93534
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds a shim layer around the mcux lpsci driver to adapt it to the Zephyr
serial interface.
Change-Id: I024f1605e3194f34bb57e8a121900e05b3085a82
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for STM32L475xG SoC as a preliminary for
Discovery IOT board support.
stm32l476.dtsi file is now including stm32l475.dtsi
since STM32L476 SoC is a STM32L475 SoC with LCD support
Change-Id: I7567255e4172231cbf4899474617ecae0cd68d64
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This to align with previous patch:
"dts: Align uart "baud-rate" property to device tree spec "current-speed""
Jira: ZEP-1958
Change-Id: I65328cf63e25b0378f270b5f60deb9d6a1f49b8c
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
CC3220SF_LAUNCHXL effectively replaces the CC3200_LAUNCHXL,
with support for the CC3220SF SoC, which is an update for
the CC3200 SoC.
This is supported by the Texas Instruments CC3220 SDK.
Jira: ZEP-1958
Change-Id: I2484d3ee87b7f909c783597d95128f2b45db36f2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Devicetree.org specifies that serial devices property used to set
baud rate is "current-speed", while zephyr uses "baud-rate".
Align property name in order to keep zephyr dts files compatible
with device tree specification and could be re-used from/to
Linux for instance. We also cleanup a few SoCs that set "baud-rate" in
the SoC dts and not the board.
Jira: ZEP-2048
Change-Id: I097e7439ee46fe77c628b56531772950382fafcc
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This in preparation for adding a cc3220sf DTS file, which
has a different address for sram0 than the cc3200.
Also moved baud-rate out of soc dtsi file to board dts.
Jira: JEP-1958
Change-Id: I641452c0a8a6d1ad4424e132d6ef2de71d8545b4
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Add plumbing to build system and SoC level dtsi for the NRF52832 SoC.
We additionally add the necessary yaml files for the UART on the NRF52
SoCs.
Change-Id: I3b4a821b2993827e33d8e84bdbbc759d1521f8bd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds initial support and documentation for the kw40z on the hexiwear
board.
Jira: ZEP-1391
Change-Id: Idb58bfb3c2951b1f737a8c547860bde4ef4d9a3e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds initial support for the kw40z SoC. This SoC has all the same
peripherals as the kw41z but with less flash and ram, so the defconfig
and dts are nearly the same.
Jira: ZEP-1388
Change-Id: Ib804451e8c2c71c4ff7d342bf23f6567d1542a2d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converted over all STM32F3 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F3.
Boards that are now using devicetree:
* Nucleo f334r8
* STM32373C Eval
Change-Id: I081a1d83f86e417a98b6864c745354b6b32953b7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F1 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F1. Also
renamed the STM32F10{3,7} SoC dtsi to try and make it clear that the 'X'
is a place holder. Fixedup the top level compatiables in the boards to
be the specific 'X' instead of the generic one.
Boards that are now using devicetree:
* Nucleo f103rb
* STM3210C Eval
* STM32 MINI A15
Change-Id: I29b3634ec7451f974687d55980414efa655e2e96
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F4 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F4.
Boards that are now using devicetree:
* 96b_carbon
* nucleo f401re
* nucleo f411re
Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updated st/mem.h to support the following SoCs:
CONFIG_SOC_STM32F303XC
CONFIG_SOC_STM32F407XX
CONFIG_SOC_STM32F429XX
Change-Id: I1654c1fd8dc0d1eb471c092777a8fd262465dc51
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a __SIZE_K macro to make things a bit more human readable.
Also fixed up sizes for CONFIG_SOC_STM32F411XE.
Change-Id: I01b8b5f627ad949c2af01ee966428bfabe09e2ee
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commits provides dts files for non ST, STM32 based boards.
Change-Id: Ib324ba418fb27ddbce45a60fbe8e73c7b6896aa4
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides dts file for nucleo boards.
For now dtsi files only populates uart nodes so other nodes
are not taken into account into board dts files.
Change-Id: Ide95a8ba3671b91ff0311b7671e77b3bf96db297
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit provides dtsi files for available stm32 base boards.
For now only uart nodes and IRQ number are provided in order to
enable delivery of coherent material.
It also clears additional content from stm32f103xb.dtsi
Change-Id: I62d932c7f22b56e95bcd9566ce39e14a393dd640
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As there can be a large number of FLASH & SRAM sizes for the same SoC
having a dts/dtsi for each one would be extremely painful. Lets just
use some #defines to set that FLASH & SRAM sizes based on the SoC that
is being built.
Change-Id: I06388ada4e49ed3d576da31150288512bb6b4485
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch modifies the DTS file to make the inclusion of the
bluetooth UART port conditional on CONFIG_BLUETOOTH option.
Issue: ZEP-1745
Change-Id: Iea8dc60fe17d131d8e3765e1962b25d157065c67
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In general we should be using hardcoded addresses in the dtsi files
rather than getting ifdef from other places. As the unit address of the
node is typically based on the address in hex w/o the '0x' we can't just
use #defines directly.
Change-Id: I0e17e001151728d16842806d9407e66e6e5129cf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the SoC dtsi into a vendor dir so as we grow and possibly share
things with other projects we are hopefully in sync (or closer to it).
Change-Id: I71666cff49f9694eee3f5d92dac8aeea416b730a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a system include so that board dts files are able to live in
any location and properly include the things they need.
Change-Id: Icd26433117a4ca9726aeb74eec9f72c6d9df617c
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Recommend to drop the generic arm,nvic and just use arm,v{6,7,8}m-nvic.
Remove the yaml and switch to using arm,v6m-nvic or arm,v7m-nvic in the
various places.
Change-Id: Ide55d558d38ab247ee6d9a8d3d0a7f21b9c859bd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As part of the transition to Device Tree, a temporary
HAS_DTS configuration variable, and a .fixup file per board
with symbol aliases were added.
This patch removes the cc32xx related fixup file
definitions, except for those used additionally outside
the cc32xx drivers.
Since cc32xx has DTS files, and since HAS_DTS will always be true,
it also removes the 'if !HAS_DTS' blocks from the cc32xx Kconfig
files.
Change-Id: I1c1b9f734795f523342f82ab32f2a38983812c0b
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As per new binding for arm,nvic, rename the 'num-irq-prio-bits' property
to 'arm,num-irq-priority-bits'.
Change-Id: I2182a905de340e134c67ac4aabe926fbb47c0d5a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Reworking the ARM NVIC binding and cleaning it up. Towards this
introduce a new compatibility for this new binding. So we rename
arm,armv{6,7}-nvic to arm,v{6,7}-nvic (for new binding). We also just
use the bit more generic arm,nvic in device tree files.
Change-Id: I5a2c45313ed94619d9268f2c035dacbc8acded29
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move back to getting the number of IRQs from Kconfig. We do this
because the number of IRQs should really just be determined by scanning
the device tree and figuring out the highest IRQ value used.
Change-Id: I8e0dbec1d9d036d4e899b237c4dc7d833c422e18
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rather than having a zephyr specific property we will encode the IRQ
priority as part of the interrupt property for ARM NVIC based interrupt
controllers.
Change-Id: I7d1489f0bffa7a6369f0622f748bb70dc83fa0cd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds the base DTS files required to support DTS for the
STM32F103xB based Olimexino STM32 board.
Origin: Original
Change-Id: I2a20d3f3ce8b1d3c20fe92b2ffa584c69fbd96a5
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Only the IRQ prasing was using cell_prefix and cell_string does the same
thing so lets just use that everywhere.
Change-Id: I2ef9b1e2c1baef54b71d811c835b29a9ca8fe81b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move SRAM and flash nodes out of stm32l476.dtsi
RAM and Flash sizes depend on last letter ("G" in the case).
Hence it must be defined out of soc description file
Update information for leds
Change-Id: I980129c44c335322ddbe57252a7001296094c7cb
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some files made it through review process with full license header.
Change-Id: I2722b127c40b4b19500042c12e4fde85a165bae9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds the UART ports required by for Bluetooth. Baud rate
was moved from the Kinetis dtsi file to the relevant board files.
Jira: ZEP-1745
Change-Id: Iac4f748fd82217662800dbf48baea087e5d3a1df
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the base DTS support for the KW41Z Freedom board. The
initial set of changes include SRAM, FLASH, IRQ controller and LPUART
support.
Change-Id: Ic68c4959ddad0c5cfe70d5576a0e58372b93ec9d
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
This patch adds DTS support to the ARM CMSDK UART driver. The DTS
currently specifies the IRQ, IRQ PRIO, and base address of the port.
Change-Id: I8e5bc81c013958be4297d563495bf126b53a83a9
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the base DTS support for the V2M Beetle board. The
initial set of changes include SRAM, FLASH, and IRQ controller support.
Change-Id: I06685622b9c57ac358544c71350074ce06e3371e
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds device tree support to the STM32 UART driver. The base
address, interrupt, and interrupt priority values can now come from DTS.
Change-Id: I3c383da8b200037601ecb2dc087f99ef103761bb
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the base DTS and yaml files required to support DTS
for the STM32L476 based Nucleo board.
Change-Id: Ic606a895a25f27d2990f651d0f3c3c5d84818cfd
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the necessary DTS, YAML, and Makefile changes necessary
to generate proper include information for the CC3200. The initial
base support includes SRAM, FLASH, and UART devices.
Change-Id: I8ef8c24c3915198dbb5cfeb2431aa6dc68267d0e
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds DTS support for the Hexiwear K64 platform. This
includes enabling the DTS config option and adding conditionals around
the options to be replaced.
In addition, a DTS file is provided that customizes the Kinetis
platform to match the hexiwear board. A fixup file is provided to map
the generated information to the current client driver usage. This
file is temporary.
Change-Id: I247d538c6e13e0d1d4141fee74046575a7d2972e
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds DTS support for the FRDM_K64F board. The defconfig
enables the DTS usage and the FRDM K64F specific DTS file provides the
differences from the base Kinetis DTS definitions.
A fixup file is provided to map the generated configuration information
to the driver consumers. The fixup file will be removed once the
drivers are modified to handle the newly generated information.
Change-Id: Ib0ada28faff6a30e8b40eba5c5853e9018ae5fcb
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds DTS support and related files for the NXP Kinetis
platform. The DTS files contain the base definitions for the hardware
nodes on Kinetis platforms. The YAML files provide the definitions of
the contents of the DTS nodes.
The Kconfig changes were put in place to allow for the conversion of
existing drivers. Once those drivers are modified, the Kconfig options
that are replaced by the DTS information will be removed.
Change-Id: If110fffa99c0b12471cf2df206da6687277e4756
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the base DTS and YAML files that may be referenced by
SoCs. The device tree files provide base definitions for the more well
known ARMV7M device nodes. These files are meant to be included in
SoC vendor specific device tree files.
The YAML files provide definitions for the contents of device tree node
that contain information that will be parsed and used for configuration
in the system.
DTS files define hardware and software configuration and YAML files
provide the markers for knowing which pieces need to be extracted.
Change-Id: I7e90fe19f09afb269b7b2988c2c19c0f26d7ee7c
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support for using device tree configuration files for
configuring ARM platforms.
In this patch, only the FLASH_SIZE, SRAM_SIZE, NUM_IRQS, and
NUM_IRQ_PRIO_BITS were removed from the Kconfig options. A minimal set
of options were removed so that it would be easier to work through the
plumbing of the build system.
It should be noted that the host system must provide access to the
device tree compiler (DTC). The DTC can usually be installed on host
systems through distribution packages or by downloading and compiling
from https://git.kernel.org/pub/scm/utils/dtc/dtc.git
This patch also requires the Python yaml package.
This change implements parts of each of the following Jira:
ZEP-1304
ZEP-1305
ZEP-1306
ZEP-1307
ZEP-1589
Change-Id: If1403801e19d9d85031401b55308935dadf8c9d8
Signed-off-by: Andy Gross <andy.gross@linaro.org>