dts: Generate Kinetis adc settings from device tree

Adds common and Kinetis-specific adc device tree properties, and updates
all Kinetis SoC and board dts files to include adc nodes.

Jira: ZEP-1396

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2017-07-11 20:49:08 -05:00 committed by Kumar Gala
commit 7bf0df3aec
18 changed files with 182 additions and 4 deletions

View file

@ -52,12 +52,12 @@ config ADC_0
config ADC_0_NAME
string "ADC 0 Driver's name"
depends on ADC_0
depends on ADC_0 && !HAS_DTS_ADC
default "ADC_0"
config ADC_0_IRQ_PRI
int
depends on ADC_0
depends on ADC_0 && !HAS_DTS_ADC
prompt "ADC 0 interrupt priority"
default 2
@ -67,12 +67,12 @@ config ADC_1
config ADC_1_NAME
string "ADC 1 Driver's name"
depends on ADC_1
depends on ADC_1 && !HAS_DTS_ADC
default "ADC_1"
config ADC_1_IRQ_PRI
int
depends on ADC_1
depends on ADC_1 && !HAS_DTS_ADC
prompt "ADC 1 interrupt priority"
default 2

View file

@ -7,6 +7,8 @@
compatible = "nxp,mk64f12", "nxp,k64f", "nxp,k6x";
aliases {
adc_0 = &adc0;
adc_1 = &adc1;
uart_0 = &uart0;
uart_3 = &uart3;
pinmux_a = &pinmux_a;
@ -29,6 +31,14 @@
};
};
&adc0 {
status = "ok";
};
&adc1 {
status = "ok";
};
&uart0 {
status = "ok";
current-speed = <115200>;

View file

@ -23,3 +23,13 @@
#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED
#define CONFIG_UART_MCUX_5_IRQ_PRI NXP_KINETIS_UART_400EB000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
#define CONFIG_ADC_1_BASE_ADDRESS NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS_0
#define CONFIG_ADC_1_IRQ NXP_KINETIS_ADC16_400BB000_IRQ_0
#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL

View file

@ -7,6 +7,7 @@
compatible = "nxp,frdm-kl25z", "nxp,kl25z", "nxp,mkl25z4";
aliases {
adc_0 = &adc0;
uart_0 = &uart0;
};
@ -17,6 +18,10 @@
};
};
&adc0 {
status = "ok";
};
&uart0 {
status = "ok";
current-speed = <115200>;

View file

@ -1,2 +1,7 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_LPSCI_0_NAME NXP_KINETIS_LPSCI_4006A000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL

View file

@ -7,6 +7,7 @@
compatible = "nxp,kw41z", "nxp,mkw41z4";
aliases {
adc_0 = &adc0;
lpuart_0 = &lpuart0;
pinmux_a = &pinmux_a;
pinmux_b = &pinmux_b;
@ -23,6 +24,10 @@
};
};
&adc0 {
status = "ok";
};
&lpuart0 {
status = "ok";
current-speed = <115200>;

View file

@ -3,3 +3,8 @@
#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KINETIS_LPUART_40054000_CURRENT_SPEED
#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL

View file

@ -7,6 +7,8 @@
compatible = "nxp,hexiwear", "nxp,k64f", "nxp,k6x";
aliases {
adc_0 = &adc0;
adc_1 = &adc1;
uart_0 = &uart0;
uart_4 = &uart4;
pinmux_a = &pinmux_a;
@ -29,6 +31,14 @@
};
&adc0 {
status = "ok";
};
&adc1 {
status = "ok";
};
&uart0 {
status = "ok";
current-speed = <115200>;

View file

@ -23,3 +23,13 @@
#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED
#define CONFIG_UART_MCUX_5_IRQ_PRI NXP_KINETIS_UART_400EB000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
#define CONFIG_ADC_1_BASE_ADDRESS NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS_0
#define CONFIG_ADC_1_IRQ NXP_KINETIS_ADC16_400BB000_IRQ_0
#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL

View file

@ -7,6 +7,7 @@
compatible = "nxp,kw40z", "nxp,mkw40z4";
aliases {
adc_0 = &adc0;
lpuart_0 = &lpuart0;
pinmux_a = &pinmux_a;
pinmux_b = &pinmux_b;
@ -22,6 +23,10 @@
};
};
&adc0 {
status = "ok";
};
&lpuart0 {
status = "ok";
current-speed = <115200>;

View file

@ -3,3 +3,8 @@
#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KINETIS_LPUART_40054000_CURRENT_SPEED
#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL

View file

@ -273,6 +273,22 @@
clock-source = <0>;
/* channel information needed - fixme */
};
adc0: adc@4003b000{
compatible = "nxp,kinetis-adc16";
reg = <0x4003b000 0x70>;
interrupts = <39 0>;
label = "ADC_0";
status = "disabled";
};
adc1: adc@400bb000{
compatible = "nxp,kinetis-adc16";
reg = <0x400bb000 0x70>;
interrupts = <73 0>;
label = "ADC_1";
status = "disabled";
};
};
};

View file

@ -25,6 +25,14 @@
status = "disabled";
};
adc0: adc@4003b000{
compatible = "nxp,kinetis-adc16";
reg = <0x4003b000 0x70>;
interrupts = <15 0>;
label = "ADC_0";
status = "disabled";
};
};
};

View file

@ -178,6 +178,14 @@
clock-source = <0>;
/* channel information needed - fixme */
};
adc0: adc@4003b000{
compatible = "nxp,kinetis-adc16";
reg = <0x4003b000 0x70>;
interrupts = <15 0>;
label = "ADC_0";
status = "disabled";
};
};
};

View file

@ -178,6 +178,14 @@
clock-source = <0>;
/* channel information needed - fixme */
};
adc0: adc@4003b000{
compatible = "nxp,kinetis-adc16";
reg = <0x4003b000 0x70>;
interrupts = <15 0>;
label = "ADC_0";
status = "disabled";
};
};
};

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@ -0,0 +1,35 @@
#
# Copyright (c) 2017, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
---
title: Kinetis ADC16
id: nxp,kinetis-adc16
version: 0.1
description: >
This binding gives a base representation of the Kinetis ADC16
inherits:
- !include adc.yaml
properties:
- compatible:
type: string
category: required
description: compatible strings
constraint: "nxp,kinetis-adc16"
- reg:
type: array
description: mmio register space
generation: define
category: required
- interrupts:
type: array
category: required
description: required interrupts
generation: define
...

26
dts/common/yaml/adc.yaml Normal file
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@ -0,0 +1,26 @@
#
# Copyright (c) 2017, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
---
title: ADC Base Structure
id: adc
version: 0.1
description: >
This binding gives the base structures for all ADC devices
properties:
- clocks:
type: array
category: required
description: Clock gate information
generation: define
- label:
type: string
category: required
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
...

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@ -15,6 +15,13 @@ config HAS_DTS
This option specifies that the target platform supports device tree
configuration.
config HAS_DTS_ADC
bool "ADC uses Device Tree"
depends on HAS_DTS
help
This option specifies that the target platform supports device tree
configuration for ADC.
config HAS_DTS_I2C
bool "I2C uses Device Tree"
default n