dts: Generate Kinetis adc settings from device tree
Adds common and Kinetis-specific adc device tree properties, and updates all Kinetis SoC and board dts files to include adc nodes. Jira: ZEP-1396 Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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18 changed files with 182 additions and 4 deletions
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@ -52,12 +52,12 @@ config ADC_0
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config ADC_0_NAME
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string "ADC 0 Driver's name"
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depends on ADC_0
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depends on ADC_0 && !HAS_DTS_ADC
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default "ADC_0"
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config ADC_0_IRQ_PRI
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int
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depends on ADC_0
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depends on ADC_0 && !HAS_DTS_ADC
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prompt "ADC 0 interrupt priority"
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default 2
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@ -67,12 +67,12 @@ config ADC_1
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config ADC_1_NAME
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string "ADC 1 Driver's name"
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depends on ADC_1
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depends on ADC_1 && !HAS_DTS_ADC
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default "ADC_1"
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config ADC_1_IRQ_PRI
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int
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depends on ADC_1
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depends on ADC_1 && !HAS_DTS_ADC
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prompt "ADC 1 interrupt priority"
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default 2
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@ -7,6 +7,8 @@
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compatible = "nxp,mk64f12", "nxp,k64f", "nxp,k6x";
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aliases {
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adc_0 = &adc0;
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adc_1 = &adc1;
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uart_0 = &uart0;
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uart_3 = &uart3;
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pinmux_a = &pinmux_a;
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@ -29,6 +31,14 @@
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};
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};
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&adc0 {
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status = "ok";
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};
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&adc1 {
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status = "ok";
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};
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&uart0 {
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status = "ok";
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current-speed = <115200>;
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@ -23,3 +23,13 @@
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#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_5_IRQ_PRI NXP_KINETIS_UART_400EB000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL
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#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
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#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
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#define CONFIG_ADC_1_BASE_ADDRESS NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS_0
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#define CONFIG_ADC_1_IRQ NXP_KINETIS_ADC16_400BB000_IRQ_0
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#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
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@ -7,6 +7,7 @@
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compatible = "nxp,frdm-kl25z", "nxp,kl25z", "nxp,mkl25z4";
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aliases {
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adc_0 = &adc0;
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uart_0 = &uart0;
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};
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@ -17,6 +18,10 @@
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};
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};
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&adc0 {
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status = "ok";
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};
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&uart0 {
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status = "ok";
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current-speed = <115200>;
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@ -1,2 +1,7 @@
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_LPSCI_0_NAME NXP_KINETIS_LPSCI_4006A000_LABEL
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#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
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#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
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@ -7,6 +7,7 @@
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compatible = "nxp,kw41z", "nxp,mkw41z4";
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aliases {
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adc_0 = &adc0;
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lpuart_0 = &lpuart0;
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pinmux_a = &pinmux_a;
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pinmux_b = &pinmux_b;
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@ -23,6 +24,10 @@
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};
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};
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&adc0 {
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status = "ok";
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};
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&lpuart0 {
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status = "ok";
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current-speed = <115200>;
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@ -3,3 +3,8 @@
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#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KINETIS_LPUART_40054000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL
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#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
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#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
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@ -7,6 +7,8 @@
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compatible = "nxp,hexiwear", "nxp,k64f", "nxp,k6x";
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aliases {
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adc_0 = &adc0;
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adc_1 = &adc1;
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uart_0 = &uart0;
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uart_4 = &uart4;
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pinmux_a = &pinmux_a;
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@ -29,6 +31,14 @@
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};
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&adc0 {
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status = "ok";
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};
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&adc1 {
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status = "ok";
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};
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&uart0 {
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status = "ok";
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current-speed = <115200>;
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@ -23,3 +23,13 @@
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#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_5_IRQ_PRI NXP_KINETIS_UART_400EB000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL
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#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
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#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
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#define CONFIG_ADC_1_BASE_ADDRESS NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS_0
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#define CONFIG_ADC_1_IRQ NXP_KINETIS_ADC16_400BB000_IRQ_0
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#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
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#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL
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@ -7,6 +7,7 @@
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compatible = "nxp,kw40z", "nxp,mkw40z4";
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aliases {
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adc_0 = &adc0;
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lpuart_0 = &lpuart0;
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pinmux_a = &pinmux_a;
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pinmux_b = &pinmux_b;
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@ -22,6 +23,10 @@
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};
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};
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&adc0 {
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status = "ok";
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};
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&lpuart0 {
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status = "ok";
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current-speed = <115200>;
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@ -3,3 +3,8 @@
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#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KINETIS_LPUART_40054000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL
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#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS_0
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#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
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@ -273,6 +273,22 @@
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clock-source = <0>;
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/* channel information needed - fixme */
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <39 0>;
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label = "ADC_0";
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status = "disabled";
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};
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adc1: adc@400bb000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x400bb000 0x70>;
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interrupts = <73 0>;
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label = "ADC_1";
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status = "disabled";
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};
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};
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};
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@ -25,6 +25,14 @@
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status = "disabled";
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <15 0>;
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label = "ADC_0";
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status = "disabled";
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};
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};
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};
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@ -178,6 +178,14 @@
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clock-source = <0>;
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/* channel information needed - fixme */
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <15 0>;
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label = "ADC_0";
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status = "disabled";
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};
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};
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};
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@ -178,6 +178,14 @@
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clock-source = <0>;
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/* channel information needed - fixme */
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};
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adc0: adc@4003b000{
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x70>;
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interrupts = <15 0>;
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label = "ADC_0";
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status = "disabled";
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};
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};
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};
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35
dts/arm/yaml/nxp,kinetis-adc16.yaml
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35
dts/arm/yaml/nxp,kinetis-adc16.yaml
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@ -0,0 +1,35 @@
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: Kinetis ADC16
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id: nxp,kinetis-adc16
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version: 0.1
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description: >
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This binding gives a base representation of the Kinetis ADC16
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inherits:
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- !include adc.yaml
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properties:
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- compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "nxp,kinetis-adc16"
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- reg:
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type: array
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description: mmio register space
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generation: define
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category: required
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- interrupts:
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type: array
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category: required
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description: required interrupts
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generation: define
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...
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26
dts/common/yaml/adc.yaml
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26
dts/common/yaml/adc.yaml
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: ADC Base Structure
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id: adc
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version: 0.1
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description: >
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This binding gives the base structures for all ADC devices
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properties:
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- clocks:
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type: array
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category: required
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description: Clock gate information
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generation: define
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- label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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...
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@ -15,6 +15,13 @@ config HAS_DTS
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This option specifies that the target platform supports device tree
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configuration.
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config HAS_DTS_ADC
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bool "ADC uses Device Tree"
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depends on HAS_DTS
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help
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This option specifies that the target platform supports device tree
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configuration for ADC.
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config HAS_DTS_I2C
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bool "I2C uses Device Tree"
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default n
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