stm32f4: Add STM32F429I-DISC1 board

Add necessary board files, pinmux and device tree in order to have a
usable debug console.

ZEP-2461

Signed-off-by: Jun Li <jun.r.li@intel.com>

boards/arm/stm32f429i_disc1/Kconfig.board

@@ -0,0 +1,10 @@
+# Kconfig - STM32F4DISCOVERY board configuration
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_STM32F429I_DISC1
+	bool "STM32F429I-DISC1 Development Board"
+	depends on SOC_STM32F429XI

boards/arm/stm32f429i_disc1/Kconfig.defconfig

@@ -0,0 +1,13 @@
+# Kconfig - STM32F4DISCOVERY board configuration
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_STM32F429I_DISC1
+
+config BOARD
+	default stm32f429i_disc1
+
+endif # BOARD_STM32F429I_DISC1

boards/arm/stm32f429i_disc1/Makefile

@@ -0,0 +1,10 @@
+# Makefile - Olimex STM32-E407 board
+#
+# Copyright (c) 2017, Erwin Rol <erwin@erwinrol.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+ccflags-y += -I$(srctree)/drivers
+
+obj-y += pinmux.o

boards/arm/stm32f429i_disc1/Makefile.board

@@ -0,0 +1,7 @@
+FLASH_SCRIPT = openocd.sh
+DEBUG_SCRIPT = openocd.sh
+
+OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+
+export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD

boards/arm/stm32f429i_disc1/board.h

@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT	"GPIOA"
+#define USER_PB_GPIO_PIN	0
+
+/* LD3 orange LED */
+#define LD3_GPIO_PORT	"GPIOG"
+#define LD3_GPIO_PIN	13
+
+/* LD4 green LED */
+#define LD4_GPIO_PORT	"GPIOG"
+#define LD4_GPIO_PIN	14
+
+/* Create aliases to make the basic samples work */
+#define SW0_GPIO_NAME	USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN	USER_PB_GPIO_PIN
+#define LED0_GPIO_PORT	LD3_GPIO_PORT
+#define LED0_GPIO_PIN	LD3_GPIO_PIN
+
+#endif /* __INC_BOARD_H */

boards/arm/stm32f429i_disc1/doc/stm32f429i_disc1.rst

@@ -0,0 +1,203 @@
+.. _stm32f429i_disc1_board:
+
+ST STM32F429I-DISC1 Discovery board
+###################################
+
+Overview
+********
+
+The STM32F429I-DISC1 Discovery kit features an ARM Cortex-M4 based STM32F429ZI MCU
+with a wide range of connectivity support and configurations. Here are
+some highlights of the STM32F429I-DISC1 board:
+
+- STM32 microcontroller in LQFP144 package
+- Extension header for all LQFP144 I/Os for quick connection to prototyping board and easy probing
+- On-board ST-LINK/V2-B debugger/programmer with SWD connector
+- Flexible board power supply:
+
+       - ST-LINK/V2-1 USB connector
+       - User USB FS connector
+       - VIN from Arduino* compatible connectors
+
+- Two push-buttons: USER and RESET
+- USB OTG FS with micro-AB connector
+- 2.4-inch QVGA LCD with MIPI DSI interface and capacitive touch screen
+- 64Mbit SDRAM
+- L3GD20, ST-MEMS motion sensor 3-axis digital output gyroscope
+- Six LEDs
+
+	- LD1 (red/green) for USB communication
+	- LD2 (red) for 3.3 V power-on
+	- Two user LEDs: LD3 (green), LD4 (red)
+	- Two USB OTG LEDs: LD5 (green) VBUS and LD6 (red) OC (over-current)
+
+.. image:: img/en.stm32f429i_disc1.png
+     :width: 350px
+     :align: center
+     :height: 631px
+     :alt: STM32F429I-DISC1
+
+More information about the board can be found at the `STM32F429I-DISC1 website`_.
+
+Hardware
+********
+
+The STM32F429I-DISC1 Discovery kit provides the following hardware components:
+
+- STM32F429ZIT6 in LQFP144 package
+- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
+- 180 MHz max CPU frequency
+- VDD from 1.8 V to 3.6 V
+- 2 MB Flash
+- 256+4 KB SRAM including 64-Kbyte of core coupled memory
+- GPIO with external interrupt capability
+- 3x12-bit ADC with 24 channels
+- 2x12-bit D/A converters
+- RTC
+- Advanced-control Timer
+- General Purpose Timers (17)
+- Watchdog Timers (2)
+- USART/UART (4/4)
+- I2C (3)
+- SPI (6)
+- SDIO
+- 2xCAN
+- USB 2.0 OTG FS with on-chip PHY
+- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
+- 10/100 Ethernet MAC with dedicated DMA
+- 8- to 14-bit parallel camera
+- CRC calculation unit
+- True random number generator
+- DMA Controller
+
+More information about STM32F429ZI can be found here:
+       - `STM32F429ZI on www.st.com`_
+       - `STM32F429 Reference Manual`_
+
+Supported Features
+==================
+
+The Zephyr stm32f429i_disc1 board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| PWM       | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not yet supported on Zephyr porting.
+
+The default configuration can be found in the defconfig file:
+
+	``boards/arm/stm32f429i_disc1/stm32f429i_disc1_defconfig``
+
+
+Pin Mapping
+===========
+
+The STM32F429I-DISC1 Discovry kit has 8 GPIO controllers. These controllers are responsible for pin muxing,
+input/output, pull-up, etc.
+
+For mode details please refer to `STM32F429I-DISC1 board User Manual`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+- UART_1_TX : PA9
+- UART_1_RX : PA10
+- UART_2_TX : PA2
+- UART_2_RX : PA3
+- USER_PB : PA0
+- LD3 : PG13
+- LD4 : PG12
+
+System Clock
+============
+
+The STM32F429I-DISC1 System Clock could be driven by an internal or external oscillator,
+as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 168MHz,
+driven by an 8MHz high speed external clock.
+
+Serial Port
+===========
+
+The STM32F429I-DISC1 Discovery kit has up to 8 UARTs. The Zephyr console output is assigned to UART1.
+The default communication settings are 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+The STM32F429I-DISC1 Discovery kit includes a ST-LINK/V2-B embedded debug tool interface.
+This interface is supported by the openocd version included in Zephyr SDK.
+
+Flashing an application to STM32F429I-DISC1
+-------------------------------------------
+
+The sample application :ref:`hello_world` is being used in this tutorial:
+
+.. code-block:: console
+
+   $<zephyr_root_path>/samples/hello_world
+
+To build the Zephyr kernel and application, enter:
+
+.. code-block:: console
+
+   $ cd <zephyr_root_path>
+   $ source zephyr-env.sh
+   $ cd $ZEPHYR_BASE/samples/hello_world/
+   $ make BOARD=stm32f429i_disc1
+
+Connect the STM32F429I-DISC1 Discovery kit to your host computer using the USB port.
+Then, enter the following command:
+
+.. code-block:: console
+
+   $ make BOARD=stm32f429i_disc1 flash
+
+Run a serial host program to connect with your board:
+
+.. code-block:: console
+
+   $ minicom -D /dev/ttyACM0
+
+Then, press the RESET button (The black one), you should see the following message:
+
+.. code-block:: console
+
+   Hello World! arm
+
+
+Debugging
+=========
+
+Access gdb with the following make command:
+
+.. code-block:: console
+
+   $ make BOARD=stm32f429i_disc1 debug
+
+
+.. _STM32F429I-DISC1 website:
+   http://www.st.com/en/evaluation-tools/32f429idiscovery.html
+
+.. _STM32F429I-DISC1 board User Manual:
+   http://www.st.com/web/en/resource/technical/document/user_manual/DM00097320.pdf
+
+.. _STM32F429ZI on www.st.com:
+   http://www.st.com/en/microcontrollers/stm32f429-439.html
+
+.. _STM32F429 Reference Manual:
+   http://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf

boards/arm/stm32f429i_disc1/pinmux.c

@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+
+#include <pinmux/stm32/pinmux_stm32.h>
+
+/* pin assignments for STM32F429I-DISC1 board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_1
+	{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
+	{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
+#endif  /* CONFIG_UART_STM32_PORT_1 */
+#ifdef CONFIG_UART_STM32_PORT_2
+	{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
+	{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
+#endif  /* CONFIG_UART_STM32_PORT_2 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

boards/arm/stm32f429i_disc1/stm32f429i_disc1.yaml

@@ -0,0 +1,7 @@
+identifier: stm32f429i_disc1
+name: STM32F429I_DISC1
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gccarmemb

boards/arm/stm32f429i_disc1/stm32f429i_disc1_defconfig

@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_BOARD_STM32F429I_DISC1=y
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F429XI=y
+# 168MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# Enable MPU
+CONFIG_STM32_ARM_MPU_ENABLE=y
+
+# enable USART1 - passthrough to STLINK v2 connector
+CONFIG_UART_STM32_PORT_1=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO ports A, B, C, and G
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32_PORTG=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# Clock configuration for Cube Clock control driver
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# produce 168MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=4
+CONFIG_CLOCK_STM32_APB2_PRESCALER=2

boards/arm/stm32f429i_disc1/support/openocd.cfg

@@ -0,0 +1,12 @@
+source [find board/st_nucleo_f4.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}

dts/arm/Makefile

@@ -47,5 +47,7 @@ dtb-$(CONFIG_BOARD_CC2650_SENSORTAG)	= 	cc2650_sensortag.dts_compiled
 dtb-$(CONFIG_BOARD_STM32_MIN_DEV)	=	stm32_min_dev.dts_compiled
 dtb-$(CONFIG_BOARD_STM32F3_DISCO)       =       stm32f3_disco.dts_compiled
 dtb-$(CONFIG_BOARD_OLIMEX_STM32_P405)	=	olimex_stm32_p405.dts_compiled
+dtb-$(CONFIG_BOARD_STM32F429I_DISC1)	=	stm32f429i_disc1.dts_compiled
+
 always	:= $(dtb-y)
 endif

dts/arm/st/stm32f429.dtsi

@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <st/stm32f407.dtsi>
+
+/ {
+	soc {
+		uart7: serial@40007800 {
+			compatible = "st,stm32-uart";
+			reg = <0x40007800 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
+			interrupts = <82 0>;
+			status = "disabled";
+			label = "UART_7";
+		};
+
+		uart8: serial@40007c00 {
+			compatible = "st,stm32-uart";
+			reg = <0x40007c00 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;
+			interrupts = <83 0>;
+			status = "disabled";
+			label = "UART_8";
+		};
+	};
+};

dts/arm/stm32f429i_disc1.dts

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/stm32f429.dtsi>
+
+/ {
+	model = "STMicroelectronics STM32F429I_DISC1 board";
+	compatible = "st,stm32f4discovery", "st,stm32f429";
+
+	chosen {
+		zephyr,console = &usart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&usart1 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart1_pins_a>;
+	pinctrl-names = "default";
+	status = "ok";
+};
+
+&usart2 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart2_pins_a>;
+	pinctrl-names = "default";
+	status = "ok";
+};

dts/arm/stm32f429i_disc1.fixup

@@ -0,0 +1,20 @@
+/* This file is a temporary workaround for mapping of the generated information
+ * to the current driver definitions.  This will be removed when the drivers
+ * are modified to handle the generated information, or the mapping of
+ * generated data matches the driver definitions.
+ */
+
+
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40011000_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40011000_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_1_IRQ_PRI	ST_STM32_USART_40011000_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_1_NAME		ST_STM32_USART_40011000_LABEL
+#define PORT_1_IRQ				ST_STM32_USART_40011000_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS	ST_STM32_USART_40004400_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_2_BAUD_RATE	ST_STM32_USART_40004400_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_2_IRQ_PRI	ST_STM32_USART_40004400_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_2_NAME		ST_STM32_USART_40004400_LABEL
+#define PORT_2_IRQ				ST_STM32_USART_40004400_IRQ_0