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qemu: nios2: Enable UART 16550 driver for QEMU

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Enable UART 16550 driver for Nios-II QEMU platform.

Note: This PR is tested with patched version Qemu 3.0.0 which
adds support for altera_10m50_zephyr machine type.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
This commit is contained in:
Ramakrishna Pallala 2018-09-14 14:25:04 +05:30 • committed by Anas Nashif
commit 6320043669
6 changed files with 43 additions and 5 deletions
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2
boards/nios2/qemu_nios2/board.h
View file

@ -7,4 +7,6 @@
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
#include <soc.h>
#endif /* __INC_BOARD_H */

12
boards/nios2/qemu_nios2/qemu_nios2.dts
View file

@ -7,17 +7,23 @@
compatible = "qemu,nios2";
aliases {
uart-0 = &uart0;
uart_0 = &jtag_uart;
uart_1 = &ns16550_uart;
};
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart0;
zephyr,console = &jtag_uart;
};
};
&uart0 {
&jtag_uart {
status = "ok";
current-speed = <115200>;
};
&ns16550_uart {
status = "ok";
current-speed = <115200>;
};

3
boards/nios2/qemu_nios2/qemu_nios2_defconfig
View file

@ -7,7 +7,8 @@ CONFIG_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_SERIAL=y
CONFIG_UART_ALTERA_JTAG=y
CONFIG_UART_NS16550=y
CONFIG_UART_NS16550_PORT_0=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_CONSOLE_ON_DEV_NAME="jtag_uart0"
CONFIG_INCLUDE_RESET_VECTOR=n
CONFIG_EXTRA_EXCEPTION_INFO=y

10
dts/nios2/nios2-qemu.dtsi
View file

@ -29,7 +29,7 @@
compatible = "simple-bus";
ranges;
uart0: uart@201000 {
jtag_uart: uart@201000 {
compatible = "altera,jtag-uart";
reg = <0x201000 0x400>;
label = "jtag_uart0";
@ -37,5 +37,13 @@
status = "disabled";
};
ns16550_uart: uart@440000 {
compatible = "ns16550";
reg = <0x440000 0x400>;
label = "UART_0";
status = "disabled";
};
};
};

4
soc/nios2/nios2-qemu/dts.fixup
View file

@ -1,3 +1,7 @@
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_440000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_440000_LABEL
#define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
#define _RAM_SIZE (CONFIG_SRAM_SIZE * 1024)

17
soc/nios2/nios2-qemu/soc.h Normal file
View file

@ -0,0 +1,17 @@
/*
* Copyright (c) 2018 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __SOC_H_
#define __SOC_H_
#include <system.h>
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR A_16550_UART_0_BASE
#define CONFIG_UART_NS16550_PORT_0_IRQ A_16550_UART_0_IRQ
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ A_16550_UART_0_FREQ
#endif