boards: arm: Add support for STM32F469I-DISCO
Add board configuration, dts and pinmux based on the stm32f4_disco board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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15 changed files with 419 additions and 0 deletions
10
boards/arm/stm32f469i_disco/Kconfig.board
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10
boards/arm/stm32f469i_disco/Kconfig.board
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# Kconfig - STM32F469I-DISCO board configuration
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#
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# Copyright (c) 2016 Linaro Limited.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_STM32F469I_DISCO
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bool "STM32F469I-DISCO Development Board"
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depends on SOC_STM32F469XI
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13
boards/arm/stm32f469i_disco/Kconfig.defconfig
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boards/arm/stm32f469i_disco/Kconfig.defconfig
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# Kconfig - STM32F469I-DISCO board configuration
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#
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# Copyright (c) 2016 Linaro Limited.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_STM32F469I_DISCO
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config BOARD
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default stm32f469i_disco
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endif # BOARD_STM32F469I_DISCO
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2
boards/arm/stm32f469i_disco/Makefile
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2
boards/arm/stm32f469i_disco/Makefile
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# No C files (yet)
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obj- += dummy.o
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7
boards/arm/stm32f469i_disco/Makefile.board
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7
boards/arm/stm32f469i_disco/Makefile.board
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FLASH_SCRIPT = openocd.sh
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DEBUG_SCRIPT = openocd.sh
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OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
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OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
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export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD
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38
boards/arm/stm32f469i_disco/board.h
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38
boards/arm/stm32f469i_disco/board.h
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/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/* USER push button */
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#define USER_PB_GPIO_PORT "GPIOA"
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#define USER_PB_GPIO_PIN 0
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/* LD1 green LED */
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#define LD1_GPIO_PORT "GPIOG"
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#define LD1_GPIO_PIN 6
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/* LD2 orange LED */
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#define LD2_GPIO_PORT "GPIOD"
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#define LD2_GPIO_PIN 4
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/* LD3 red LED */
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#define LD3_GPIO_PORT "GPIOD"
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#define LD3_GPIO_PIN 5
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/* LD4 blue LED */
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#define LD4_GPIO_PORT "GPIOK"
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#define LD4_GPIO_PIN 3
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/* Create aliases to make the basic samples work */
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#define SW0_GPIO_NAME USER_PB_GPIO_PORT
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#define SW0_GPIO_PIN USER_PB_GPIO_PIN
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#define LED0_GPIO_PORT LD1_GPIO_PORT
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#define LED0_GPIO_PIN LD1_GPIO_PIN
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#endif /* __INC_BOARD_H */
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BIN
boards/arm/stm32f469i_disco/doc/img/en.stm32f469i-disco.jpg
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BIN
boards/arm/stm32f469i_disco/doc/img/en.stm32f469i-disco.jpg
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Binary file not shown.
After Width: | Height: | Size: 218 KiB |
209
boards/arm/stm32f469i_disco/doc/stm32f469i_disco.rst
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209
boards/arm/stm32f469i_disco/doc/stm32f469i_disco.rst
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.. _stm32f469i_disco_board:
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ST STM32F469I Discovery
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#######################
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Overview
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********
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The STM32F469 Discovery kit features an ARM Cortex-M4 based STM32F469NI MCU
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with a wide range of connectivity support and configurations Here are
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some highlights of the STM32F469I-DISCO board:
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- STM32 microcontroller in BGA216 package
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- On-board ST-LINK/V2-1 debugger/programmer, supporting USB reenumeration capability
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- Flexible board power supply:
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- ST-LINK/V2-1 USB connector
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- User USB FS connector
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- VIN from Arduino™ compatible connectors
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- Four user LEDs
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- Two push-buttons: USER and RESET
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- USB OTG FS with micro-AB connector
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- 4-inch 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen
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- SAI Audio DAC, with a stereo headphone output jack
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- Three MEMS microphones
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- MicroSD card connector
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- I2C extension connector
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- 4Mx32bit SDRAM
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- 128-Mbit Quad-SPI NOR Flash
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- Expansion connectors and Arduino™ UNO V3 connectors
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.. image:: img/en.stm32f469i-disco.jpg
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:width: 457px
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:align: center
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:height: 551px
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:alt: STM32F469I-DISCO
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More information about the board can be found at the `32F469IDISCOVERY website`_.
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Hardware
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********
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STM32F469I-DISCO Discovery kit provides the following hardware components:
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- STM32F469NIH6 in BGA216 package
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- ARM®32-bit Cortex®-M4 CPU with FPU
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- 180 MHz max CPU frequency
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- VDD from 1.8 V to 3.6 V
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- 2 MB Flash
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- 384+4 KB SRAM including 64-Kbyte of core coupled memory
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- GPIO with external interrupt capability
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- LCD parallel interface, 8080/6800 modes
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- LCD TFT controller supporting up to XGA resolution
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- MIPI® DSI host controller supporting up to 720p 30Hz resolution
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- 3x12-bit ADC with 24 channels
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- 2x12-bit D/A converters
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- RTC
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- Advanced-control Timer
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- General Purpose Timers (17)
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- Watchdog Timers (2)
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- USART/UART (8)
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- I2C (3)
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- SPI (6)
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- 1xSAI (serial audio interface)
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- SDIO
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- 2xCAN
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- USB 2.0 OTG FS with on-chip PHY
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- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
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- 10/100 Ethernet MAC with dedicated DMA
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- 8- to 14-bit parallel camera
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- CRC calculation unit
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- True random number generator
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- DMA Controller
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More information about STM32F469NI can be found here:
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- `STM32F469NI on www.st.com`_
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- `STM32F469 reference manual`_
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Supported Features
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==================
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The Zephyr stm32f469i_disco board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on Zephyr porting.
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The default configuration can be found in the defconfig file:
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``boards/arm/stm32f469i_disco/stm32f469i_disco_defconfig``
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Pin Mapping
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===========
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STM32F469I-DISCO Discovry kit has 9 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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For mode details please refer to `32F469IDISCOVERY board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_3_TX : PB10
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- UART_3_RX : PB11
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- UART_6_TX : PG14
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- UART_6_RX : PG9
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- USER_PB : PA0
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- LD1 : PG6
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- LD2 : PD4
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- LD3 : PD5
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- LD4 : PK3
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System Clock
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============
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STM32F469I-DISCO System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at 180MHz,
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driven by 8MHz high speed external clock.
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Serial Port
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===========
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The STM32F469 Discovery kit has up to 8 UARTs. The Zephyr console output is assigned to UART3.
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Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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Flashing
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========
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STM32F469I-DISCO Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
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This interface is supported by the openocd version included in Zephyr SDK.
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Flashing an application to STM32F469I-DISCO
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-------------------------------------------
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The sample application :ref:`hello_world` is being used in this tutorial:
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.. code-block:: console
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$<zephyr_root_path>/samples/hello_world
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To build the Zephyr kernel and application, enter:
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.. code-block:: console
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$ cd <zephyr_root_path>
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$ source zephyr-env.sh
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$ cd $ZEPHYR_BASE/samples/hello_world/
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$ make BOARD=stm32f469i_disco
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Connect the STM32F469I-DISCO Discovery kit to your host computer using the USB port.
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Then, enter the following command:
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.. code-block:: console
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$ make BOARD=stm32f469i_disco flash
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Run a serial host program to connect with your board:
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.. code-block:: console
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$ minicom -D /dev/ttyACM0
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You should see the following message:
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.. code-block:: console
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Hello World! arm
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Debugging
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=========
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Access gdb with the following make command:
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.. code-block:: console
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$ make BOARD=stm32f469i_disco debug
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.. _32F469IDISCOVERY website:
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http://www.st.com/en/evaluation-tools/32f469idiscovery.html
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.. _32F469IDISCOVERY board User Manual:
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http://www.st.com/resource/en/user_manual/dm00218846.pdf
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.. _STM32F469NI on www.st.com:
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http://www.st.com/en/microcontrollers/stm32f469ni.html
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.. _STM32F469 reference manual:
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http://www.st.com/resource/en/reference_manual/dm00127514.pdf
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38
boards/arm/stm32f469i_disco/stm32f469i_disco_defconfig
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boards/arm/stm32f469i_disco/stm32f469i_disco_defconfig
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CONFIG_ARM=y
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CONFIG_BOARD_STM32F469I_DISCO=y
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F469XI=y
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# 180MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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# Enable MPU
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CONFIG_STM32_ARM_MPU_ENABLE=y
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# enable USART3 - passthrough to STLINK v2 connector
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CONFIG_UART_STM32_PORT_3=y
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# enable console on this port by default
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_3"
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# enable pinmux
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CONFIG_PINMUX=y
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# enable GPIO ports A, B, C
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CONFIG_GPIO=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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# Clock configuration for Cube Clock control driver
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# produce 180MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=360
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=4
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CONFIG_CLOCK_STM32_APB2_PRESCALER=2
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12
boards/arm/stm32f469i_disco/support/openocd.cfg
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boards/arm/stm32f469i_disco/support/openocd.cfg
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source [find board/st_nucleo_f4.cfg]
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$_TARGETNAME configure -event gdb-attach {
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echo "Debugger attaching: halting execution"
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reset halt
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gdb_breakpoint_override hard
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}
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$_TARGETNAME configure -event gdb-detach {
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echo "Debugger detaching: resuming execution"
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resume
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}
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@ -12,6 +12,7 @@ obj-$(CONFIG_BOARD_NUCLEO_F334R8) += stm32/pinmux_board_nucleo_f334r8.o
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obj-$(CONFIG_BOARD_STM32373C_EVAL) += stm32/pinmux_board_stm32373c_eval.o
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obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
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obj-$(CONFIG_BOARD_STM32F4_DISCO) += stm32/pinmux_board_stm32f4_disco.o
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obj-$(CONFIG_BOARD_STM32F469I_DISCO) += stm32/pinmux_board_stm32f469i_disco.o
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obj-$(CONFIG_BOARD_NUCLEO_F411RE) += stm32/pinmux_board_nucleo_f411re.o
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obj-$(CONFIG_BOARD_NUCLEO_F413ZH) += stm32/pinmux_board_nucleo_f413zh.o
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obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o
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38
drivers/pinmux/stm32/pinmux_board_stm32f469i_disco.c
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drivers/pinmux/stm32/pinmux_board_stm32f469i_disco.c
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/*
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* Copyright (c) 2016 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <pinmux.h>
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#include <sys_io.h>
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#include "pinmux/pinmux.h"
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#include "pinmux_stm32.h"
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/* pin assignments for STM32F469I-DISCO board */
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static const struct pin_config pinconf[] = {
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#ifdef CONFIG_UART_STM32_PORT_3
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{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX},
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{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX},
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#endif /* CONFIG_UART_STM32_PORT_3 */
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#ifdef CONFIG_UART_STM32_PORT_6
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{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX},
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{STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX},
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#endif /* CONFIG_UART_STM32_PORT_6 */
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};
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static int pinmux_stm32_init(struct device *port)
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{
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ARG_UNUSED(port);
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stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
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return 0;
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}
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SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
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CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
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@ -24,6 +24,7 @@ dtb-$(CONFIG_BOARD_STM32L496G_DISCO) = stm32l496g_disco.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F334R8) = nucleo_f334r8.dts_compiled
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dtb-$(CONFIG_BOARD_STM32373C_EVAL) = stm32373c_eval.dts_compiled
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dtb-$(CONFIG_BOARD_STM32F4_DISCO) = stm32f4_disco.dts_compiled
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dtb-$(CONFIG_BOARD_STM32F469I_DISCO) = stm32f469i_disco.dts_compiled
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dtb-$(CONFIG_BOARD_96B_NITROGEN) = 96b_nitrogen.dts_compiled
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dtb-$(CONFIG_BOARD_NRF52_PCA10040) = nrf52_pca10040.dts_compiled
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dtb-$(CONFIG_BOARD_NRF52_BLENANO2) = nrf52_blenano2.dts_compiled
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29
dts/arm/stm32f469i_disco.dts
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dts/arm/stm32f469i_disco.dts
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/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/stm32f469.dtsi>
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/ {
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model = "STMicroelectronics STM32F469I-DISCO board";
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compatible = "st,stm32f469i-disco", "st,stm32f469";
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chosen {
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zephyr,console = &usart3;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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};
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&usart3 {
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current-speed = <115200>;
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status = "ok";
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};
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&usart6 {
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current-speed = <115200>;
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status = "ok";
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};
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20
dts/arm/stm32f469i_disco.fixup
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20
dts/arm/stm32f469i_disco.fixup
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/* This file is a temporary workaround for mapping of the generated information
|
||||
* to the current driver definitions. This will be removed when the drivers
|
||||
* are modified to handle the generated information, or the mapping of
|
||||
* generated data matches the driver definitions.
|
||||
*/
|
||||
|
||||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL
|
||||
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY
|
||||
#define PORT_1_IRQ ST_STM32_USART_40004800_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_6_NAME ST_STM32_USART_40011400_LABEL
|
||||
#define CONFIG_UART_STM32_PORT_6_BASE_ADDRESS ST_STM32_USART_40011400_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_6_BAUD_RATE ST_STM32_USART_40011400_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_6_IRQ_PRI ST_STM32_USART_40011400_IRQ_0_PRIORITY
|
||||
#define PORT_6_IRQ ST_STM32_USART_40011400_IRQ_0
|
|
@ -9,6 +9,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
|
|||
sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
|
||||
cc3220sf_launchxl frdm_kl25z disco_l475_iot1 nucleo_l432kc
|
||||
nucleo_f413zh stm32l496g_disco stm32f4_disco 96b_carbon_nrf51
|
||||
stm32f469i_disco
|
||||
|
||||
supported_toolchains = zephyr gccarmemb
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue