michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arm: dts: st: Convert STM32F4 based boards to dts

Browse source 
Converted over all STM32F4 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F4.

Boards that are now using devicetree:
* 96b_carbon
* nucleo f401re
* nucleo f411re

Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-04-05 11:21:10 -05:00
commit 38cda7f813
15 changed files with 86 additions and 38 deletions
Download patch file Download diff file Expand all files Collapse all files

10
arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.series
View file

@ -12,10 +12,6 @@ source "arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.stm32f4*"
config SOC_SERIES
default stm32f4
config NUM_IRQ_PRIO_BITS
int
default 4
config SERIAL
def_bool y
@ -36,18 +32,12 @@ config UART_STM32_PORT_1
config UART_STM32_PORT_1_NAME
default UART_1
config UART_STM32_PORT_1_BAUD_RATE
default 115200
config UART_STM32_PORT_2
def_bool y
config UART_STM32_PORT_2_NAME
default UART_2
config UART_STM32_PORT_2_BAUD_RATE
default 115200
endif #SERIAL
if CLOCK_CONTROL

6
arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.stm32f401xe
View file

@ -11,12 +11,6 @@ config SOC
string
default stm32f401xe
config SRAM_SIZE
default 96
config FLASH_SIZE
default 512
config NUM_IRQS
int
default 85

6
arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.stm32f407xx
View file

@ -11,12 +11,6 @@ config SOC
string
default stm32f407xx
config SRAM_SIZE
default 192
config FLASH_SIZE
default 1024
config NUM_IRQS
int
default 82

6
arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.stm32f411xe
View file

@ -11,12 +11,6 @@ config SOC
string
default stm32f411xe
config SRAM_SIZE
default 128
config FLASH_SIZE
default 512
config NUM_IRQS
int
default 85

6
arch/arm/soc/st_stm32/stm32f4/Kconfig.defconfig.stm32f429xx
View file

@ -11,12 +11,6 @@ config SOC
string
default stm32f429xx
config SRAM_SIZE
default 256
config FLASH_SIZE
default 2048
config NUM_IRQS
int
default 91

4
boards/arm/96b_carbon/96b_carbon_defconfig
View file

@ -8,7 +8,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# enable USART1 - passthrough to FT230XQ
CONFIG_UART_STM32_PORT_1=y
CONFIG_UART_STM32_PORT_1_BAUD_RATE=115200
# enable console on this port by default
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
@ -33,3 +32,6 @@ CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR=7
CONFIG_CLOCK_STM32F4X_AHB_PRESCALER=0
CONFIG_CLOCK_STM32F4X_APB1_PRESCALER=2
CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0
#enable DTS
CONFIG_HAS_DTS=y

4
boards/arm/nucleo_f401re/nucleo_f401re_defconfig
View file

@ -8,7 +8,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# enable USART2 - passthrough to STLINK v2 connector
CONFIG_UART_STM32_PORT_2=y
CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
# enable console on this port by default
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
@ -39,3 +38,6 @@ CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0
CONFIG_PWM=y
CONFIG_PWM_STM32=y
CONFIG_PWM_STM32_2=y
#enable DTS
CONFIG_HAS_DTS=y

4
boards/arm/nucleo_f411re/nucleo_f411re_defconfig
View file

@ -8,7 +8,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
# enable USART2 - passthrough to STLINK v2 connector
CONFIG_UART_STM32_PORT_2=y
CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
# enable console on this port by default
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
@ -34,3 +33,6 @@ CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR=8
CONFIG_CLOCK_STM32F4X_AHB_PRESCALER=0
CONFIG_CLOCK_STM32F4X_APB1_PRESCALER=2
CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0
#enable DTS
CONFIG_HAS_DTS=y

5
dts/arm/96b_carbon.dts
View file

@ -22,3 +22,8 @@
baud-rate = <115200>;
status = "ok";
};
&usart2 {
baud-rate = <115200>;
status = "ok";
};

19
dts/arm/96b_carbon.fixup Normal file
View file

@ -0,0 +1,19 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40011000_BAUD_RATE
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define PORT_1_IRQ ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_BAUD_RATE
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0

4
dts/arm/Makefile
View file

@ -6,5 +6,9 @@ dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL) = cc3200_launchxl.dts_compiled
dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled
dtb-$(CONFIG_BOARD_V2M_BEETLE) = v2m_beetle.dts_compiled
dtb-$(CONFIG_BOARD_OLIMEXINO_STM32) = olimexino_stm32.dts_compiled
dtb-$(CONFIG_BOARD_96B_CARBON) = 96b_carbon.dts_compiled
dtb-$(CONFIG_BOARD_NUCLEO_F401RE) = nucleo_f401re.dts_compiled
dtb-$(CONFIG_BOARD_NUCLEO_F411RE) = nucleo_f411re.dts_compiled
always := $(dtb-y)
endif

5
dts/arm/nucleo_f401re.dts
View file

@ -18,6 +18,11 @@
};
};
&usart1 {
baud-rate = <115200>;
status = "ok";
};
&usart2 {
baud-rate = <115200>;
status = "ok";

19
dts/arm/nucleo_f401re.fixup Normal file
View file

@ -0,0 +1,19 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40011000_BAUD_RATE
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define PORT_1_IRQ ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_BAUD_RATE
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0

7
dts/arm/nucleo_f411re.dts
View file

@ -5,7 +5,7 @@
*/
/dts-v1/;
#include <st/stm32f401.dtsi>
#include <st/stm32f411.dtsi>
/ {
model = "STMicroelectronics STM32F411RE-NUCLEO board";
@ -18,6 +18,11 @@
};
};
&usart1 {
baud-rate = <115200>;
status = "ok";
};
&usart2 {
baud-rate = <115200>;
status = "ok";

19
dts/arm/nucleo_f411re.fixup Normal file
View file

@ -0,0 +1,19 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40011000_BAUD_RATE
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define PORT_1_IRQ ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_BAUD_RATE
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0