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scripts: extract_includes_dts: Remove usage of cell_string yaml attribute

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'cell_string' yaml attribute has been introduced in order to
help enforcement of specific string during defines generation.
This adds complexity in understanding script behavior as a black
box and create additional dependency which is not strictly required.

For node specific generation functions (pinctrl and interrupts),
this could be replaced directly by an hardcoded version
(as everyone used the same 'cell_string' anyway).
For extract_cells functions, string could be replaced by extracted
property name. As a consequence, we're now able to generate defines
for properties refering to these controllers via phandle.
For instance, in following node
 	spbtle-rf@0 {
 		compatible = "st,spbtle-rf";
 		reg = <0>;
		reset-gpios = <&gpioa 8 0>;
 	};
We'll be able to generate:
 #define ST_STM32_SPI_...LE_RF_0_RESET_GPIOS_CONTROLLER	"GPIOA"
 #define ST_STM32_SPI_...PBTLE_RF_0_RESET_GPIOS_FLAGS_0		0
 #define ST_STM32_SPI_..._SPBTLE_RF_0_RESET_GPIOS_PIN_0		8

Only impact for this whole change is for NXP clocks which were the
only ones using 'cell_string' attribute with a value different than
the default one.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-05-04 14:37:31 +02:00 • committed by Kumar Gala
commit 93d3a42776
23 changed files with 58 additions and 66 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/soc/nxp_imx/rt/dts.fixup
View file

@ -31,6 +31,6 @@
#define CONFIG_UART_MCUX_LPUART_1_IRQ_PRI NXP_KINETIS_LPUART_40184000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_1_BAUD_RATE NXP_KINETIS_LPUART_40184000_CURRENT_SPEED
#define CONFIG_UART_MCUX_LPUART_1_CLOCK_NAME NXP_IMX_CCM_400FC000_LABEL
#define CONFIG_UART_MCUX_LPUART_1_CLOCK_SUBSYS NXP_KINETIS_LPUART_40184000_CCM_CLK_NAME
#define CONFIG_UART_MCUX_LPUART_1_CLOCK_SUBSYS NXP_KINETIS_LPUART_40184000_CLOCK_NAME
/* End of SoC Level DTS fixup file */

12
arch/arm/soc/nxp_kinetis/k6x/dts.fixup
View file

@ -8,7 +8,7 @@
#define CONFIG_UART_MCUX_0_IRQ_STATUS NXP_KINETIS_UART_4006A000_IRQ_STATUS
#define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_0_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_CLOCK_NAME
#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_KINETIS_UART_4006B000_CURRENT_SPEED
#define CONFIG_UART_MCUX_1_NAME NXP_KINETIS_UART_4006B000_LABEL
@ -17,7 +17,7 @@
#define CONFIG_UART_MCUX_1_IRQ_STATUS NXP_KINETIS_UART_4006B000_IRQ_STATUS
#define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_1_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_CLOCK_NAME
#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_KINETIS_UART_4006C000_CURRENT_SPEED
#define CONFIG_UART_MCUX_2_NAME NXP_KINETIS_UART_4006C000_LABEL
@ -26,7 +26,7 @@
#define CONFIG_UART_MCUX_2_IRQ_STATUS NXP_KINETIS_UART_4006C000_IRQ_STATUS
#define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_2_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_CLOCK_NAME
#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_KINETIS_UART_4006D000_CURRENT_SPEED
#define CONFIG_UART_MCUX_3_NAME NXP_KINETIS_UART_4006D000_LABEL
@ -35,7 +35,7 @@
#define CONFIG_UART_MCUX_3_IRQ_STATUS NXP_KINETIS_UART_4006D000_IRQ_STATUS
#define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_3_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_CLOCK_NAME
#define CONFIG_UART_MCUX_4_BAUD_RATE NXP_KINETIS_UART_400EA000_CURRENT_SPEED
#define CONFIG_UART_MCUX_4_NAME NXP_KINETIS_UART_400EA000_LABEL
@ -44,7 +44,7 @@
#define CONFIG_UART_MCUX_4_IRQ_STATUS NXP_KINETIS_UART_400EA000_IRQ_STATUS
#define CONFIG_UART_MCUX_4_IRQ_STATUS_PRI NXP_KINETIS_UART_400EA000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_4_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_4_CLOCK_SUBSYS NXP_KINETIS_UART_400EA000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_4_CLOCK_SUBSYS NXP_KINETIS_UART_400EA000_CLOCK_NAME
#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED
#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL
@ -53,7 +53,7 @@
#define CONFIG_UART_MCUX_5_IRQ_STATUS NXP_KINETIS_UART_400EB000_IRQ_STATUS
#define CONFIG_UART_MCUX_5_IRQ_STATUS_PRI NXP_KINETIS_UART_400EB000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_5_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_5_CLOCK_SUBSYS NXP_KINETIS_UART_400EB000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_5_CLOCK_SUBSYS NXP_KINETIS_UART_400EB000_CLOCK_NAME
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0

2
arch/arm/soc/nxp_kinetis/kl2x/dts.fixup
View file

@ -2,7 +2,7 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_LPSCI_0_NAME NXP_KINETIS_LPSCI_4006A000_LABEL
#define CONFIG_UART_MCUX_LPSCI_0_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_LPSCI_0_CLOCK_SUBSYS NXP_KINETIS_LPSCI_4006A000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_LPSCI_0_CLOCK_SUBSYS NXP_KINETIS_LPSCI_4006A000_CLOCK_NAME
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0

10
arch/arm/soc/nxp_kinetis/kwx/dts.fixup
View file

@ -35,7 +35,7 @@
#define CONFIG_UART_MCUX_0_IRQ_STATUS NXP_KINETIS_UART_4006A000_IRQ_STATUS
#define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_0_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_CLOCK_NAME
#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_KINETIS_UART_4006B000_CURRENT_SPEED
#define CONFIG_UART_MCUX_1_NAME NXP_KINETIS_UART_4006B000_LABEL
@ -44,7 +44,7 @@
#define CONFIG_UART_MCUX_1_IRQ_STATUS NXP_KINETIS_UART_4006B000_IRQ_STATUS
#define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_1_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_CLOCK_NAME
#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_KINETIS_UART_4006C000_CURRENT_SPEED
#define CONFIG_UART_MCUX_2_NAME NXP_KINETIS_UART_4006C000_LABEL
@ -53,7 +53,7 @@
#define CONFIG_UART_MCUX_2_IRQ_STATUS NXP_KINETIS_UART_4006C000_IRQ_STATUS
#define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_2_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_CLOCK_NAME
#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_KINETIS_UART_4006D000_CURRENT_SPEED
#define CONFIG_UART_MCUX_3_NAME NXP_KINETIS_UART_4006D000_LABEL
@ -62,7 +62,7 @@
#define CONFIG_UART_MCUX_3_IRQ_STATUS NXP_KINETIS_UART_4006D000_IRQ_STATUS
#define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_3_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_CLOCK_NAME
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFL_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFL_40020000_LABEL
@ -76,7 +76,7 @@
#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL
#define CONFIG_UART_MCUX_LPUART_0_CLOCK_NAME NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_UART_MCUX_LPUART_0_CLOCK_SUBSYS NXP_KINETIS_LPUART_40054000_SIM_CLK_NAME
#define CONFIG_UART_MCUX_LPUART_0_CLOCK_SUBSYS NXP_KINETIS_LPUART_40054000_CLOCK_NAME
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFA_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFA_40020000_LABEL

2
dts/bindings/arm/nxp,kinetis-sim.yaml
View file

@ -30,8 +30,6 @@ properties:
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
cell_string: SIM_CLK
"#cells":
- name
- offset

2
dts/bindings/arm/nxp,kw41z-sim.yaml
View file

@ -18,8 +18,6 @@ properties:
generation: define
category: required
cell_string: SIM_CLK
"#cells":
- offset
- bits

2
dts/bindings/clock/nxp,imx-ccm.yaml
View file

@ -30,8 +30,6 @@ properties:
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
cell_string: CCM_CLK
"#cells":
- name
- offset

2
dts/bindings/clock/st,stm32-rcc.yaml
View file

@ -19,8 +19,6 @@ properties:
generation: define
category: required
cell_string: CLOCKS
"#cells":
- bus
- bits

1
dts/bindings/device_node.yaml.template
View file

@ -50,7 +50,6 @@ properties:
# If a node is a interrupt controller, gpio controller, pinmux device
# or any device which is referenced via phandle plus some number of cells
# then the cell fiels below must be present.
cell_string: <cell string prefix>
"#cells":
- cell0 # name of first cell

2
dts/bindings/gpio/nxp,imx-gpio.yaml
View file

@ -35,8 +35,6 @@ properties:
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
cell_string: GPIO
"#cells":
- pin
- flags

2
dts/bindings/gpio/nxp,kinetis-gpio.yaml
View file

@ -30,8 +30,6 @@ properties:
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
cell_string: GPIO
"#cells":
- pin
- flags

2
dts/bindings/gpio/st,stm32-gpio.yaml
View file

@ -42,8 +42,6 @@ properties:
description: Clock gate control information
generation: define
cell_string: GPIO
"#cells":
- pin
- flags

2
dts/bindings/interrupt-controller/arm,v6m-nvic.yaml
View file

@ -24,8 +24,6 @@ properties:
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- priority

2
dts/bindings/interrupt-controller/arm,v7m-nvic.yaml
View file

@ -24,8 +24,6 @@ properties:
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- priority

2
dts/bindings/interrupt-controller/arm,v8m-nvic.yaml
View file

@ -24,8 +24,6 @@ properties:
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- priority

2
dts/bindings/interrupt-controller/intel,ioapic.yaml
View file

@ -25,8 +25,6 @@ properties:
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- sense

2
dts/bindings/interrupt-controller/intel,mvic.yaml
View file

@ -25,8 +25,6 @@ properties:
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- sense

2
dts/bindings/interrupt-controller/snps,arcv2-intc.yaml
View file

@ -29,8 +29,6 @@ properties:
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- priority

2
dts/bindings/pinctrl/atmel,sam0-pinmux.yaml
View file

@ -25,8 +25,6 @@ properties:
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
cell_string: PINMUX
"#cells":
- pin
- function

2
dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml
View file

@ -24,8 +24,6 @@ properties:
generation: define
category: required
cell_string: PINMUX
"#cells":
- pin
- function

2
dts/bindings/pinctrl/st,stm32-pinmux.yaml
View file

@ -19,8 +19,6 @@ properties:
generation: define
category: required
cell_string: PINMUX
"#cells":
- pin
- function

2
dts/bindings/pinctrl/ti,cc2650-pinmux.yaml
View file

@ -19,8 +19,6 @@ properties:
generation: define
category: required
cell_string: PINMUX
"#cells":
- pin
- function

63
scripts/dts/extract_dts_includes.py
View file

@ -92,8 +92,7 @@ def extract_interrupts(node_address, yaml, prop, names, defs, def_label):
name = []
cell_yaml = yaml[get_compat(irq_parent)]
l_cell_prefix = [yaml[get_compat(irq_parent)].get(
'cell_string', []).upper()]
l_cell_prefix = ['IRQ']
for i in range(reduced[irq_parent]['props']['#interrupt-cells']):
l_cell_name = [cell_yaml['#cells'][i].upper()]
@ -188,7 +187,7 @@ def extract_reg_prop(node_address, names, defs, def_label, div, post_label):
index += 1
def extract_controller(node_address, prop, prop_values, index, defs, def_label):
def extract_controller(node_address, yaml, prop, prop_values, index, defs, def_label, generic):
prop_def = {}
prop_alias = {}
@ -220,9 +219,18 @@ def extract_controller(node_address, prop, prop_values, index, defs, def_label):
else:
l_idx = [str(index)]
for k in reduced[cell_parent]['props']:
if 'controller' in k:
l_cellname = convert_string_to_label(str(k))
# Check node generation requirements
try:
generation = yaml[get_compat(node_address)]['properties'][prop][
'generation']
except:
generation = ''
if 'use-prop-name' in generation:
l_cellname = convert_string_to_label(prop + '_' + 'controller')
else:
l_cellname = convert_string_to_label(generic + '_' + 'controller')
label = l_base + [l_cellname] + l_idx
prop_def['_'.join(label)] = "\"" + l_cell + "\""
@ -247,7 +255,7 @@ def extract_controller(node_address, prop, prop_values, index, defs, def_label):
def extract_cells(node_address, yaml, prop, prop_values, names, index, defs,
def_label):
def_label, generic):
cell_parent = phandles[prop_values.pop(0)]
@ -267,9 +275,17 @@ def extract_cells(node_address, yaml, prop, prop_values, names, index, defs,
for k in reduced[cell_parent]['props'].keys():
if k[0] == '#' and '-cells' in k:
num_cells = reduced[cell_parent]['props'].get(k)
try:
generation = yaml[get_compat(node_address)]['properties'][prop][
'generation']
except:
generation = ''
if 'use-prop-name' in generation:
l_cell = [convert_string_to_label(str(prop))]
else:
l_cell = [convert_string_to_label(str(generic))]
# Generate label for each field of the property element
l_cell = [str(cell_yaml.get('cell_string', ''))]
l_base = def_label.split('/')
# Check if #define should be indexed (_0, _1, ...)
if index == 0 and len(prop_values) < (num_cells + 2):
@ -306,12 +322,14 @@ def extract_cells(node_address, yaml, prop, prop_values, names, index, defs,
# recurse if we have anything left
if len(prop_values):
extract_cells(node_address, yaml, prop, prop_values, names,
index + 1, defs, def_label)
index + 1, defs, def_label, generic)
def extract_pinctrl(node_address, yaml, pinconf, names, index, defs,
def extract_pinctrl(node_address, yaml, prop, names, index, defs,
def_label):
pinconf = reduced[node_address]['props'][prop]
prop_list = []
if not isinstance(pinconf, list):
prop_list.append(pinconf)
@ -325,7 +343,7 @@ def extract_pinctrl(node_address, yaml, pinconf, names, index, defs,
pin_node_address = phandles[p]
pin_subnode = '/'.join(pin_node_address.split('/')[-1:])
cell_yaml = yaml[get_compat(pin_node_address)]
cell_prefix = cell_yaml.get('cell_string', None)
cell_prefix = 'PINMUX'
post_fix = []
if cell_prefix is not None:
@ -458,19 +476,28 @@ def extract_property(node_compat, yaml, node_address, prop, prop_val, names,
extract_interrupts(node_address, yaml, prop, names, defs, def_label)
elif 'pinctrl-' in prop:
p_index = int(prop.split('-')[1])
extract_pinctrl(node_address, yaml,
reduced[node_address]['props'][prop],
extract_pinctrl(node_address, yaml, prop,
names[p_index], p_index, defs, def_label)
elif 'clocks' in prop or 'gpios' in prop:
elif 'clocks' in prop:
try:
prop_values = list(reduced[node_address]['props'].get(prop))
except:
prop_values = reduced[node_address]['props'].get(prop)
extract_controller(node_address, prop, prop_values, 0, defs,
def_label)
extract_controller(node_address, yaml, prop, prop_values, 0, defs,
def_label, 'clock')
extract_cells(node_address, yaml, prop, prop_values,
names, 0, defs, def_label)
names, 0, defs, def_label, 'clock')
elif 'gpios' in prop:
try:
prop_values = list(reduced[node_address]['props'].get(prop))
except:
prop_values = reduced[node_address]['props'].get(prop)
extract_controller(node_address, yaml, prop, prop_values, 0, defs,
def_label, 'gpio')
extract_cells(node_address, yaml, prop, prop_values,
names, 0, defs, def_label, 'gpio')
else:
extract_single(node_address, yaml,
reduced[node_address]['props'][prop], prop,