board: Add support for board disco_l475_iot1
This commit provides support for disco_l475_iot1 board Pinmux driver is provided with initial support definitions Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
parent
ed70ea7108
commit
2e20577554
13 changed files with 564 additions and 1 deletions
10
boards/arm/disco_l475_iot1/Kconfig.board
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10
boards/arm/disco_l475_iot1/Kconfig.board
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# Kconfig - Discovery IoT L475 board configuration
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#
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# Copyright (c) 2017 Linaro Limited
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_DISCO_L475_IOT1
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bool "Discovery IoT L475 Development Board"
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depends on SOC_STM32L475XG
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90
boards/arm/disco_l475_iot1/Kconfig.defconfig
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boards/arm/disco_l475_iot1/Kconfig.defconfig
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# Kconfig - Discovery IoT L475 board configuration
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#
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# Copyright (c) 2017 Linaro Limited
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_DISCO_L475_IOT1
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config BOARD
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default disco_l475_iot1
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if GPIO
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config GPIO_STM32_PORTA
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def_bool y
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config GPIO_STM32_PORTB
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def_bool y
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config GPIO_STM32_PORTC
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def_bool y
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config GPIO_STM32_PORTD
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def_bool n
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config GPIO_STM32_PORTE
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def_bool n
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config GPIO_STM32_PORTF
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def_bool n
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config GPIO_STM32_PORTG
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def_bool n
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config GPIO_STM32_PORTH
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def_bool n
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endif # GPIO
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if SERIAL
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config UART_STM32_PORT_1
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def_bool y
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endif # SERIAL
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if I2C
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config I2C_1
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def_bool n
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config I2C_2
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def_bool y
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if I2C_1
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config I2C_1_DEFAULT_CFG
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default 0x14
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config I2C_1_IRQ_PRI
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default 0
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endif # I2C_1
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if I2C_2
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config I2C_2_DEFAULT_CFG
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default 0x14
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config I2C_2_IRQ_PRI
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default 0
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endif # I2C_2
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endif # I2C
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if PWM
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config PWM_STM32_1
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def_bool n
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config PWM_STM32_2
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def_bool y
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endif # PWM
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endif # BOARD_DISCO_L475_IOT1
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2
boards/arm/disco_l475_iot1/Makefile
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2
boards/arm/disco_l475_iot1/Makefile
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# No C files (yet)
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obj- += dummy.o
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41
boards/arm/disco_l475_iot1/board.h
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boards/arm/disco_l475_iot1/board.h
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/*
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/* USER push button */
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#define USER_PB_GPIO_PORT "GPIOC"
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#define USER_PB_GPIO_PIN 13
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/* LD1 green LED */
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#define LD1_GPIO_PORT "GPIOA"
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#define LD1_GPIO_PIN 5
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/* LD2 green LED */
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#define LD2_GPIO_PORT "GPIOB"
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#define LD2_GPIO_PIN 14
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/* LD3 & LD4 are mounted on PC_9 */
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/* PC_9 output: 1: LD2 off, LD3 on */
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/* PC_9 output: 0: LD2 on, LD3 off */
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/* PC_9 input: LD3 off, LD3 off */
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/* LD3 yelllow: Wifi activity */
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#define LD3_GPIO_PORT "GPIOC"
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#define LD3_GPIO_PIN 9
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/* LD4 blue: BT activity */
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#define LD4_GPIO_PORT "GPIOC"
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#define LD4_GPIO_PIN 9
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/* Create aliases to make the basic samples work */
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#define SW0_GPIO_NAME USER_PB_GPIO_PORT
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#define SW0_GPIO_PIN USER_PB_GPIO_PIN
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#define LED0_GPIO_PORT LD2_GPIO_PORT
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#define LED0_GPIO_PIN LD2_GPIO_PIN
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#endif /* __INC_BOARD_H */
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53
boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig
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53
boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig
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CONFIG_ARM=y
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CONFIG_BOARD_DISCO_L475_IOT1=y
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L475XG=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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#enable DTS
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CONFIG_HAS_DTS=y
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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# enable pinmux
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# enable GPIOs
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL_STM32_CUBE=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
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# produce 80MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=1
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
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#enable pwm
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CONFIG_PWM=y
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CONFIG_PWM_STM32=y
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#enable I2C
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CONFIG_I2C=y
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CONFIG_I2C_STM32LX=y
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245
boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst
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245
boards/arm/disco_l475_iot1/doc/disco_l475_iot1.rst
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.. _disco_l475_iot1_board:
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ST Disco L475 IOT01
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###################
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Overview
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********
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The B-L475E-IOT01A Discovery kit for IoT node allows users to develop
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applications with direct connection to cloud servers.
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The Discovery kit enables a wide diversity of applications by exploiting
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low-power communication, multiway sensing and ARM® Cortex® -M4 core-based
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STM32L4 Series features.
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This kit provides:
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- 64-Mbit Quad-SPI (Macronix) Flash memory
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- Bluetooth® V4.1 module (SPBTLE-RF)
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- Sub-GHz (868 or 915 MHz) low-power-programmable RF module (SPSGRF-868 or SPSGRF-915)
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- Wi-Fi® module Inventek ISM43362-M3G-L44 (802.11 b/g/n compliant)
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- Dynamic NFC tag based on M24SR with its printed NFC antenna
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- 2 digital omni-directional microphones (MP34DT01)
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- Capacitive digital sensor for relative humidity and temperature (HTS221)
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- High-performance 3-axis magnetometer (LIS3MDL)
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- 3D accelerometer and 3D gyroscope (LSM6DSL)
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- 260-1260 hPa absolute digital output barometer (LPS22HB)
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- Time-of-Flight and gesture-detection sensor (VL53L0X)
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- 2 push-buttons (user and reset)
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- USB OTG FS with Micro-AB connector
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- Expansion connectors:
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- Arduino™ Uno V3
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- PMOD
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- Flexible power-supply options:
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- ST LINK USB VBUS or external sources
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- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability:
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- mass storage, virtual COM port and debug port
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.. image:: img/disco_l475_iot1.jpg
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:width: 531px
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:align: center
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:height: 354px
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:alt: Disco L475 IoT1
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More information about the board can be found at the `Disco L475 IoT1 website`_.
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Hardware
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********
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The STM32L475RG SoC provides the following hardware IPs:
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- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 μA/MHz run mode)
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- Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
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- Clock Sources:
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- 4 to 48 MHz crystal oscillator
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 16 MHz factory-trimmed RC (±1%)
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- Internal low-power 32 kHz RC (±5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
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- 3 PLLs for system clock, USB, audio, ADC
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- RTC with HW calendar, alarms and calibration
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- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
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- 16x timers:
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- 2x 16-bit advanced motor-control
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- 2x 32-bit and 5x 16-bit general purpose
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- 2x 16-bit basic
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- 2x low-power 16-bit timers (available in Stop mode)
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- 2x watchdogs
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- SysTick timer
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- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
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- Memories
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- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
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- Up to 128 KB of SRAM including 32 KB with hardware parity check
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- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
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- Quad SPI memory interface
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- 4x digital filters for sigma delta modulator
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- Rich analog peripherals (independent supply)
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- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 μA/MSPS
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- 2x 12-bit DAC, low-power sample and hold
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- 2x operational amplifiers with built-in PGA
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- 2x ultra-low-power comparators
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- 18x communication interfaces
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- USB OTG 2.0 full-speed, LPM and BCD
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- 2x SAIs (serial audio interface)
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- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
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- 6x USARTs (ISO 7816, LIN, IrDA, modem)
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- 3x SPIs (4x SPIs with the Quad SPI)
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- CAN (2.0B Active) and SDMMC interface
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- SWPMI single wire protocol master I/F
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- 14-channel DMA controller
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- True random number generator
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- CRC calculation unit, 96-bit unique ID
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
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More information about STM32L476RG can be found here:
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- `STM32L475RG on www.st.com`_
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- `STM32L475 reference manual`_
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Supported Features
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==================
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The Zephyr Disco L475 IoT board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig file:
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``boards/arm/disco_l475_iot1/disco_l475_iot1_defconfig``
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Connections and IOs
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===================
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Disco L475 IoT Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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Available pins:
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---------------
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For detailed information about available pins please refer to `STM32 Disco L475 IoT1 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_1_TX : PB6
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- UART_1_RX : PB7
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- UART_2_TX : PA2
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- UART_2_RX : PA3
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- I2C_1_SCL : PB8
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- I2C_1_SDA : PB9
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- I2C_2_SCL : PB10
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- I2C_2_SDA : PB11
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- SPI_1_SCK : PA5
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- SPI_1_MISO : PA6
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- SPI_1_MOSI : PA7
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- PWM_2_CH1 : PA15
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- USER_PB : PC13
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- LD2 : PA5
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System Clock
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------------
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Disco L475 IoT System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
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driven by 16MHz high speed internal oscillator.
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Serial Port
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-----------
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Disco L475 IoT board has 6 U(S)ARTs. The Zephyr console output is assigned to UART1.
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Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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Flashing
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========
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Disco L475 IoT board includes an ST-LINK/V2-1 embedded debug tool interface.
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This interface is not supported by the openocd version 0.9 included by the Zephyr SDK v0.9.
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Until we update the Zephyr SDK, use openocd v0.10.0 from the openocd-stm32 project on GitHub
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to get the minimum set of scripts needed to flash and debug STM32 development boards.
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.. code-block:: console
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$ git clone https://github.com/erwango/openocd-stm32.git
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Then follow instructions in README.md
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Flashing an application to Disco L475 IoT
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-----------------------------------------
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The sample application :ref:`hello_world` is being used in this tutorial:
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To build the Zephyr kernel and application, enter:
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.. code-block:: console
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$ cd <zephyr_root_path>
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$ source zephyr-env.sh
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$ cd $ZEPHYR_BASE/samples/hello_world/
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$ make BOARD=disco_l475_iot1
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Connect the Disco L475 IoT to your host computer using the USB port.
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Then, enter the following command:
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.. code-block:: console
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$ cd <openocd-stm32_path>
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$ stm32_flsh l4 $ZEPHYR_BASE/samples/hello_world/outdir/disco_l475_iot1/zephyr.bin
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Run a serial host program to connect with your Nucleo board.
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.. code-block:: console
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$ minicom -D /dev/ttyACM0
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You should see the following message:
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.. code-block:: console
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$ Hello World! arm
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Debugging
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=========
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Access gdb with the following make command:
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.. code-block:: console
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$ cd <openocd-stm32_path>
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$ stm32_dbg l4 $ZEPHYR_BASE/samples/hello_world/outdir/disco_l475_iot1/zephyr.elf
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.. _Disco L475 IoT1 website:
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http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/b-l475e-iot01a.html
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.. _STM32 Disco L475 IoT1 board User Manual:
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http://www.st.com/resource/en/user_manual/dm00347848.pdf
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.. _STM32L475RG on www.st.com:
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http://www.st.com/en/microcontrollers/stm32l475rg.html
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.. _STM32L475 reference manual:
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http://www.st.com/resource/en/reference_manual/DM00031020.pdf
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BIN
boards/arm/disco_l475_iot1/doc/img/disco_l475_iot1.jpg
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BIN
boards/arm/disco_l475_iot1/doc/img/disco_l475_iot1.jpg
Normal file
Binary file not shown.
After Width: | Height: | Size: 1.4 MiB |
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@ -14,6 +14,7 @@ obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
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obj-$(CONFIG_BOARD_NUCLEO_F411RE) += stm32/pinmux_board_nucleo_f411re.o
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obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o
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obj-$(CONFIG_BOARD_NUCLEO_L476RG) += stm32/pinmux_board_nucleo_l476rg.o
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obj-$(CONFIG_BOARD_DISCO_L475_IOT1) += stm32/pinmux_board_disco_l475_iot1.o
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obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o
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obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o
|
||||
obj-$(CONFIG_PINMUX_QMSI) += pinmux_qmsi.o
|
||||
|
|
64
drivers/pinmux/stm32/pinmux_board_disco_l475_iot1.c
Normal file
64
drivers/pinmux/stm32/pinmux_board_disco_l475_iot1.c
Normal file
|
@ -0,0 +1,64 @@
|
|||
/*
|
||||
* Copyright (c) 2017 Linaro Limited
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <kernel.h>
|
||||
#include <device.h>
|
||||
#include <init.h>
|
||||
#include <pinmux.h>
|
||||
#include <sys_io.h>
|
||||
#include "pinmux/pinmux.h"
|
||||
|
||||
#include "pinmux_stm32.h"
|
||||
|
||||
/* pin assignments for Disco L475 IOT1 board */
|
||||
static const struct pin_config pinconf[] = {
|
||||
#ifdef CONFIG_UART_STM32_PORT_1
|
||||
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX},
|
||||
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_USART1_RX},
|
||||
#endif /* CONFIG_UART_STM32_PORT_1 */
|
||||
#ifdef CONFIG_I2C_1
|
||||
{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
|
||||
{STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA},
|
||||
#endif /* CONFIG_I2C_1 */
|
||||
#ifdef CONFIG_I2C_2
|
||||
/* I2C2 is used for NFC, STSAFE, ToF & MEMS sensors */
|
||||
{STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL},
|
||||
{STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA},
|
||||
#endif /* CONFIG_I2C_2 */
|
||||
#ifdef CONFIG_SPI_1
|
||||
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_3
|
||||
/* SPI3 is used for BT/WIFI, Sub GHZ communication */
|
||||
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
|
||||
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
|
||||
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
|
||||
#endif /* CONFIG_SPI_3 */
|
||||
#ifdef CONFIG_PWM_STM32_2
|
||||
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_PWM2_CH1},
|
||||
#endif /* CONFIG_PWM_STM32_2 */
|
||||
#ifdef CONFIG_USB_STM32
|
||||
{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_OTG_5V_VBUS},
|
||||
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_OTG_FS_ID},
|
||||
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_OTG_FS_DM},
|
||||
{STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_OTG_FS_DP},
|
||||
#endif /* CONFIG_USB_STM32 */
|
||||
|
||||
};
|
||||
|
||||
static int pinmux_stm32_init(struct device *port)
|
||||
{
|
||||
ARG_UNUSED(port);
|
||||
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
|
||||
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
|
@ -1,4 +1,5 @@
|
|||
ifeq ($(CONFIG_HAS_DTS),y)
|
||||
dtb-$(CONFIG_BOARD_DISCO_L475_IOT1) = disco_l475_iot1.dts_compiled
|
||||
dtb-$(CONFIG_BOARD_FRDM_K64F) = frdm_k64f.dts_compiled
|
||||
dtb-$(CONFIG_BOARD_FRDM_KW41Z) = frdm_kw41z.dts_compiled
|
||||
dtb-$(CONFIG_BOARD_FRDM_KL25Z) = frdm_kl25z.dts_compiled
|
||||
|
|
24
dts/arm/disco_l475_iot1.dts
Normal file
24
dts/arm/disco_l475_iot1.dts
Normal file
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* Copyright (c) 2017 Linaro Limited
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <st/stm32l475.dtsi>
|
||||
|
||||
/ {
|
||||
model = "STMicroelectronics B-L475E-IOT01Ax board";
|
||||
compatible = "st,stm32l475-disco-iot", "st,stm32l475";
|
||||
|
||||
chosen {
|
||||
zephyr,console = &usart1;
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,flash = &flash0;
|
||||
};
|
||||
};
|
||||
|
||||
&usart1 {
|
||||
current-speed = <115200>;
|
||||
status = "ok";
|
||||
};
|
32
dts/arm/disco_l475_iot1.fixup
Normal file
32
dts/arm/disco_l475_iot1.fixup
Normal file
|
@ -0,0 +1,32 @@
|
|||
/* This file is a temporary workaround for mapping of the generated information
|
||||
* to the current driver definitions. This will be removed when the drivers
|
||||
* are modified to handle the generated information, or the mapping of
|
||||
* generated data matches the driver definitions.
|
||||
*/
|
||||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
|
||||
#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
|
||||
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY
|
||||
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY
|
||||
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0
|
||||
|
||||
#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS
|
||||
#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED
|
||||
#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY
|
||||
#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0
|
|
@ -7,7 +7,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
|
|||
v2m_beetle nucleo_l476rg nrf52840_pca10056 nucleo_f411re
|
||||
stm3210c_eval nucleo_f334r8 stm32373c_eval mps2_an385 frdm_kw41z
|
||||
sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
|
||||
cc3220sf_launchxl frdm_kl25z
|
||||
cc3220sf_launchxl frdm_kl25z disco_l475_iot1
|
||||
|
||||
supported_toolchains = zephyr gccarmemb
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue