dts: arm: Drop arm,nvic compatible
Recommend to drop the generic arm,nvic and just use arm,v{6,7,8}m-nvic. Remove the yaml and switch to using arm,v6m-nvic or arm,v7m-nvic in the various places. Change-Id: Ide55d558d38ab247ee6d9a8d3d0a7f21b9c859bd Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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10 changed files with 9 additions and 41 deletions
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@ -9,7 +9,7 @@
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ranges;
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nvic: interrupt-controller@e000e100 {
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compatible = "arm,nvic";
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compatible = "arm,v6m-nvic";
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reg = <0xe000e100 0xc00>;
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interrupt-controller;
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#interrupt-cells = <2>;
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@ -9,7 +9,7 @@
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ranges;
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nvic: interrupt-controller@e000e100 {
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compatible = "arm,nvic";
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compatible = "arm,v7m-nvic";
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reg = <0xe000e100 0xc00>;
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interrupt-controller;
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#interrupt-cells = <2>;
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@ -1 +1 @@
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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@ -1,4 +1,4 @@
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_K64F_UART_4006A000_BAUD_RATE
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#define CONFIG_UART_MCUX_0_IRQ_PRI NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
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@ -1,4 +1,4 @@
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KW41Z_LPUART_40054000_BAUD_RATE
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#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KW41Z_LPUART_40054000_IRQ_0_PRIORITY
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@ -1,4 +1,4 @@
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_K64F_UART_4006A000_BAUD_RATE
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#define CONFIG_UART_MCUX_0_IRQ_PRI NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
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@ -4,7 +4,7 @@
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* generated data matches the driver definitions.
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*/
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
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#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_BAUD_RATE
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@ -5,7 +5,7 @@
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*/
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
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#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_BAUD_RATE
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@ -1,4 +1,4 @@
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CMSDK_APB_UART_0_IRQ ARM_CMSDK_UART_40004000_IRQ_0
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#define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
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@ -1,32 +0,0 @@
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---
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title: ARM Cortex-M NVIC Interrupt Controller
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version: 0.1
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description: >
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This binding describes the ARM Cortex-M NVIC IRQ controller
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properties:
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- compatible:
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category: required
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type: string
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description: compatible strings
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constraint: "arm,nvic"
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- reg:
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category: required
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type: int
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description: mmio register space
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generation: define
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- arm,num-irq-priority-bits:
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category: required
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type: int
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description: number of bits of IRQ priorities
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generation: define
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cell_string: IRQ
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"#cells":
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- irq
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- priority
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...
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