dts: arm: Drop arm,nvic compatible

Recommend to drop the generic arm,nvic and just use arm,v{6,7,8}m-nvic.
Remove the yaml and switch to using arm,v6m-nvic or arm,v7m-nvic in the
various places.

Change-Id: Ide55d558d38ab247ee6d9a8d3d0a7f21b9c859bd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-04-03 15:53:04 -05:00
commit 22d84c6f95
10 changed files with 9 additions and 41 deletions

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@ -9,7 +9,7 @@
ranges;
nvic: interrupt-controller@e000e100 {
compatible = "arm,nvic";
compatible = "arm,v6m-nvic";
reg = <0xe000e100 0xc00>;
interrupt-controller;
#interrupt-cells = <2>;

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@ -9,7 +9,7 @@
ranges;
nvic: interrupt-controller@e000e100 {
compatible = "arm,nvic";
compatible = "arm,v7m-nvic";
reg = <0xe000e100 0xc00>;
interrupt-controller;
#interrupt-cells = <2>;

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@ -1 +1 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS

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@ -1,4 +1,4 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_K64F_UART_4006A000_BAUD_RATE
#define CONFIG_UART_MCUX_0_IRQ_PRI NXP_K64F_UART_4006A000_IRQ_0_PRIORITY

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@ -1,4 +1,4 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KW41Z_LPUART_40054000_BAUD_RATE
#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KW41Z_LPUART_40054000_IRQ_0_PRIORITY

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@ -1,4 +1,4 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_K64F_UART_4006A000_BAUD_RATE
#define CONFIG_UART_MCUX_0_IRQ_PRI NXP_K64F_UART_4006A000_IRQ_0_PRIORITY

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@ -4,7 +4,7 @@
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_BAUD_RATE

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@ -5,7 +5,7 @@
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_BAUD_RATE

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@ -1,4 +1,4 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CMSDK_APB_UART_0_IRQ ARM_CMSDK_UART_40004000_IRQ_0
#define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY

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@ -1,32 +0,0 @@
---
title: ARM Cortex-M NVIC Interrupt Controller
version: 0.1
description: >
This binding describes the ARM Cortex-M NVIC IRQ controller
properties:
- compatible:
category: required
type: string
description: compatible strings
constraint: "arm,nvic"
- reg:
category: required
type: int
description: mmio register space
generation: define
- arm,num-irq-priority-bits:
category: required
type: int
description: number of bits of IRQ priorities
generation: define
cell_string: IRQ
"#cells":
- irq
- priority
...