serial: add a serial driver for the SAM0 family.
Signed-off-by: Michael Hope <mlhx@google.com>
This commit is contained in:
Anas Nashif
parent
54c6fbdca7
commit
b85b676ba9
5 changed files with 344 additions and 0 deletions
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@ -15,5 +15,6 @@ zephyr_sources_if_kconfig(uart_sam.c)
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zephyr_sources_if_kconfig(usart_sam.c)
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zephyr_sources_if_kconfig(uart_stellaris.c)
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zephyr_sources_if_kconfig(uart_stm32.c)
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zephyr_sources_if_kconfig(uart_sam0.c)
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zephyr_sources_ifdef(CONFIG_USERSPACE uart_handlers.c)
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@ -101,4 +101,6 @@ source "drivers/serial/Kconfig.gecko"
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source "drivers/serial/Kconfig.msp432p4xx"
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source "drivers/serial/Kconfig.sam0"
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endif
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13
drivers/serial/Kconfig.sam0
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13
drivers/serial/Kconfig.sam0
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@ -0,0 +1,13 @@
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# Kconfig - Atmel SAM SERCOM configuration options
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#
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# Copyright (c) 2017 Google LLC.
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# SPDX-License-Identifier: Apache-2.0
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menuconfig UART_SAM0
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bool "Atmel SAM0 series SERCOM USART driver"
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depends on SOC_FAMILY_SAM0
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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default n
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help
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This option enables the SERCOMx USART driver for Atmel SAM0 MCUs.
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298
drivers/serial/uart_sam0.c
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298
drivers/serial/uart_sam0.c
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@ -0,0 +1,298 @@
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/*
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* Copyright (c) 2017 Google LLC.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <device.h>
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#include <errno.h>
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#include <init.h>
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#include <misc/__assert.h>
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#include <soc.h>
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#include <uart.h>
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/* Device constant configuration parameters */
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struct uart_sam0_dev_cfg {
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SercomUsart *regs;
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u32_t baudrate;
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u32_t ctrla;
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u32_t pm_apbcmask;
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u16_t gclk_clkctrl_id;
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struct soc_gpio_pin pin_rx;
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struct soc_gpio_pin pin_tx;
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#if CONFIG_UART_INTERRUPT_DRIVEN
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void (*irq_config_func)(struct device *dev);
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#endif
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};
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/* Device run time data */
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struct uart_sam0_dev_data {
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_t cb;
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#endif
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};
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#define DEV_CFG(dev) \
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((const struct uart_sam0_dev_cfg *const)(dev)->config->config_info)
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#define DEV_DATA(dev) ((struct uart_sam0_dev_data * const)(dev)->driver_data)
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static void wait_synchronization(SercomUsart *const usart)
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{
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while ((usart->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_MASK) != 0) {
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}
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}
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static int uart_sam0_set_baudrate(SercomUsart *const usart, u32_t baudrate,
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u32_t clk_freq_hz)
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{
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u64_t tmp;
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u16_t baud;
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tmp = (u64_t)baudrate << 20;
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tmp = (tmp + (clk_freq_hz >> 1)) / clk_freq_hz;
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/* Verify that the calculated result is within range */
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if (tmp < 1 || tmp > UINT16_MAX) {
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return -ERANGE;
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}
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baud = 65536 - (u16_t)tmp;
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usart->BAUD.reg = baud;
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wait_synchronization(usart);
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return 0;
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}
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static int uart_sam0_init(struct device *dev)
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{
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int retval;
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const struct uart_sam0_dev_cfg *const cfg = DEV_CFG(dev);
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SercomUsart *const usart = cfg->regs;
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/* Enable the GCLK */
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GCLK->CLKCTRL.reg =
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cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
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/* Enable SERCOM clock in PM */
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PM->APBCMASK.reg |= cfg->pm_apbcmask;
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/* Connect pins to the peripheral */
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soc_gpio_configure(&cfg->pin_rx);
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soc_gpio_configure(&cfg->pin_tx);
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/* Disable all USART interrupts */
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usart->INTENCLR.reg = SERCOM_USART_INTENCLR_MASK;
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wait_synchronization(usart);
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/* 8 bits of data, no parity, 1 stop bit in normal mode */
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usart->CTRLA.reg =
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cfg->ctrla |
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/* Internal clock */
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SERCOM_USART_CTRLA_MODE_USART_INT_CLK
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/* 16x oversampling with arithmetic baud rate generation */
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| SERCOM_USART_CTRLA_SAMPR(0) | SERCOM_USART_CTRLA_FORM(0) |
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SERCOM_USART_CTRLA_CPOL | SERCOM_USART_CTRLA_DORD;
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wait_synchronization(usart);
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/* Enable receiver and transmitter */
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usart->CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) |
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SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN;
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wait_synchronization(usart);
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retval = uart_sam0_set_baudrate(usart, cfg->baudrate,
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SOC_ATMEL_SAM0_GCLK0_FREQ_HZ);
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if (retval != 0) {
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return retval;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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cfg->irq_config_func(dev);
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#endif
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usart->CTRLA.bit.ENABLE = 1;
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wait_synchronization(usart);
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return 0;
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}
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static int uart_sam0_poll_in(struct device *dev, unsigned char *c)
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{
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SercomUsart *const usart = DEV_CFG(dev)->regs;
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if (!usart->INTFLAG.bit.RXC) {
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return -EBUSY;
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}
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*c = (unsigned char)usart->DATA.reg;
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return 0;
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}
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static unsigned char uart_sam0_poll_out(struct device *dev, unsigned char c)
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{
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SercomUsart *const usart = DEV_CFG(dev)->regs;
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while (!usart->INTFLAG.bit.DRE) {
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}
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/* send a character */
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usart->DATA.reg = c;
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return c;
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}
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#if CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_sam0_isr(void *arg)
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{
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struct device *dev = arg;
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struct uart_sam0_dev_data *const dev_data = DEV_DATA(dev);
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if (dev_data->cb) {
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dev_data->cb(dev);
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}
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}
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static void uart_sam0_irq_tx_disable(struct device *dev)
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{
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SercomUsart *const regs = DEV_CFG(dev)->regs;
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regs->INTENCLR.reg = SERCOM_USART_INTENCLR_DRE;
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}
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static void uart_sam0_irq_rx_enable(struct device *dev)
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{
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SercomUsart *const regs = DEV_CFG(dev)->regs;
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regs->INTENSET.reg = SERCOM_USART_INTENSET_RXC;
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}
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static void uart_sam0_irq_rx_disable(struct device *dev)
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{
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SercomUsart *const regs = DEV_CFG(dev)->regs;
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regs->INTENCLR.reg = SERCOM_USART_INTENCLR_RXC;
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}
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static int uart_sam0_irq_rx_ready(struct device *dev)
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{
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SercomUsart *const regs = DEV_CFG(dev)->regs;
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return regs->INTFLAG.bit.RXC != 0;
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}
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static int uart_sam0_fifo_read(struct device *dev, u8_t *rx_data,
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const int size)
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{
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SercomUsart *const regs = DEV_CFG(dev)->regs;
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if (regs->INTFLAG.bit.RXC) {
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u8_t ch = regs->DATA.reg;
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if (size >= 1) {
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*rx_data = ch;
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return 1;
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} else {
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return -EINVAL;
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}
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}
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return 0;
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}
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static int uart_sam0_irq_is_pending(struct device *dev)
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{
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SercomUsart *const regs = DEV_CFG(dev)->regs;
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return (regs->INTENSET.reg & regs->INTFLAG.reg) != 0;
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}
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static int uart_sam0_irq_update(struct device *dev) { return 1; }
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static void uart_sam0_irq_callback_set(struct device *dev,
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uart_irq_callback_t cb)
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{
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struct uart_sam0_dev_data *const dev_data = DEV_DATA(dev);
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dev_data->cb = cb;
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}
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#endif
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static const struct uart_driver_api uart_sam0_driver_api = {
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.poll_in = uart_sam0_poll_in,
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.poll_out = uart_sam0_poll_out,
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#if CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_read = uart_sam0_fifo_read,
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.irq_tx_disable = uart_sam0_irq_tx_disable,
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.irq_rx_enable = uart_sam0_irq_rx_enable,
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.irq_rx_disable = uart_sam0_irq_rx_disable,
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.irq_rx_ready = uart_sam0_irq_rx_ready,
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.irq_is_pending = uart_sam0_irq_is_pending,
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.irq_update = uart_sam0_irq_update,
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.irq_callback_set = uart_sam0_irq_callback_set,
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#endif
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};
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#if CONFIG_UART_INTERRUPT_DRIVEN
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#define UART_SAM0_IRQ_HANDLER_DECL(n) \
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static void uart_sam0_irq_config_##n(struct device *dev)
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#define UART_SAM0_IRQ_HANDLER_FUNC(n) \
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.irq_config_func = uart_sam0_irq_config_##n,
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#define UART_SAM0_IRQ_HANDLER(n) \
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static void uart_sam0_irq_config_##n(struct device *dev) \
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{ \
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IRQ_CONNECT(CONFIG_UART_SAM0_SERCOM##n##_IRQ, \
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CONFIG_UART_SAM0_SERCOM##n##_IRQ_PRIORITY, \
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uart_sam0_isr, DEVICE_GET(uart_sam0_##n), \
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0); \
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irq_enable(CONFIG_UART_SAM0_SERCOM##n##_IRQ); \
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}
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#else
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#define UART_SAM0_IRQ_HANDLER_DECL(n)
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#define UART_SAM0_IRQ_HANDLER_FUNC(n)
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#define UART_SAM0_IRQ_HANDLER(n)
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#endif
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#define UART_SAM0_CONFIG_DEFN(n) \
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static const struct uart_sam0_dev_cfg uart_sam0_config_##n = { \
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.regs = (SercomUsart *)CONFIG_UART_SAM0_SERCOM##n##_BASE_ADDRESS, \
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.baudrate = CONFIG_UART_SAM0_SERCOM##n##_CURRENT_SPEED, \
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.pm_apbcmask = PM_APBCMASK_SERCOM##n, \
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.gclk_clkctrl_id = GCLK_CLKCTRL_ID_SERCOM##n##_CORE, \
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.ctrla = SERCOM_USART_CTRLA_RXPO(3) | SERCOM_USART_CTRLA_TXPO(1), \
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.pin_rx = PIN_UART_SAM0_SERCOM##n##_RX, \
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.pin_tx = PIN_UART_SAM0_SERCOM##n##_TX, \
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UART_SAM0_IRQ_HANDLER_FUNC(n) \
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}
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#define UART_SAM0_DEVICE_INIT(n) \
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static struct uart_sam0_dev_data uart_sam0_data_##n; \
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UART_SAM0_IRQ_HANDLER_DECL(n); \
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UART_SAM0_CONFIG_DEFN(n); \
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DEVICE_AND_API_INIT(uart_sam0_##n, CONFIG_UART_SAM0_SERCOM##n##_LABEL, \
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uart_sam0_init, &uart_sam0_data_##n, \
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&uart_sam0_config_##n, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_sam0_driver_api); \
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UART_SAM0_IRQ_HANDLER(n)
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#if CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(0)
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#endif
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#if CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(1)
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#endif
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#if CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(2)
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#endif
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#if CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(3)
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#endif
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#if CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(4)
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#endif
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#if CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(5)
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#endif
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30
dts/bindings/serial/atmel,sam0-uart.yaml
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30
dts/bindings/serial/atmel,sam0-uart.yaml
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@ -0,0 +1,30 @@
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---
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title: Atmel SAM0 SERCOM UART driver
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id: atmel,sam0-uart
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version: 0.1
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description: >
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This binding gives a base representation of the Atmel SAM0 SERCOM UART driver
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inherits:
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!include uart.yaml
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "atmel,sam0-uart"
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reg:
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type: array
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: array
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category: required
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description: required interrupts
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generation: define
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...
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