dts: arm: provide support for nucleo f030r8.
Fixes #3923 Signed-off-by: Maciej Debski <maciej.debski@rndity.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit is contained in:
Maciej Debski
Kumar Gala
parent
db8fd88fab
commit
ba9ade9df6
7 changed files with 173 additions and 5 deletions
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@ -7,22 +7,23 @@ dtb-$(CONFIG_BOARD_HEXIWEAR_K64) = hexiwear_k64.dts_compiled
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dtb-$(CONFIG_BOARD_HEXIWEAR_KW40Z) = hexiwear_kw40z.dts_compiled
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dtb-$(CONFIG_BOARD_USB_KW24D512) = usb_kw24d512.dts_compiled
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dtb-$(CONFIG_BOARD_CC3220SF_LAUNCHXL) = cc3220sf_launchxl.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L432KC) = nucleo_l432kc.dts_compiled
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dtb-$(CONFIG_BOARD_V2M_BEETLE) = v2m_beetle.dts_compiled
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dtb-$(CONFIG_BOARD_MPS2_AN385) = mps2_an385.dts_compiled
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dtb-$(CONFIG_BOARD_OLIMEXINO_STM32) = olimexino_stm32.dts_compiled
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dtb-$(CONFIG_BOARD_96B_CARBON) = 96b_carbon.dts_compiled
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dtb-$(CONFIG_BOARD_96B_CARBON_NRF51) = 96b_carbon_nrf51.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F030R8) = nucleo_f030r8.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F103RB) = nucleo_f103rb.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F334R8) = nucleo_f334r8.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F401RE) = nucleo_f401re.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F411RE) = nucleo_f411re.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F412ZG) = nucleo_f412zg.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F413ZH) = nucleo_f413zh.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F103RB) = nucleo_f103rb.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L432KC) = nucleo_l432kc.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled
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dtb-$(CONFIG_BOARD_STM3210C_EVAL) = stm3210c_eval.dts_compiled
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dtb-$(CONFIG_BOARD_STM32_MINI_A15) = stm32_mini_a15.dts_compiled
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dtb-$(CONFIG_BOARD_STM32L496G_DISCO) = stm32l496g_disco.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_F334R8) = nucleo_f334r8.dts_compiled
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dtb-$(CONFIG_BOARD_STM32373C_EVAL) = stm32373c_eval.dts_compiled
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dtb-$(CONFIG_BOARD_STM32F4_DISCO) = stm32f4_disco.dts_compiled
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dtb-$(CONFIG_BOARD_STM32F469I_DISCO) = stm32f469i_disco.dts_compiled
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33
dts/arm/nucleo_f030r8.dts
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33
dts/arm/nucleo_f030r8.dts
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@ -0,0 +1,33 @@
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/*
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* Copyright (c) 2017 RnDity Sp. z o.o.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/stm32f030.dtsi>
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/ {
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model = "STMicroelectronics STM32F030R8-NUCLEO board";
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compatible = "st,stm32f030r8-nucleo", "st,stm32f030";
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chosen {
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zephyr,console = &usart2;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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};
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&usart1 {
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current-speed = <115200>;
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pinctrl-0 = <&usart1_pins_a>;
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pinctrl-names = "default";
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status = "ok";
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};
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&usart2 {
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current-speed = <115200>;
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pinctrl-0 = <&usart2_pins_a>;
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pinctrl-names = "default";
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status = "ok";
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};
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14
dts/arm/nucleo_f030r8.fixup
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14
dts/arm/nucleo_f030r8.fixup
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@ -0,0 +1,14 @@
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/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
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#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
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#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
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#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
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@ -8,7 +8,10 @@
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#define __SIZE_K(x) (x * 1024)
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#if defined(CONFIG_SOC_STM32F103X8)
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#if defined(CONFIG_SOC_STM32F030X8)
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#define DT_FLASH_SIZE __SIZE_K(64)
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#define DT_SRAM_SIZE __SIZE_K(8)
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#elif defined(CONFIG_SOC_STM32F103X8)
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#define DT_FLASH_SIZE __SIZE_K(64)
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#define DT_SRAM_SIZE __SIZE_K(20)
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#elif defined(CONFIG_SOC_STM32F103XB)
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38
dts/arm/st/stm32f0-pinctrl.dtsi
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38
dts/arm/st/stm32f0-pinctrl.dtsi
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@ -0,0 +1,38 @@
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/*
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* Copyright (c) 2017 RnDity Sp. z o.o.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/stm32-pinctrl.h>
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/ {
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soc {
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pinctrl: pin-controller {
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usart1_pins_a: usart1@0 {
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rx_tx {
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rx = <STM32_PIN_PB7 (STM32_PINMUX_ALT_FUNC_0 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PB6 (STM32_PINMUX_ALT_FUNC_0 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart1_pins_b: usart1@1 {
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rx_tx {
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rx = <STM32_PIN_PA10 (STM32_PINMUX_ALT_FUNC_1 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA9 (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart2_pins_a: usart2@0 {
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rx_tx {
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rx = <STM32_PIN_PA3 (STM32_PINMUX_ALT_FUNC_1 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA2 (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart2_pins_b: usart2@1 {
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rx_tx {
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rx = <STM32_PIN_PA15 (STM32_PINMUX_ALT_FUNC_1 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA14 (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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};
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};
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};
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72
dts/arm/st/stm32f0.dtsi
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72
dts/arm/st/stm32f0.dtsi
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@ -0,0 +1,72 @@
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/*
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* Copyright (c) 2017 RnDity Sp. z o.o.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/stm32f0-pinctrl.dtsi>
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#include <arm/armv6-m.dtsi>
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#include <st/mem.h>
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#include <dt-bindings/clock/stm32_clock.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m0";
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reg = <0>;
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};
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};
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flash0: flash@8000000 {
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reg = <0x08000000 DT_FLASH_SIZE>;
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SRAM_SIZE>;
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};
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soc {
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rcc: rcc@40021000 {
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compatible = "st,stm32-rcc";
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clocks-controller;
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#clocks-cells = <2>;
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reg = <0x40021000 0x400>;
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label = "STM32_CLK_RCC";
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};
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pinctrl: pin-controller {
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compatible = "st,stm32-pinmux";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x48000000 0x1800>;
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};
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usart1: serial@40013800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40013800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00004000>;
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interrupts = <27 0>;
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status = "disabled";
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label = "UART_1";
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};
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usart2: serial@40004400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
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interrupts = <28 0>;
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status = "disabled";
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label = "UART_2";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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7
dts/arm/st/stm32f030.dtsi
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7
dts/arm/st/stm32f030.dtsi
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@ -0,0 +1,7 @@
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/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/stm32f0.dtsi>
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