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dts: xtensa: Fix build error due to dts changes for ns16550 driver.

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patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
This commit is contained in:
Savinay Dharmappa 2018-05-22 17:14:40 +05:30 • committed by Anas Nashif
commit 6701d44967
4 changed files with 12 additions and 5 deletions
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7
arch/xtensa/soc/intel_s1000/dts.fixup
View file

@ -3,9 +3,12 @@
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_80800_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_80800_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_80800_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_80800_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_IRQ (NS16550_80800_IRQ_0 << 16) | \
(SNPS_DESIGNWARE_INTC_81800_IRQ_0 << 8) | \
(INTEL_CAVS_INTC_78800_IRQ_0 << 0)
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_80800_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_808000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_80800_CLOCK_FREQUENCY
#define L2_SRAM_BASE CONFIG_SRAM_BASE_ADDRESS

2
arch/xtensa/soc/intel_s1000/soc.h
View file

@ -61,7 +61,7 @@
/* UART - UART0 */
#define CONFIG_UART_NS16550_P0_IRQ_ICTL_OFFSET INTR_CNTL_IRQ_NUM(\
UART_NS16550_PORT_0_IRQ)
NS16550_80800_IRQ_0)
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS 0
/* I2C - I2C0 */

4
drivers/serial/uart_ns16550.c
View file

@ -20,12 +20,12 @@
* UART_REG_ADDR_INTERVAL
*/
#include <soc.h>
#include <errno.h>
#include <errno.h>
#include <kernel.h>
#include <arch/cpu.h>
#include <zephyr/types.h>
#include <soc.h>
#include <board.h>
#include <init.h>

4
dts/xtensa/intel_s1000.dtsi
View file

@ -85,6 +85,10 @@
compatible = "ns16550";
reg = <0x80800 0x400>;
label = "UART_0";
clock-frequency = <38400000>;
interrupts = <3 0>;
interrupt-parent = <&dw_intc>;
status = "disabled";
};