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dts: x86: Add device tree support for quark_d2000 microcontroller

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Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
This commit is contained in:
Savinay Dharmappa 2017-07-01 00:18:58 +05:30 • committed by Kumar Gala
commit 7578035f4c
5 changed files with 66 additions and 0 deletions
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4
arch/x86/soc/intel_quark/quark_d2000/Kconfig.defconfig.series
View file

@ -19,9 +19,11 @@ config TOOLCHAIN_VARIANT
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32000000
if !HAS_DTS
config PHYS_LOAD_ADDR
default 0x00180000 if XIP
default 0x00280000 if !XIP
endif
config RAM_SIZE
default 8
@ -41,10 +43,12 @@ config LOAPIC_TIMER_IRQ
config LOAPIC_TIMER_IRQ_PRIORITY
default 2
if !HAS_DTS
config PHYS_RAM_ADDR
default 0x00280000
help
This option specifies the physical SRAM address of this Soc.
endif
config QMSI
def_bool y

1
arch/x86/soc/intel_quark/quark_d2000/linker.ld
View file

@ -13,6 +13,7 @@
#include <autoconf.h>
#include <generated_dts_board.h>
/* physical address of RAM (needed for correct __ram_phys_end symbol) */
#define PHYS_RAM_ADDR CONFIG_PHYS_RAM_ADDR

1
dts/x86/Makefile
View file

@ -1,4 +1,5 @@
ifeq ($(CONFIG_HAS_DTS),y)
dtb-$(CONFIG_SOC_QUARK_SE_C1000) = arduino_101.dts_compiled
dtb-$(CONFIG_SOC_SERIES_QUARK_D2000) = quark_d2000_crb.dts_compiled
always := $(dtb-y)
endif

57
dts/x86/intel_quark_d2000.dtsi Normal file
View file

@ -0,0 +1,57 @@
#include "skeleton.dtsi"
#include "mem.h"
/ {
cpus {
cpu@0 {
compatible = "intel,quark";
};
};
flash0: flash@00180000 {
reg = <0x00180000 DT_FLASH_SIZE>;
};
sram0: memory@00280000 {
reg = <0x00280000 DT_SRAM_SIZE>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
rtc: rtc@b0000400 {
compatible = "intel,qmsi-rtc";
reg = <0xb0000400 0x400>;
clock-frequency = <32768>;
};
uart0: uart@b0002000 {
compatible = "intel,qmsi-uart";
reg = <0xb0002000 0x400>;
label = "UART_0";
status = "disabled";
};
uart1: uart@b0002400 {
compatible = "intel,qmsi-uart";
reg = <0xb0002400 0x400>;
label = "UART_1";
status = "disabled";
};
gpio: gpio@b000c000 {
compatible = "intel,qmsi-gpio";
reg = <0xb00c00 0x400>;
gpio-controller;
#gpio-cells = <2>;
};
};
};

3
dts/x86/mem.h
View file

@ -6,6 +6,9 @@
#if defined(CONFIG_SOC_QUARK_SE_C1000)
#define DT_FLASH_SIZE __SIZE_K(144)
#define DT_SRAM_SIZE __SIZE_K(55)
#elif defined(CONFIG_SOC_QUARK_D2000)
#define DT_FLASH_SIZE __SIZE_K(32)
#define DT_SRAM_SIZE __SIZE_K(8)
#else
#error "Flash and RAM sizes not defined for this chip"
#endif