arm: dts: Add DTS support for SAME70 SoC
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
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1338f49206
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7 changed files with 89 additions and 30 deletions
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@ -22,10 +22,6 @@ config SOC_PART_NUMBER
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default same70j20 if SOC_PART_NUMBER_SAME70J20
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default same70j19 if SOC_PART_NUMBER_SAME70J19
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config NUM_IRQ_PRIO_BITS
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int
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default 3
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#
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# SAM E70 family has in total 71 peripherals capable of generating interrupts
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# (not all Peripheral Identifiers are used).
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@ -38,30 +34,4 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
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int
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default 300000000
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#
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# SRAM size and base address
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#
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config SRAM_BASE_ADDRESS
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hex
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default 0x20400000
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config SRAM_SIZE
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int
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default 256 if SOC_PART_NUMBER_SAME70Q19 || SOC_PART_NUMBER_SAME70N19 || SOC_PART_NUMBER_SAME70J19
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default 384 if SOC_PART_NUMBER_SAME70Q20 || SOC_PART_NUMBER_SAME70N20 || SOC_PART_NUMBER_SAME70J20
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default 384 if SOC_PART_NUMBER_SAME70Q21 || SOC_PART_NUMBER_SAME70N21 || SOC_PART_NUMBER_SAME70J21
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#
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# Flash size and base address
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#
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config FLASH_BASE_ADDRESS
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hex
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default 0x00400000
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config FLASH_SIZE
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int
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default 512 if SOC_PART_NUMBER_SAME70Q19 || SOC_PART_NUMBER_SAME70N19 || SOC_PART_NUMBER_SAME70J19
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default 1024 if SOC_PART_NUMBER_SAME70Q20 || SOC_PART_NUMBER_SAME70N20 || SOC_PART_NUMBER_SAME70J20
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default 2048 if SOC_PART_NUMBER_SAME70Q21 || SOC_PART_NUMBER_SAME70N21 || SOC_PART_NUMBER_SAME70J21
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endif # SOC_SERIES_SAME70
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@ -14,3 +14,4 @@ CONFIG_SERIAL=y
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CONFIG_USART_SAM=y
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CONFIG_USART_SAM_PORT_1=y
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CONFIG_BOARD_SAM_E70_XPLAINED=y
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CONFIG_HAS_DTS=y
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@ -29,6 +29,7 @@ dtb-$(CONFIG_BOARD_NRF51_BLENANO) = nrf51_blenano.dts_compiled
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dtb-$(CONFIG_BOARD_NRF51_PCA10028) = nrf51_pca10028.dts_compiled
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dtb-$(CONFIG_BOARD_QUARK_SE_C1000_BLE) = quark_se_c1000_ble.dts_compiled
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dtb-$(CONFIG_BOARD_QEMU_CORTEX_M3) = qemu_cortex_m3.dts_compiled
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dtb-$(CONFIG_BOARD_SAM_E70_XPLAINED) = sam_e70_xplained.dts_compiled
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always := $(dtb-y)
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endif
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30
dts/arm/atmel/same70.dtsi
Normal file
30
dts/arm/atmel/same70.dtsi
Normal file
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@ -0,0 +1,30 @@
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/*
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* Copyright (c) 2017 Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <atmel/same70_mem.h>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m7";
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};
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};
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flash0: flash {
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compatible = "flash";
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reg = <0x00400000 DT_FLASH_SIZE>;
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};
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sram0: memory {
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compatible = "sram";
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reg = <0x20400000 DT_SRAM_SIZE>;
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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37
dts/arm/atmel/same70_mem.h
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37
dts/arm/atmel/same70_mem.h
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@ -0,0 +1,37 @@
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#ifndef __DT_BINDING_SAME70_MEM_H
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#define __DT_BINDING_SAME70_MEM_H
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#define __SIZE_K(x) (x * 1024)
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#if defined CONFIG_SOC_PART_NUMBER_SAME70J19
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#define DT_FLASH_SIZE __SIZE_K(512)
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#define DT_SRAM_SIZE __SIZE_K(256)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70J20
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#define DT_FLASH_SIZE __SIZE_K(1024)
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#define DT_SRAM_SIZE __SIZE_K(384)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70J21
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#define DT_FLASH_SIZE __SIZE_K(2048)
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#define DT_SRAM_SIZE __SIZE_K(384)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70N19
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#define DT_FLASH_SIZE __SIZE_K(512)
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#define DT_SRAM_SIZE __SIZE_K(256)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70N20
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#define DT_FLASH_SIZE __SIZE_K(1024)
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#define DT_SRAM_SIZE __SIZE_K(384)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70N21
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#define DT_FLASH_SIZE __SIZE_K(2048)
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#define DT_SRAM_SIZE __SIZE_K(384)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70Q19
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#define DT_FLASH_SIZE __SIZE_K(512)
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#define DT_SRAM_SIZE __SIZE_K(256)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70Q20
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#define DT_FLASH_SIZE __SIZE_K(1024)
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#define DT_SRAM_SIZE __SIZE_K(384)
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#elif defined CONFIG_SOC_PART_NUMBER_SAME70Q21
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#define DT_FLASH_SIZE __SIZE_K(2048)
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#define DT_SRAM_SIZE __SIZE_K(384)
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#else
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#error "Flash and RAM sizes not defined for this chip"
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#endif
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#endif /* __DT_BINDING_SAME70_MEM_H */
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13
dts/arm/sam_e70_xplained.dts
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13
dts/arm/sam_e70_xplained.dts
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@ -0,0 +1,13 @@
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/dts-v1/;
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#include <atmel/same70.dtsi>
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/ {
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model = "Atmel SAM E70 Xplained board";
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compatible = "atmel,sam_e70_xplained", "atmel,same70q21", "atmel,same70";
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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};
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7
dts/arm/sam_e70_xplained.fixup
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7
dts/arm/sam_e70_xplained.fixup
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@ -0,0 +1,7 @@
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/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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