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drivers/i2c: Use standard bitrate settings for QMSI driver

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Apply the change on relevant arch/boards.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-02-28 21:43:19 +01:00 • committed by Kumar Gala
commit 9b77741d63
9 changed files with 19 additions and 16 deletions
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6
arch/arc/soc/quark_se_c1000_ss/Kconfig.defconfig
View file

@ -165,18 +165,12 @@ config I2C_0
config I2C_0_IRQ_PRI
default 1
config I2C_0_DEFAULT_CFG
default 0x12
config I2C_1
def_bool y
config I2C_1_IRQ_PRI
default 1
config I2C_1_DEFAULT_CFG
default 0x12
config I2C_SDA_SETUP
default 2

2
arch/arc/soc/quark_se_c1000_ss/dts.fixup
View file

@ -21,6 +21,8 @@
#define CONFIG_I2C_SS_1_NAME INTEL_QMSI_SS_I2C_80012100_LABEL
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
/* End of SoC Level DTS fixup file */

2
arch/x86/soc/intel_quark/quark_d2000/Kconfig.defconfig.series
View file

@ -102,8 +102,6 @@ config I2C_0
config I2C_0_IRQ_PRI
default 0
config I2C_0_DEFAULT_CFG
default 0x12
endif # I2C_QMSI
config I2C_SDA_SETUP

1
arch/x86/soc/intel_quark/quark_d2000/dts.fixup
View file

@ -11,3 +11,4 @@
#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY

4
arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series
View file

@ -77,8 +77,6 @@ if I2C_0
config I2C_0_IRQ_PRI
default 2
config I2C_0_DEFAULT_CFG
default 0x12
endif # I2C_0
@ -89,8 +87,6 @@ if I2C_1
config I2C_1_IRQ_PRI
default 2
config I2C_1_DEFAULT_CFG
default 0x12
endif # I2C_1

2
arch/x86/soc/intel_quark/quark_se/dts.fixup
View file

@ -15,6 +15,8 @@
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
/* End of SoC Level DTS fixup file */

13
drivers/i2c/i2c_qmsi.c
View file

@ -16,6 +16,8 @@
#include "clk.h"
#include "soc.h"
#include "i2c-priv.h"
/* Convenient macros to get the controller instance and the driver data. */
#define GET_CONTROLLER_INSTANCE(dev) \
(((const struct i2c_qmsi_config_info *) \
@ -25,7 +27,7 @@
struct i2c_qmsi_config_info {
qm_i2c_t instance; /* Controller instance. */
u32_t default_cfg;
u32_t bitrate;
clk_periph_t clock_gate;
};
@ -113,7 +115,7 @@ static struct i2c_qmsi_driver_data driver_data_0;
static const struct i2c_qmsi_config_info config_info_0 = {
.instance = QM_I2C_0,
.default_cfg = CONFIG_I2C_0_DEFAULT_CFG,
.bitrate = CONFIG_I2C_0_BITRATE,
.clock_gate = CLK_PERIPH_I2C_M0_REGISTER | CLK_PERIPH_CLK,
};
@ -129,7 +131,7 @@ static struct i2c_qmsi_driver_data driver_data_1;
static const struct i2c_qmsi_config_info config_info_1 = {
.instance = QM_I2C_1,
.default_cfg = CONFIG_I2C_1_DEFAULT_CFG,
.bitrate = CONFIG_I2C_1_BITRATE,
.clock_gate = CLK_PERIPH_I2C_M1_REGISTER | CLK_PERIPH_CLK,
};
@ -258,6 +260,7 @@ static int i2c_qmsi_init(struct device *dev)
struct i2c_qmsi_driver_data *driver_data = GET_DRIVER_DATA(dev);
const struct i2c_qmsi_config_info *config = dev->config->config_info;
qm_i2c_t instance = GET_CONTROLLER_INSTANCE(dev);
u32_t bitrate_cfg;
int err;
k_sem_init(&driver_data->device_sync_sem, 0, UINT_MAX);
@ -293,7 +296,9 @@ static int i2c_qmsi_init(struct device *dev)
clk_periph_enable(config->clock_gate);
err = i2c_qmsi_configure(dev, config->default_cfg);
bitrate_cfg = _i2c_map_dt_bitrate(config->bitrate);
err = i2c_qmsi_configure(dev, I2C_MODE_MASTER | bitrate_cfg);
if (err < 0) {
return err;
}

3
dts/x86/intel_curie.dtsi
View file

@ -1,5 +1,6 @@
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/intel-ioapic.h>
#include <dt-bindings/i2c/i2c.h>
#define __SIZE_K(x) (x * 1024)
@ -95,6 +96,7 @@
i2c0: i2c@b0002800 {
compatible = "intel,qmsi-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0002800 0x400>;
@ -105,6 +107,7 @@
i2c1: i2c@b0002c00 {
compatible = "intel,qmsi-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0002c00 0x400>;

2
dts/x86/intel_quark_d2000.dtsi
View file

@ -1,5 +1,6 @@
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/intel-mvic.h>
#include <dt-bindings/i2c/i2c.h>
#define __SIZE_K(x) (x * 1024)
@ -80,6 +81,7 @@
i2c0: i2c@b0002800 {
compatible = "intel,qmsi-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0002800 0x400>;