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driver: interrupt_controller: Add support for stm32f2

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Add kconfig and c code for stm32f2 interrupt controller driver

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
This commit is contained in:
qianfan Zhao 2018-05-11 21:47:12 +08:00 • committed by Kumar Gala
commit dffac9ab74
4 changed files with 93 additions and 7 deletions
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2
arch/arm/soc/st_stm32/stm32f2/dts.fixup
View file

@ -1,3 +1,5 @@
/* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* End of SoC Level DTS fixup file */

10
drivers/interrupt_controller/Kconfig.stm32
View file

@ -93,7 +93,7 @@ endif # SOC_SERIES_STM32F0X!=y && SOC_SERIES_STM32L0X!=y
config EXTI_STM32_PVD_IRQ_PRI
int "RVD Through IRQ priority"
depends on EXTI_STM32
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
default 0
help
IRQ priority of RVD Through interrupt
@ -101,7 +101,7 @@ config EXTI_STM32_PVD_IRQ_PRI
config EXTI_STM32_RTC_ALARM_IRQ_PRI
int "RTC Alarm IRQ priority"
depends on EXTI_STM32
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
default 0
help
IRQ priority of RTC Alarm interrupt
@ -109,7 +109,7 @@ config EXTI_STM32_RTC_ALARM_IRQ_PRI
config EXTI_STM32_OTG_FS_WKUP_IRQ_PRI
int "USB OTG FS Wake Up IRQ priority"
depends on EXTI_STM32
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
default 0
help
IRQ priority of USB OTG FS Wake interrupt
@ -117,7 +117,7 @@ config EXTI_STM32_OTG_FS_WKUP_IRQ_PRI
config EXTI_STM32_TAMP_STAMP_IRQ_PRI
int "Tamper and Timestamp IRQ priority"
depends on EXTI_STM32
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
default 0
help
IRQ priority of Tamper and Timestamp interrupt
@ -125,7 +125,7 @@ config EXTI_STM32_TAMP_STAMP_IRQ_PRI
config EXTI_STM32_RTC_WKUP_IRQ_PRI
int "RTC Wake Up IRQ priority"
depends on EXTI_STM32
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
default 0
help
IRQ priority of RTC Wake Up interrupt

84
drivers/interrupt_controller/exti_stm32.c
View file

@ -27,6 +27,8 @@
#define EXTI_LINES 32
#elif CONFIG_SOC_SERIES_STM32F1X
#define EXTI_LINES 19
#elif CONFIG_SOC_SERIES_STM32F2X
#define EXTI_LINES 23
#elif CONFIG_SOC_STM32F303XC
#define EXTI_LINES 36
#elif CONFIG_SOC_STM32F334X8
@ -122,6 +124,33 @@ void stm32_exti_enable(int line)
/* pins 0..4 are mapped to EXTI0.. EXTI4 */
irqnum = EXTI0_IRQn + line;
}
#elif CONFIG_SOC_SERIES_STM32F2X
if (line >= 5 && line <= 9) {
irqnum = EXTI9_5_IRQn;
} else if (line >= 10 && line <= 15) {
irqnum = EXTI15_10_IRQn;
} else if (line >= 0 && line <= 4) {
/* pins 0..4 are mapped to EXTI0.. EXTI4 */
irqnum = EXTI0_IRQn + line;
} else {
switch (line) {
case 16:
irqnum = PVD_IRQn;
break;
case 17:
irqnum = RTC_Alarm_IRQn;
break;
case 18:
irqnum = OTG_FS_WKUP_IRQn;
break;
case 21:
irqnum = TAMP_STAMP_IRQn;
break;
case 22:
irqnum = RTC_WKUP_IRQn;
break;
}
}
#elif CONFIG_SOC_SERIES_STM32F3X
if (line >= 5 && line <= 9) {
irqnum = EXTI9_5_IRQn;
@ -357,7 +386,9 @@ static inline void __stm32_exti_isr_15_10(void *arg)
__stm32_exti_isr(10, 16, arg);
}
#if defined(CONFIG_SOC_SERIES_STM32F4X) || defined(CONFIG_SOC_SERIES_STM32F7X)
#if defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_SOC_SERIES_STM32F7X) || \
defined(CONFIG_SOC_SERIES_STM32F2X)
static inline void __stm32_exti_isr_16(void *arg)
{
__stm32_exti_isr(16, 17, arg);
@ -382,7 +413,7 @@ static inline void __stm32_exti_isr_22(void *arg)
{
__stm32_exti_isr(22, 23, arg);
}
#endif /* CONFIG_SOC_SERIES_STM32F4X || CONFIG_SOC_SERIES_STM32F7X*/
#endif /* CONFIG_SOC_SERIES_STM32{F4X F7X, F2X} */
#ifdef CONFIG_SOC_SERIES_STM32F7X
static inline void __stm32_exti_isr_23(void *arg)
{
@ -481,6 +512,55 @@ static void __stm32_exti_connect_irqs(struct device *dev)
CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI,
__stm32_exti_isr_15_10, DEVICE_GET(exti_stm32),
0);
#elif CONFIG_SOC_SERIES_STM32F2X
IRQ_CONNECT(EXTI0_IRQn,
CONFIG_EXTI_STM32_EXTI0_IRQ_PRI,
__stm32_exti_isr_0, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(EXTI1_IRQn,
CONFIG_EXTI_STM32_EXTI1_IRQ_PRI,
__stm32_exti_isr_1, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(EXTI2_IRQn,
CONFIG_EXTI_STM32_EXTI2_IRQ_PRI,
__stm32_exti_isr_2, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(EXTI3_IRQn,
CONFIG_EXTI_STM32_EXTI3_IRQ_PRI,
__stm32_exti_isr_3, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(EXTI4_IRQn,
CONFIG_EXTI_STM32_EXTI4_IRQ_PRI,
__stm32_exti_isr_4, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(EXTI9_5_IRQn,
CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI,
__stm32_exti_isr_9_5, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(EXTI15_10_IRQn,
CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI,
__stm32_exti_isr_15_10, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(PVD_IRQn,
CONFIG_EXTI_STM32_PVD_IRQ_PRI,
__stm32_exti_isr_16, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(RTC_Alarm_IRQn,
CONFIG_EXTI_STM32_RTC_ALARM_IRQ_PRI,
__stm32_exti_isr_17, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(OTG_FS_WKUP_IRQn,
CONFIG_EXTI_STM32_OTG_FS_WKUP_IRQ_PRI,
__stm32_exti_isr_18, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(TAMP_STAMP_IRQn,
CONFIG_EXTI_STM32_TAMP_STAMP_IRQ_PRI,
__stm32_exti_isr_21, DEVICE_GET(exti_stm32),
0);
IRQ_CONNECT(RTC_WKUP_IRQn,
CONFIG_EXTI_STM32_RTC_WKUP_IRQ_PRI,
__stm32_exti_isr_22, DEVICE_GET(exti_stm32),
0);
#elif CONFIG_SOC_SERIES_STM32F3X
IRQ_CONNECT(EXTI0_IRQn,
CONFIG_EXTI_STM32_EXTI0_IRQ_PRI,

4
dts/arm/st/stm32f2.dtsi
View file

@ -139,3 +139,7 @@
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};