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drivers: i2c: stm32: add support for STM32F7

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The STM32F7 uses the V2 version of the STM32 I2C controller. Add the
corresponding Kconfig, DTS, DTS fixup and pinmux entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2018-07-04 16:51:13 +02:00 • committed by Anas Nashif
commit 97bc5abedf
6 changed files with 117 additions and 4 deletions
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7
arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.series
View file

@ -28,6 +28,13 @@ config GPIO_STM32_PORTI
endif # GPIO_STM32
if I2C_STM32
config I2C_STM32_V2
def_bool y
endif # I2C_STM32
if ENTROPY_GENERATOR
config ENTROPY_STM32_RNG

24
arch/arm/soc/st_stm32/stm32f7/dts.fixup
View file

@ -50,6 +50,30 @@
#define CONFIG_UART_STM32_USART_8_NAME ST_STM32_USART_40007800_LABEL
#define USART_8_IRQ ST_STM32_USART_40007C00_IRQ_0
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40005C00_LABEL
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS

4
arch/arm/soc/st_stm32/stm32f7/soc.h
View file

@ -42,6 +42,10 @@
#include <stm32f7xx_ll_usart.h>
#endif
#ifdef CONFIG_I2C
#include <stm32f7xx_ll_i2c.h>
#endif
#ifdef CONFIG_ENTROPY_STM32_RNG
#include <stm32f7xx_ll_rng.h>
#endif

8
drivers/i2c/Kconfig.stm32
View file

@ -22,16 +22,16 @@ config I2C_STM32_V1
driver also supports the F2 and L1 series.
config I2C_STM32_V2
bool "STM32 V2 Driver (F0/F3/L0/L4X)"
depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X
bool "STM32 V2 Driver (F0/F3/F7/L0/L4X)"
depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X
select HAS_DTS_I2C
select USE_STM32_LL_I2C
select USE_STM32_LL_RCC if SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
select I2C_STM32_INTERRUPT if I2C_SLAVE
default n
help
Enable I2C support on the STM32 F0, F3 and L4X family of processors.
This driver also supports the F7 and L0 series.
Enable I2C support on the STM32 F0, F3, F7 and L4X family of processors.
This driver also supports the L0 series.
If I2C_SLAVE is enabled it selects I2C_STM32_INTERRUPT, since slave mode
is only supported by this driver with interrupts enabled.

38
drivers/pinmux/stm32/pinmux_stm32f7.h
View file

@ -43,6 +43,9 @@
(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F7_PINMUX_FUNC_PA8_I2C3_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PA9_USART1_TX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
@ -68,18 +71,32 @@
#define STM32F7_PINMUX_FUNC_PB6_USART1_TX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB6_I2C1_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PB7_USART1_RX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB7_I2C1_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PB8_I2C1_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PB9_I2C1_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PB10_USART3_TX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB10_I2C2_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PB11_USART3_RX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PB11_ETH \
(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
STM32_OSPEEDR_VERY_HIGH_SPEED)
#define STM32F7_PINMUX_FUNC_PB11_I2C2_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PB13_UART3_CTS \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)
@ -114,6 +131,8 @@
#define STM32F7_PINMUX_FUNC_PC9_UART5_CTS \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
#define STM32F7_PINMUX_FUNC_PC9_I2C3_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PC10_USART3_TX \
(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)
@ -184,6 +203,12 @@
(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
/* Port F */
#define STM32F7_PINMUX_FUNC_PF0_I2C2_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PF1_I2C2_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PF6_UART7_RX \
(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
@ -224,4 +249,17 @@
#define STM32F7_PINMUX_FUNC_PG15_USART6_CTS \
(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
/* Port H */
#define STM32F7_PINMUX_FUNC_PH4_I2C2_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PH5_I2C2_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PH7_I2C3_SCL \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#define STM32F7_PINMUX_FUNC_PH8_I2C3_SDA \
(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
#endif /* _STM32F7_PINMUX_H_ */

40
dts/arm/st/stm32f7.dtsi
View file

@ -8,6 +8,7 @@
#include <st/stm32f7-pinctrl.dtsi>
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
@ -203,6 +204,45 @@
label = "UART_8";
};
i2c1: i2c@40005400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
interrupts = <31 0>, <32 0>;
interrupt-names = "event", "error";
status = "disabled";
label = "I2C_1";
};
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
interrupts = <33 0>, <34 0>;
interrupt-names = "event", "error";
status = "disabled";
label = "I2C_2";
};
i2c3: i2c@40005C00 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005C00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
interrupts = <72 0>, <73 0>;
interrupt-names = "event", "error";
status = "disabled";
label = "I2C_3";
};
usbotg_fs: usb@50000000 {
compatible = "st,stm32-otgfs";
reg = <0x50000000 0x40000>;