drivers: i2c: stm32: add support for STM32F7
The STM32F7 uses the V2 version of the STM32 I2C controller. Add the corresponding Kconfig, DTS, DTS fixup and pinmux entries. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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d9d3a5adf8
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6 changed files with 117 additions and 4 deletions
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@ -28,6 +28,13 @@ config GPIO_STM32_PORTI
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endif # GPIO_STM32
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if I2C_STM32
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config I2C_STM32_V2
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def_bool y
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endif # I2C_STM32
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if ENTROPY_GENERATOR
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config ENTROPY_STM32_RNG
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@ -50,6 +50,30 @@
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#define CONFIG_UART_STM32_USART_8_NAME ST_STM32_USART_40007800_LABEL
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#define USART_8_IRQ ST_STM32_USART_40007C00_IRQ_0
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#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
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#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
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#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
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#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
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#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
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#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
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#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
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#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
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#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
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#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
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#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40005C00_LABEL
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#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT
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#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR
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#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
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#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS
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@ -42,6 +42,10 @@
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#include <stm32f7xx_ll_usart.h>
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#endif
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#ifdef CONFIG_I2C
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#include <stm32f7xx_ll_i2c.h>
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#endif
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#ifdef CONFIG_ENTROPY_STM32_RNG
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#include <stm32f7xx_ll_rng.h>
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#endif
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@ -22,16 +22,16 @@ config I2C_STM32_V1
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driver also supports the F2 and L1 series.
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config I2C_STM32_V2
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bool "STM32 V2 Driver (F0/F3/L0/L4X)"
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depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X
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bool "STM32 V2 Driver (F0/F3/F7/L0/L4X)"
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depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X
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select HAS_DTS_I2C
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select USE_STM32_LL_I2C
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select USE_STM32_LL_RCC if SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
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select I2C_STM32_INTERRUPT if I2C_SLAVE
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default n
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help
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Enable I2C support on the STM32 F0, F3 and L4X family of processors.
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This driver also supports the F7 and L0 series.
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Enable I2C support on the STM32 F0, F3, F7 and L4X family of processors.
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This driver also supports the L0 series.
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If I2C_SLAVE is enabled it selects I2C_STM32_INTERRUPT, since slave mode
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is only supported by this driver with interrupts enabled.
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@ -43,6 +43,9 @@
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(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
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STM32_OSPEEDR_VERY_HIGH_SPEED)
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#define STM32F7_PINMUX_FUNC_PA8_I2C3_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PA9_USART1_TX \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
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@ -68,18 +71,32 @@
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#define STM32F7_PINMUX_FUNC_PB6_USART1_TX \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB6_I2C1_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB7_USART1_RX \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB7_I2C1_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB8_I2C1_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB9_I2C1_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB10_USART3_TX \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB10_I2C2_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB11_USART3_RX \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB11_ETH \
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(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
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STM32_OSPEEDR_VERY_HIGH_SPEED)
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#define STM32F7_PINMUX_FUNC_PB11_I2C2_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PB13_UART3_CTS \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)
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@ -114,6 +131,8 @@
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#define STM32F7_PINMUX_FUNC_PC9_UART5_CTS \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP)
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#define STM32F7_PINMUX_FUNC_PC9_I2C3_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PC10_USART3_TX \
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(STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)
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@ -184,6 +203,12 @@
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
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/* Port F */
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#define STM32F7_PINMUX_FUNC_PF0_I2C2_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PF1_I2C2_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PF6_UART7_RX \
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
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@ -224,4 +249,17 @@
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#define STM32F7_PINMUX_FUNC_PG15_USART6_CTS \
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
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/* Port H */
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#define STM32F7_PINMUX_FUNC_PH4_I2C2_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PH5_I2C2_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PH7_I2C3_SCL \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#define STM32F7_PINMUX_FUNC_PH8_I2C3_SDA \
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(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
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#endif /* _STM32F7_PINMUX_H_ */
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@ -8,6 +8,7 @@
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#include <st/stm32f7-pinctrl.dtsi>
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#include <st/mem.h>
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#include <dt-bindings/clock/stm32_clock.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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@ -203,6 +204,45 @@
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label = "UART_8";
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};
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i2c1: i2c@40005400 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
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interrupts = <31 0>, <32 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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label = "I2C_1";
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};
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i2c2: i2c@40005800 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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label = "I2C_2";
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};
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i2c3: i2c@40005C00 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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interrupts = <72 0>, <73 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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label = "I2C_3";
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};
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usbotg_fs: usb@50000000 {
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compatible = "st,stm32-otgfs";
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reg = <0x50000000 0x40000>;
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