dts: arc: Fix IRQ priorities for quark_se_c1000_ss
ARC only supports only 2 priority levels so make sure the IRQ priority is not greather than 1. The test was passing in previous build because the ASSERT was not enabled. Fixes Issue #8099 Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
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f27195017a
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1 changed files with 7 additions and 7 deletions
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@ -54,7 +54,7 @@
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compatible = "intel,qmsi-rtc";
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reg = <0xb0000400 0x400>;
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clock-frequency = <32768>;
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interrupts = <47 2>;
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interrupts = <47 1>;
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interrupt-parent = <&core_intc>;
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label = "RTC_0";
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};
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@ -62,7 +62,7 @@
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uart0: uart@b0002000 {
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compatible = "intel,qmsi-uart";
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reg = <0xb0002000 0x400>;
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interrupts = <41 3>;
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interrupts = <41 0>;
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interrupt-parent = <&core_intc>;
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label = "UART_0";
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@ -72,7 +72,7 @@
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uart1: uart@b0002400 {
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compatible = "intel,qmsi-uart";
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reg = <0xb0002400 0x400>;
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interrupts = <42 3>;
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interrupts = <42 0>;
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interrupt-parent = <&core_intc>;
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label = "UART_1";
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@ -82,7 +82,7 @@
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gpio0: gpio@80017800 {
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compatible = "intel,qmsi-ss-gpio";
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reg = <0x80017800 0x100>;
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interrupts = <20 2>;
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interrupts = <20 1>;
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interrupt-parent = <&core_intc>;
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label = "GPIO_0";
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@ -93,7 +93,7 @@
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gpio1: gpio@80017900 {
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compatible = "intel,qmsi-ss-gpio";
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reg = <0x80017900 0x100>;
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interrupts = <21 2>;
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interrupts = <21 1>;
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interrupt-parent = <&core_intc>;
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label = "GPIO_1";
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@ -104,7 +104,7 @@
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gpio2: gpio@b0000c00 {
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compatible = "intel,qmsi-gpio";
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reg = <0xb0000c00 0x400>;
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interrupts = <44 2>;
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interrupts = <44 1>;
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interrupt-parent = <&core_intc>;
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label = "GPIO_2";
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@ -115,7 +115,7 @@
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gpio3: gpio@b0800b00 {
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compatible = "intel,qmsi-gpio";
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reg = <0xb0800b00 0x400>;
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interrupts = <67 2>;
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interrupts = <67 1>;
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interrupt-parent = <&core_intc>;
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label = "GPIO_3";
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