dts: xtensa: Add device tree support for xtensa
Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274 Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
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8 changed files with 81 additions and 6 deletions
11
arch/xtensa/soc/intel_s1000/dts.fixup
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11
arch/xtensa/soc/intel_s1000/dts.fixup
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/* SoC level DTS fixup file */
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#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_80800_CURRENT_SPEED
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#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_80800_LABEL
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#define L2_SRAM_BASE CONFIG_SRAM_BASE_ADDRESS
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#define L2_SRAM_SIZE CONFIG_SRAM_SIZE_0 * 1024
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/* End of SoC Level DTS fixup file */
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@ -15,6 +15,7 @@ OUTPUT_ARCH(xtensa)
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#define _LINKER
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#define _ASMLANGUAGE
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#include <generated_dts_board.h>
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#include "memory.h"
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#include <autoconf.h>
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#include <linker/sections.h>
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@ -7,8 +7,6 @@
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#define __INC_MEMORY_H
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/* L2 HP SRAM */
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#define L2_SRAM_BASE 0xBE000000
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#define L2_SRAM_SIZE 0x00300000
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#define L2_VECTOR_SIZE 0x1000
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/* The reset vector address in SRAM and its size */
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@ -6,3 +6,4 @@
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config BOARD_INTEL_S1000_CRB
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bool "Xtensa on Intel_S1000"
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depends on SOC_INTEL_S1000
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select HAS_DTS
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@ -82,10 +82,6 @@ config UART_NS16550_PORT_0
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if UART_NS16550_PORT_0
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config UART_NS16550_PORT_0_NAME
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default "UART_0"
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config UART_NS16550_PORT_0_BAUD_RATE
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default 115200
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config UART_NS16550_PORT_0_OPTIONS
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default 0
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config UART_INTERRUPT_DRIVEN
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23
boards/xtensa/intel_s1000_crb/intel_s1000_crb.dts
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boards/xtensa/intel_s1000_crb/intel_s1000_crb.dts
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/dts-v1/;
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#include "intel_s1000.dtsi"
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/ {
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model = "intel_s1000_crb";
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compatible = "intel,s1000";
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aliases {
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uart_0 = &uart0;
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};
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &uart0;
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};
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};
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&uart0 {
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status = "ok";
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current-speed = <115200>;
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};
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44
dts/xtensa/intel_s1000.dtsi
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dts/xtensa/intel_s1000.dtsi
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#include "skeleton.dtsi"
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#define __SIZE_K(x) (x * 1024)
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "LX6";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "LX6";
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reg = <1>;
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};
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};
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sram0: memory@0xbe000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0xbe000000 0x300000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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uart0: uart@80800 {
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compatible = "ns16550";
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reg = <0x80800 0x400>;
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label = "UART_0";
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status = "disabled";
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};
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};
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};
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@ -19,6 +19,7 @@
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extern "C" {
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#endif
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#include <generated_dts_board.h>
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#if !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__)
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#include "sys_io.h" /* Include from the very same folder of this file */
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#include <zephyr/types.h>
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