arch: Use dts to set rtc priorities for Intel quark, x86 and arc
Get the name generated through dts as well. Fix the rtc driver and relevant SoCs accordingly. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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16c455e4cd
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250c4a87ed
12 changed files with 28 additions and 19 deletions
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@ -39,9 +39,6 @@ if RTC
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config RTC_QMSI
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def_bool y
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config RTC_0_IRQ_PRI
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default 2
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endif # RTC
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if PWM
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@ -43,4 +43,7 @@
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#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL
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#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
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#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL
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#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0
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#define CONFIG_RTC_0_IRQ_PRI INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY
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/* End of SoC Level DTS fixup file */
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@ -207,6 +207,13 @@
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#define CLOCK_SYSTEM_CLOCK_CONTROL (SCSS_REGISTER_BASE + \
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SCSS_CCU_SYS_CLK_CTL)
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/*
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* RTC
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*/
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#define CONFIG_RTC_0_IRQ_FLAGS (IOAPIC_EDGE | IOAPIC_HIGH)
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static inline void _quark_se_ss_ready(void)
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{
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shared_data->flags |= ARC_READY;
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@ -66,6 +66,7 @@ config RTC_QMSI
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def_bool y
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config RTC_0_IRQ_PRI
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int
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default 0
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endif # RTC
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@ -20,3 +20,7 @@
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#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL
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#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0
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#define CONFIG_GPIO_QMSI_0_IRQ_FLAGS INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE
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#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL
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#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0
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#define CONFIG_RTC_0_IRQ_FLAGS INTEL_QMSI_RTC_B0000400_IRQ_0_SENSE
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@ -181,8 +181,6 @@ endif # WATCHDOG
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if RTC
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config RTC_QMSI
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def_bool y
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config RTC_0_IRQ_PRI
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default 2
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endif # RTC
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if BT_H4
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@ -32,4 +32,9 @@
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#define CONFIG_GPIO_QMSI_1_IRQ_PRI INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY
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#define CONFIG_GPIO_QMSI_1_IRQ_FLAGS INTEL_QMSI_GPIO_B0800B00_IRQ_0_SENSE
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#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL
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#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0
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#define CONFIG_RTC_0_IRQ_PRI INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY
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#define CONFIG_RTC_0_IRQ_FLAGS INTEL_QMSI_RTC_B0000400_IRQ_0_SENSE
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/* End of SoC Level DTS fixup file */
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@ -20,7 +20,7 @@ if RTC
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config RTC_0_NAME
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string "Driver instance name"
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default "RTC_0"
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depends on RTC
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depends on RTC && !HAS_DTS
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help
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RTC driver instance name
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@ -7,11 +7,6 @@ config RTC_QMSI
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if RTC_QMSI
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config RTC_0_IRQ_PRI
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int "RTC Driver Interrupt priority"
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help
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RTC interrupt priority.
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config RTC_QMSI_API_REENTRANCY
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bool
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prompt "RTC shim driver API reentrancy"
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@ -142,12 +142,11 @@ static int rtc_qmsi_init(struct device *dev)
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k_sem_init(RP_GET(dev), 1, UINT_MAX);
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}
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IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_RTC_0_INT), CONFIG_RTC_0_IRQ_PRI,
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qm_rtc_0_isr, NULL,
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IOAPIC_EDGE | IOAPIC_HIGH);
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IRQ_CONNECT(CONFIG_RTC_0_IRQ, CONFIG_RTC_0_IRQ_PRI,
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qm_rtc_0_isr, NULL, CONFIG_RTC_0_IRQ_FLAGS);
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/* Unmask RTC interrupt */
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irq_enable(IRQ_GET_NUMBER(QM_IRQ_RTC_0_INT));
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irq_enable(CONFIG_RTC_0_IRQ);
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/* Route RTC interrupt to the current core */
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QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->rtc_0_int_mask);
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@ -58,10 +58,10 @@
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rtc: rtc@b0000400 {
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compatible = "intel,qmsi-rtc";
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reg = <0xb0000400 0x400>;
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interrupts = <11 IRQ_TYPE_EDGE_RISING 2>;
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interrupt-parent = <&intc>;
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clock-frequency = <32768>;
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interrupts = <11 IRQ_TYPE_EDGE_RISING 2>;
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interrupt-parent = <&intc>;
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label = "RTC_0";
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};
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uart0: uart@b0002000 {
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@ -51,7 +51,7 @@
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clock-frequency = <32768>;
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interrupts = <2 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&intc>;
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label = "RTC_0";
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};
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uart0: uart@b0002000 {
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