boards: Add support for the CC3220SF_LAUNCHXL board

CC3220SF_LAUNCHXL effectively replaces the CC3200_LAUNCHXL,
with support for the CC3220SF SoC, which is an update for
the CC3200 SoC.

This is supported by the Texas Instruments CC3220 SDK.

Jira: ZEP-1958

Change-Id: I2484d3ee87b7f909c783597d95128f2b45db36f2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This commit is contained in:
Gil Pitney 2017-04-18 14:43:44 -07:00 committed by Kumar Gala
commit 70040f0e11
19 changed files with 557 additions and 2 deletions

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# Kconfig - TI SimpleLink CC3220SF LaunchXL Board
#
config BOARD_CC3220SF_LAUNCHXL
bool "TI CC3220SF LAUNCHXL"
depends on SOC_CC3220SF

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# Kconfig - TI CC3220SF LaunchXL board configuration
#
if BOARD_CC3220SF_LAUNCHXL
config BOARD
default cc3220sf_launchxl
endif # BOARD_CC3220SF_LAUNCHXL

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ccflags-y += -I$(srctree)/include/drivers
ccflags-y += -I$(srctree)/drivers
obj-y += pinmux.o
obj-$(CONFIG_CC3220SF_DEBUG) += dbghdr.o

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/*
* Copyright (c) 2017, Texas Instruments Incorporated
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
/* Push button switch 2 */
#define SW2_GPIO_PIN 6 /* GPIO22/Pin15 */
#define SW2_GPIO_NAME "GPIO_A2"
/* Push button switch 3 */
#define SW3_GPIO_PIN 5 /* GPIO13/Pin4 */
#define SW3_GPIO_NAME "GPIO_A1"
/* Push button switch 0: Map to SW2 so zephyr button example works */
#define SW0_GPIO_PIN SW2_GPIO_PIN
#define SW0_GPIO_NAME SW2_GPIO_NAME
/* Onboard GREEN LED */
#define LED0_GPIO_PIN 3 /*GPIO11/Pin2 */
#define LED0_GPIO_PORT "GPIO_A1"
#endif /* __INC_BOARD_H */

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CONFIG_ARM=y
CONFIG_BOARD_CC3220SF_LAUNCHXL=y
CONFIG_SOC_FAMILY_TISIMPLELINK=y
CONFIG_SOC_SERIES_CC32XX=y
CONFIG_SOC_CC3220SF=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_FLASH=y
CONFIG_XIP=n
CONFIG_PRINTK=y
#enable GPIO driver
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_SERIAL_HAS_DRIVER=y
CONFIG_UART_CC32XX=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable CC3220 SDK
CONFIG_HAS_CC3220SDK=y
# Enable DTS parsing
CONFIG_HAS_DTS=y

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/*
* Copyright (c) 2017, Texas Instruments Incorporated
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* This debug header, located at the start of flash, indicates
* to the bootloader that this is a debug image, allowing
* debuggers and flash-loaders to access the chip over JTAG.
* Also, on subsequent reboots, the bootloader skips the integrity
* check, preventing the image from being mass erased.
*
* See section 21.10: "Debugging Flash User Application Using JTAG"
* in the CC3220 TRM: http://www.ti.com/lit/ug/swru465/swru465.pdf
*/
#ifdef CONFIG_CC3220SF_DEBUG
__attribute__ ((section(".dbghdr")))
const unsigned long ulDebugHeader[] = {
0x5AA5A55A,
0x000FF800,
0xEFA3247D
};
#endif

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.. _cc3220sf_launchxl:
CC3220SF LaunchXL
#################
Overview
********
The SimpleLink Wi-Fi CC3220SF LaunchPad development kit (CC3220SF-LAUNCHXL)
highlights CC3220SF, a single-chip wireless microcontroller (MCU) with
1MB Flash, 256KB of RAM and enhanced security features.
See the `TI CC3220 Product Page`_ for details.
Features:
=========
* Two separate execution environments: a user application dedicated ARM
Cortex-M4 MCU and a network processor MCU to run all Wi-Fi and
internet logical layers
* 40-pin LaunchPad standard leveraging the BoosterPack ecosystem
* On-board accelerometer and temperature sensor
* Two buttons and three LEDs for user interaction
* UART through USB to PC
* BoosterPack plug-in module for adding graphical displays, audio
codecs, antenna selection, environmental sensing, and more
* Power from USB for the LaunchPad and optional external BoosterPack
* XDS110-based JTAG emulation with serial port for flash programming
Details on the CC3220SF LaunchXL development board can be found in the
`CC3220SF LaunchXL User's Guide`_.
Hardware
********
The CC3220SF SoC has two MCUs:
#. Applications MCU - an ARM® Cortex®-M4 Core at 80 MHz, with 256Kb RAM,
and access to external serial 1Mb flash with bootloader and peripheral
drivers in ROM.
#. Network Coprocessor (NWP) - a dedicated ARM MCU, which completely
offloads Wi-Fi and internet protocols from the application MCU.
Complete details of the CC3220SF SoC can be found in the `CC3220 TRM`_.
Supported Features
==================
Zephyr has been ported to the Applications MCU, with basic peripheral
driver support.
+-----------+------------+-----------------------+
| Interface | Controller | Driver/Component |
+===========+============+=======================+
| UART | on-chip | serial port-interrupt |
+-----------+------------+-----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-----------------------+
The accelerometer, temperature sensors, or other peripherals
accessible through the BoosterPack, are not currently supported.
Connections and IOs
====================
Peripherals on the CC3220SF LaunchXL are mapped to the following pins in
the file :file:`boards/arm/cc3220sf_launchxl/pinmux.c`.
+------------+-------+-------+
| Function | PIN | GPIO |
+============+=======+=======+
| UART0_TX | 55 | N/A |
+------------+-------+-------+
| UART0_RX | 57 | N/A |
+------------+-------+-------+
| LED D7 (R) | 64 | 9 |
+------------+-------+-------+
| LED D6 (O) | 01 | 10 |
+------------+-------+-------+
| LED D5 (G) | 02 | 11 |
+------------+-------+-------+
| Switch SW2 | 15 | 22 |
+------------+-------+-------+
| Switch SW3 | 04 | 13 |
+------------+-------+-------+
The default configuration can be found in the Kconfig file at
:file:`boards/arm/cc3220sf_launchxl/cc3220sf_launchxl_defconfig`.
Programming and Debugging
*************************
TI offically supports development on the CC3220SF using the TI
`CC3220 SDK`_ on Windows using TI tools: Code Composer Studio for
debugging and `UniFlash`_ for flashing.
For Windows developers, see the `CC3220 Getting Started Guide`_ for
instructions on installation of tools, and how to flash the board using
UniFlash.
The following instructions are geared towards Linux developers.
Flashing
========
The TI UniFlash tool can be used to download a program into flash, which
will persist over subsequent reboots.
Prerequisites:
--------------
#. Python 2.7 (the DSLite tool does not work with Python v 3.x).
#. Download and install `UniFlash`_ version 4.1 for Linux.
#. Jumper SOP[2..0] (J15) to 010, and connect the USB cable to the PC.
This should result in a new device "Texas Instruments XDS110 Embed
with CMSIS-DAP" appearing at /dev/ttyACM1 and /dev/ttyACM0.
#. Update the service pack, and place board in "Development Mode".
Follow the instructions in Section 3.4 "Download the Application",
in the `CC3220 Getting Started Guide`_, except for steps 5 and 6 which
select an MCU image.
#. Ensure the XDS-110 emulation firmware is updated.
Download and install the latest `XDS-110 emulation package`_.
Follow the directions here to update the firmware:
http://processors.wiki.ti.com/index.php/XDS110#Updating_the_XDS110_Firmware
#. Ensure CONFIG_XIP=y is set.
The default board configuration file can be found at
:file:`boards/arm/cc3220sf_launchxl/cc3220sf_launchxl_defconfig`.
This locates the program into flash, and sets CONFIG_CC3220SF_DEBUG=y,
which prepends a debug header enabling the flash to persist over
subsequent reboots, bypassing the bootloader flash signature
verification.
See Section of the 21.10 of the `CC3220 TRM`_ for details on the
secure flash boot process.
Flashing Command:
-----------------
Once the above prerequisites are met, use the UniFlash command line tool
to flash the Zephyr image:
.. code-block:: console
% dslite.sh -c $ZEPHYR_BASE/boards/arm/cc3220sf_launchxl/support/CC3220SF.ccxml \
-e -f zephyr.elf
The CC3220SF.ccxml is a configuration file written by TI's Code Composer
Studio IDE, and required for the dslite.sh tool.
To see program output from UART0, one can execute in a separate terminal
window:
.. code-block:: console
% screen /dev/ttyACM0 115200 8N1
Debugging
=========
It is possible to enable loading and debugging of an application via
OpenOCD and gdb, by linking and locating the program completely in SRAM.
Prerequisites:
--------------
Follow the same prerequisites as in Flashing above, in addition:
#. Ensure OpenOCD v0.9+ is configured/built with CMSIS-DAP support.
#. Power off the board, jumper SOP[2..0] (J15) to 001, and reconnect
the USB cable to the PC.
#. Set CONFIG_XIP=n and build the Zephyr elf file.
The necessary OpenOCD CFG and sample gdbinit scripts can be found in
:file:`boards/arm/cc3220sf_launchxl/support/`.
Debugging Command
-----------------
.. code-block:: console
% arm-none-eabi-gdb -x $ZEPHYR_BASE/boards/arm/cc3220sf_launchxl/support/gdbinit_xds110 \
zephyr.elf
References
**********
CC32xx Wiki:
http://processors.wiki.ti.com/index.php/CC31xx_%26_CC32xx
.. _TI CC3220 Product Page:
http://www.ti.com/product/cc3220
.. _CC3220 TRM:
http://www.ti.com/lit/ug/swru465/swru465.pdf
.. _CC3220 Programmer's Guide:
http://www.ti.com/lit/ug/swru464/swru464.pdf
.. _CC3220 Getting Started Guide:
http://www.ti.com/lit/ug/swru461/swru461.pdf
.. _UniFlash:
http://processors.wiki.ti.com/index.php/Category:CCS_UniFlash
.. _CC3220 SDK:
http://www.ti.com/tool/download/SIMPLELINK-CC3220-SDK
.. _CC3220SF LaunchXL User's Guide:
http://www.ti.com/lit/ug/swru463/swru463.pdf
.. _XDS-110 emulation package:
http://processors.wiki.ti.com/index.php/XDS_Emulation_Software_Package#XDS110_Reset_Download

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/*
* pinmux.c
*
* configure the device pins for different peripheral signals
*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file was automatically generated on 7/21/2014 at 3:06:20 PM
* by TI PinMux version 3.0.334
* (Then modified to meet Zephyr coding style)
*/
/*
* TI Recommends use of the PinMux utility to ensure consistent configuration
* of pins: http://processors.wiki.ti.com/index.php/TI_PinMux_Tool
*
* Zephyr GPIO API however allows runtime configuration by applications.
*
* For the TI CC32XX port we leverage this output file
* from the PinMux tool, and guard sections based on Kconfig variables.
*
* The individual (uart/gpio) driver init/configuration functions
* therefore assume pinmux initialization is done here rather in the drivers
* at runtime.
*/
#include <init.h>
#include "pinmux.h"
#include <inc/hw_types.h>
#include <inc/hw_memmap.h>
#include <inc/hw_gpio.h>
#include <driverlib/pin.h>
#include <driverlib/rom.h>
#include <driverlib/rom_map.h>
#include <driverlib/gpio.h>
#include <driverlib/prcm.h>
int pinmux_initialize(struct device *port)
{
ARG_UNUSED(port);
#ifdef CONFIG_UART_CC32XX
/* Configure PIN_55 for UART0 UART0_TX */
MAP_PinTypeUART(PIN_55, PIN_MODE_3);
/* Configure PIN_57 for UART0 UART0_RX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3);
#endif
#ifdef CONFIG_GPIO_CC32XX_A1
/* Enable Peripheral Clocks */
MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK);
/* The following enables the 3 LEDs for the blinking samples */
/* Configure PIN_64 for GPIOOutput */
MAP_PinTypeGPIO(PIN_64, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA1_BASE, 0x2, GPIO_DIR_MODE_OUT);
/* Configure PIN_01 for GPIOOutput */
MAP_PinTypeGPIO(PIN_01, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA1_BASE, 0x4, GPIO_DIR_MODE_OUT);
/* Configure PIN_02 for GPIOOutput */
MAP_PinTypeGPIO(PIN_02, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA1_BASE, 0x8, GPIO_DIR_MODE_OUT);
/* SW3: Configure PIN_04 (GPIO13) for GPIOInput */
MAP_PinTypeGPIO(PIN_04, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA1_BASE, 0x20, GPIO_DIR_MODE_IN);
#endif
#ifdef CONFIG_GPIO_CC32XX_A2
MAP_PRCMPeripheralClkEnable(PRCM_GPIOA2, PRCM_RUN_MODE_CLK);
/* SW2: Configure PIN_15 (GPIO22) for GPIOInput */
MAP_PinTypeGPIO(PIN_15, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA2_BASE, 0x40, GPIO_DIR_MODE_IN);
#endif
#ifdef CONFIG_GPIO_CC32XX_A3
MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK);
#endif
return 0;
}
SYS_INIT(pinmux_initialize, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="configuration_0">
<instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe">
<instance XML_version="1.2" href="drivers/tixds510icepick_c.xml" id="drivers" xml="tixds510icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cortexM.xml" id="drivers" xml="tixds510cortexM.xml" xmlpath="drivers"/>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="CC3220SF" href="devices/CC3220SF.xml" id="CC3220SF" xml="CC3220SF.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>

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#*****************************************************************************
#
# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
#
# SPDX-License-Identifier: Apache-2.0
#
#*****************************************************************************
#
# CC3220 via CMSIS-DAP interface on XDS110 debug probe
#
# CMSIS-DAP support in OpenOCD can only use SWD mode. So
# jumper SOP0 only, and reset the target before connect.
#
interface cmsis-dap
cmsis_dap_vid_pid 0x0451 0xbef3
adapter_khz 2500
set _ENDIAN little
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME cc3220
}
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x0b97c02f
}
swd newdap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
set _TARGETNAME $_CHIPNAME.cpu
target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap
$_CHIPNAME.cpu configure -work-area-phys 0x20000000 -work-area-size 0x30000 -work-area-backup 0 -coreid 0
source [find mem_helper.tcl]
$_TARGETNAME configure -event gdb-attach {
halt
}

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#*****************************************************************************
#
# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
#
# SPDX-License-Identifier: Apache-2.0
#
#*****************************************************************************
# Modify to point to your own Zephyr base:
target remote | openocd -c "gdb_port pipe; log_output openocd.log" -f ~/zephyr/boards/arm/cc3220sf_launchxl/support/cc3220_xds110.cfg
monitor soft_reset_halt
load
break _Cstart
set remotetimeout 10000

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@ -4,6 +4,7 @@ dtb-$(CONFIG_BOARD_FRDM_KW41Z) = frdm_kw41z.dts_compiled
dtb-$(CONFIG_BOARD_HEXIWEAR_K64) = hexiwear_k64.dts_compiled
dtb-$(CONFIG_BOARD_HEXIWEAR_KW40Z) = hexiwear_kw40z.dts_compiled
dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL) = cc3200_launchxl.dts_compiled
dtb-$(CONFIG_BOARD_CC3220SF_LAUNCHXL) = cc3220sf_launchxl.dts_compiled
dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled
dtb-$(CONFIG_BOARD_V2M_BEETLE) = v2m_beetle.dts_compiled
dtb-$(CONFIG_BOARD_OLIMEXINO_STM32) = olimexino_stm32.dts_compiled

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/dts-v1/;
#include <ti/cc32xx.dtsi>
/ {
model = "TI CC3220SF LaunchXL";
compatible = "ti,cc3220sf-launchxl", "ti,cc3220sf", "ti,cc32xx";
aliases {
uart_0 = &uart0;
uart_1 = &uart1;
};
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash1;
};
};
&uart0 {
status = "ok";
baud-rate = <115200>;
};

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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS

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@ -24,6 +24,10 @@
reg = <0x0 DT_SFLASH_SIZE>;
};
flash1: flash {
reg = <0x01000000 DT_FLASH_SIZE>;
};
soc {
uart0: uart@4000C000 {
compatible = "ti,cc32xx-uart";

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@ -7,6 +7,11 @@
#define DT_SFLASH_SIZE __SIZE_K(1024)
#define DT_SRAM_SIZE __SIZE_K(240)
#define DT_SRAM_START 0x20004000
#elif defined(CONFIG_SOC_CC3220SF)
#define DT_SFLASH_SIZE __SIZE_K(1024)
#define DT_FLASH_SIZE __SIZE_K(1024)
#define DT_SRAM_SIZE __SIZE_K(256)
#define DT_SRAM_START 0x20000000
#else
#error "Flash and RAM sizes not defined for this chip"
#endif

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@ -80,6 +80,13 @@ SECTIONS
SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
{
#ifdef CONFIG_CC3220SF_DEBUG
/* Add CC3220SF flash header to disable flash verification */
. = 0x0;
KEEP(*(.dbghdr))
KEEP(*(".dbghdr.*"))
#endif
. = CONFIG_TEXT_SECTION_OFFSET;
KEEP(*(.exc_vector_table))
KEEP(*(".exc_vector_table.*"))

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@ -6,7 +6,8 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
arduino_101_ble cc3200_launchxl quark_se_c1000_ble bbc_microbit
v2m_beetle nucleo_l476rg nrf52840_pca10056 nucleo_f411re
stm3210c_eval nucleo_f334r8 stm32373c_eval mps2_an385 frdm_kw41z
sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
cc3220sf_launchxl
supported_toolchains = zephyr gccarmemb

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@ -1,6 +1,6 @@
[test]
tags = core bat_commit
platform_exclude = cc3200_launchxl
platform_exclude = cc3200_launchxl cc3220sf_launchxl
filter = not CONFIG_SOC_RISCV32_PULPINO
# TODO https://jira.zephyrproject.org/browse/ZEP-1676
arch_exclude = xtensa