lpc: Add nxp_lpc soc family to soc directory
Add soc configuration support for lpc soc family, Kconfigs and soc files for lpcxxx soc. Add dtsi file for lpc54xxx. Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com> Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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13 changed files with 370 additions and 0 deletions
7
arch/arm/soc/nxp_lpc/CMakeLists.txt
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7
arch/arm/soc/nxp_lpc/CMakeLists.txt
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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add_subdirectory(${SOC_SERIES})
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27
arch/arm/soc/nxp_lpc/Kconfig
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arch/arm/soc/nxp_lpc/Kconfig
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_FAMILY_LPC
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bool
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# omit prompt to signify a "hidden" option
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default n
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if SOC_FAMILY_LPC
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config SOC_FAMILY
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string
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default "nxp_lpc"
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endif
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source "arch/arm/soc/nxp_lpc/*/Kconfig.soc"
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config SOC_PART_NUMBER
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string
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default SOC_PART_NUMBER_LPC54XXX if SOC_SERIES_LPC54XXX
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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the default value for this string.
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7
arch/arm/soc/nxp_lpc/Kconfig.defconfig
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arch/arm/soc/nxp_lpc/Kconfig.defconfig
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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source "arch/arm/soc/nxp_lpc/*/Kconfig.defconfig.series"
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7
arch/arm/soc/nxp_lpc/Kconfig.soc
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arch/arm/soc/nxp_lpc/Kconfig.soc
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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source "arch/arm/soc/nxp_lpc/*/Kconfig.series"
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9
arch/arm/soc/nxp_lpc/lpc54xxx/CMakeLists.txt
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arch/arm/soc/nxp_lpc/lpc54xxx/CMakeLists.txt
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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zephyr_sources(
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soc.c
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)
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35
arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114
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arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lpc54114
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# Kconfig - NXP LPC54114 platform configuration options
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_LPC54114
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config SOC
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string
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default lpc54114
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if PINMUX
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config PINMUX_MCUX_LPC
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def_bool y
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endif # PINMUX
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if GPIO
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config GPIO_MCUX_LPC
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def_bool y
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endif # GPIO
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if SERIAL
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config USART_MCUX_LPC
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def_bool y
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endif # SERIAL
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endif # SOC_LPC54114
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20
arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.series
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arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.series
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# Kconfig - LPC54XXX series configuration options
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_SERIES_LPC54XXX
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config SOC_SERIES
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default lpc54xxx
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config NUM_IRQS
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int
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# must be >= the highest interrupt number used
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default 40
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source "arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.defconfig.lp*"
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endif # SOC_SERIES_LPC54XXX
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arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.series
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arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.series
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# Kconfig - LPC LPC54XXX MCU line
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_SERIES_LPC54XXX
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bool "LPC LPC54xxx Series MCU"
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select CPU_CORTEX_M
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select CPU_CORTEX_M4
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select SOC_FAMILY_LPC
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select CPU_HAS_SYSTICK
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help
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Enable support for LPC LPC54XXX MCU series
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arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.soc
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arch/arm/soc/nxp_lpc/lpc54xxx/Kconfig.soc
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# Kconfig - LPC LPC54XXX MCU line
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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choice
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prompt "LPC LPC54XXX MCU Selection"
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depends on SOC_SERIES_LPC54XXX
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config SOC_LPC54114
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bool "SOC_LPC54114"
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select HAS_MCUX
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endchoice
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if SOC_SERIES_LPC54XXX
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config SOC_PART_NUMBER_LPC54114J256BD64
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bool
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config SOC_PART_NUMBER_LPC54XXX
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string
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default "LPC54114J256BD64" if SOC_PART_NUMBER_LPC54114J256BD64
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help
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This string holds the full part number of the SoC. It is a hidden
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option that you should not set directly. The part number selection
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choice defines the default value for this string.
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endif # SOC_SERIES_LPC54XXX
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16
arch/arm/soc/nxp_lpc/lpc54xxx/linker.ld
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arch/arm/soc/nxp_lpc/lpc54xxx/linker.ld
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* This is the linker script for both standard images and XIP images.
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*/
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#include <autoconf.h>
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#include <arch/arm/cortex_m/scripts/linker.ld>
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105
arch/arm/soc/nxp_lpc/lpc54xxx/soc.c
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arch/arm/soc/nxp_lpc/lpc54xxx/soc.c
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief System/hardware module for nxp_lpc54114 platform
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*
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* This module provides routines to initialize and support board-level
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* hardware for the nxp_lpc54114 platform.
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <soc.h>
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#include <uart.h>
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#include <linker/sections.h>
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#include <arch/cpu.h>
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#include <cortex_m/exc.h>
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#include <clock_config.h>
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#include <fsl_lpc_power.h>
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#include <fsl_clock.h>
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#include <fsl_common.h>
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#include <fsl_device_registers.h>
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/**
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*
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* @brief Initialize the system clock
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*
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* @return N/A
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*
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*/
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static ALWAYS_INLINE void clkInit(void)
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{
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/* Set up the clock sources */
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/* Ensure FRO is on */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN);
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/*
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* Switch to FRO 12MHz first to ensure we can change voltage without
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* accidentally being below the voltage for current speed.
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*/
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CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);
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/* Set FLASH wait states for core */
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CLOCK_SetFLASHAccessCyclesForFreq(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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/* Set up high frequency FRO output to selected frequency */
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CLOCK_SetupFROClocking(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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/* Set up dividers */
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/* Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);
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/* Set up clock selectors - Attach clocks to the peripheries */
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/* Switch MAIN_CLK to FRO_HF */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);
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/* Attach 12 MHz clock to FLEXCOMM0 */
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
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}
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/**
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*
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* @brief Perform basic hardware initialization
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*
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* Initialize the interrupt controller device drivers.
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* Also initialize the timer device driver, if required.
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*
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* @return 0
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*/
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static int nxp_lpc54114_init(struct device *arg)
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{
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ARG_UNUSED(arg);
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/* old interrupt lock level */
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int oldLevel;
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/* disable interrupts */
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oldLevel = irq_lock();
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_ClearFaults();
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/* Initialize FRO/system clock to 48 MHz */
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clkInit();
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/*
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* install default handler that simply resets the CPU if configured in
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* the kernel, NOP otherwise
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*/
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NMI_INIT();
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/* restore interrupt state */
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irq_unlock(oldLevel);
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return 0;
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}
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SYS_INIT(nxp_lpc54114_init, PRE_KERNEL_1, 0);
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arch/arm/soc/nxp_lpc/lpc54xxx/soc.h
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arch/arm/soc/nxp_lpc/lpc54xxx/soc.h
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Board configuration macros for the nxp_lpc54114 platform
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*
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* This header file is used to specify and describe board-level aspects for the
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* 'nxp_lpc54114' platform.
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*/
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#ifndef _SOC__H_
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#define _SOC__H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <misc/util.h>
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#include <fsl_common.h>
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#endif /* !_ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC__H_ */
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57
dts/arm/nxp/nxp_lpc54xxx.dtsi
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dts/arm/nxp/nxp_lpc54xxx.dtsi
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4f";
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};
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cpu@1 {
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compatible = "arm,cortex-m0+";
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};
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};
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sram0:memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x10000>;
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};
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sram1:memory@20010000 {
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compatible = "mmio-sram";
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reg = <0x20010000 0x10000>;
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};
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sram2:memory@20020000 {
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compatible = "mmio-sram";
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reg = <0x20020000 0x8000>;
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};
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sramx:memory@40000000{
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compatible = "mmio-sram";
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reg = <0x40000000 0x8000>;
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};
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soc {
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flash0:flash@0 {
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reg = <0 0x40000>;
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};
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usart0:usart@40086000 {
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compatible = "nxp,lpc-usart";
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reg = <0x40086000 0xE44>;
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interrupts = <14 0>;
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label = "USART_0";
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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