Although we can get the number of configured OUT and IN endpoints and
endpoint capabilities from the DWC GHWCFGn registers, we need to
configure the number of endpoint configuration structs at build time. On
some platforms, we cannot access the hardware register at pre-init, so
we use the GHWCFGn values from the devicetree to provide endpoint
capabilities. This can be considered a workaround, and we may change the
upper layer internals to avoid it in the future.
Also, add a new vendor quirk to fill in platform-specific controller
capabilities.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add driver for TSic 206/306/316/506F/516/716 temperature sensor.
The driver uses PWM capture driver to read a single wire with
Manchester-like encoding.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Move it to a common file named `zephyr,memory-common.yaml`, which
replaces `zephyr,memory-attr.yaml` and takes its contents as well.
This is so that another binding, e.g., `vnd,memory-region`, can support
being combined with the `zephyr,memory-region` binding like so:
node@deadbeef {
compatible = "vnd,memory-region", "zephyr,memory-region";
zephyr,memory-region = "NAME";
...
};
To allow this, edtlib would require `vnd,memory-region` to include the
property definitions from this new common file.
The same can't be done by including `zephyr,memory-region.yaml` directly
because that file marks the property in question as always required, and
it shouldn't be required whenever the `vnd,memory-region` compatible is
used on its own.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Add the Kconfig options and use the aliased
addresses for the bootcode regions of the IMX7D
and IMX6SX SOCs to allow the Linux rproc
framework to load the irq-vectors into
the correct memory areas.
Activating this option might enlarge the bin
file if the zephyr,flash and rom_start chosen
region addresses are not matching.
It is up to the user to enable this feature
based on code location choices (OCRAM, DDR, TCM...).
Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
By default, the QSPI region is marked as EXTMEM and inaccessible
(see #57467), mark the first 64MB as IO on stm32f769i_disco.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The gpio-emul driver does not actually require any reg property,
since it is not in the physical memory map of any device. So
let's remove that property from the bindings.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Remove all CAN controller "bus-speed" and "bus-speed-data"
properties. These all use the default bitrates set via Kconfig.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set the default initial bitrates globally via Kconfig. The initial bitrates
can still be overridden using the "bus-speed" and "bus-speed-data"
devicetree properties.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove nxp_ground_select property.
Delete the use of NXP vref peripheral CSR register REFL_GRL_SEL bit.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
PHYTEC has multiple offices in different locations like
the US, France, India and China. The headquarter is located in
Germany. Since now 50% of the PHYTEC boards are from the US
office, we should drop 'Messtechnik GmbH', which is the offical
title of the German office, and keep the name more general.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Define the xspi node instead of ospi. Note that RCC CCIPR4 register
keeps the OCTOSP1 for clock domain selection.
Change the header file to xspi for the stm32 devices with xspi
peripheral. Keep the flash_controller/ospi.h for bindings compatibilty.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The new bindings for the stm32 xspi is for new stm32 devices with
XSPI peripherals like the stm32h5 serie. This is close to the octo-spi.
Adapt the flash controller constants to the XSPI model especially.
This is done through a new xspi.h definition file.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add driver, together with the corresponding dts binding and node in
the nRF54H20 SoC definiton, for the nRF temperature sensor that cannot
be accessed directly but only through nRF Services (nrfs) layer.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit makes the devicetrees of the targets that are based on the QEMU
`virt` machine more consistent with the rest of the RISC-V targets in
Zephyr by:
* adding the `riscv,isa` property
* adding a compatible string which uniquely identifies the `virt` core
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Add USDHC0 node to the mcxn94x devicetree. This node describes the one
instance of the Ultra Secured Digital Host Controller IP present on the
MCXN94x series SOCs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The CSI can connect to either a camera sensor (as on i.MX RT10xx) or
a MIPI CSI-2 receiver (as on i.MX RT11xx). To be generic, change the
naming from sensor to source.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Add initial HID device support. Unlike the existing HID implementation,
the new implementation uses a devicetree to instantiate a HID device.
To the user, the HID device appears as a normal Zephyr RTOS device.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add DT node entries to RW for DAC and ADC.
Support the SOC required initialization of the DAC and ADC on RW.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commits adds required pinctrl node to provide the corresponding SIO
clock selection for the Serial Port under the different VOSCCLK.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The clk, dqs and ncs pins can be remapped between OSPI instances, but the
driver doesn't support it, yet. Therefore replace hard coded numbers to
device tree optional properties.
Signed-off-by: Samuel Kleiser <s.kleiser@vega.com>
iMXRT1042 SOC should be clocked at 528 MHz maximum. Correct the clock
setup to use the system PLL.
Fixes#70755
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow configuration of the system pll on the iMXRT10xx series parts, via
a fractional pll node under the CCM module.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adding required flag to the current-speed as without this driver
does not compile.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Michael Hope
