dts: nxp_k6x: add flash write-block-size
This makes the SoC flash compatible with the common nonvolatile flash YAML schema, and provides a write alignment. It mirrors work done on nRF chips for the DFU subsystem. Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
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@ -71,7 +71,10 @@
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0 0x100000>;
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write-block-size = <8>;
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};
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};
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