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drivers/i2c: Use standard bitrate settings for DW driver

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Applying the change to relevant arch/boards, either in their Kconfig or
the dts specific files.

Taking the opportunity in dw driver to rename the variable the same way
as they are everywhere else in the code (s/dev/dw and s/port/dev) in
init function.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2018-02-28 21:33:02 +01:00 • committed by Kumar Gala
commit 8f891ba702
6 changed files with 31 additions and 25 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/x86/soc/intel_quark/quark_x1000/Kconfig.defconfig.series
View file

@ -70,8 +70,6 @@ config I2C_0
if I2C_0
config I2C_0_DEFAULT_CFG
default 0x12
config I2C_0_IRQ_PRI
default 2

1
arch/x86/soc/intel_quark/quark_x1000/dts.fixup
View file

@ -16,3 +16,4 @@
#define CONFIG_I2C_0_IRQ_FLAGS SNPS_DESIGNWARE_I2C_90007000_IRQ_0_SENSE
#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_90007000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_90007000_LABEL
#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_90007000_CLOCK_FREQUENCY

10
boards/arc/em_starterkit/Kconfig.defconfig
View file

@ -84,8 +84,9 @@ if I2C_0
config I2C_0_NAME
default "I2C_0"
config I2C_0_DEFAULT_CFG
default 0x3
config I2C_0_BITRATE
int
default 100000
config I2C_0_IRQ_PRI
default 1
@ -98,8 +99,9 @@ if I2C_1
config I2C_1_NAME
default "I2C_1"
config I2C_1_DEFAULT_CFG
default 0x3
config I2C_1_BITRATE
int
default 100000
config I2C_1_IRQ_PRI
default 1

39
drivers/i2c/i2c_dw.c
View file

@ -33,6 +33,8 @@
#include "i2c_dw.h"
#include "i2c_dw_registers.h"
#include "i2c-priv.h"
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_I2C_LEVEL
#include <logging/sys_log.h>
@ -644,25 +646,24 @@ static inline int i2c_dw_pci_setup(struct device *dev)
#define i2c_dw_pci_setup(_unused_) (1)
#endif /* CONFIG_PCI */
static int i2c_dw_initialize(struct device *port)
static int i2c_dw_initialize(struct device *dev)
{
const struct i2c_dw_rom_config * const rom = port->config->config_info;
struct i2c_dw_dev_config * const dev = port->driver_data;
const struct i2c_dw_rom_config * const rom = dev->config->config_info;
struct i2c_dw_dev_config * const dw = dev->driver_data;
volatile struct i2c_dw_registers *regs;
if (!i2c_dw_pci_setup(port)) {
port->driver_api = NULL;
if (!i2c_dw_pci_setup(dev)) {
dev->driver_api = NULL;
return -EIO;
}
k_sem_init(&dev->device_sync_sem, 0, UINT_MAX);
k_sem_init(&dw->device_sync_sem, 0, UINT_MAX);
regs = (struct i2c_dw_registers *) dev->base_address;
regs = (struct i2c_dw_registers *) dw->base_address;
/* verify that we have a valid DesignWare register first */
if (regs->ic_comp_type != I2C_DW_MAGIC_KEY) {
port->driver_api = NULL;
dev->driver_api = NULL;
SYS_LOG_DBG("I2C: DesignWare magic key not found, check base "
"address. Stopping initialization");
return -EIO;
@ -675,21 +676,22 @@ static int i2c_dw_initialize(struct device *port)
*/
if (regs->ic_con.bits.speed == I2C_DW_SPEED_HIGH) {
SYS_LOG_DBG("I2C: high speed supported");
dev->support_hs_mode = true;
dw->support_hs_mode = true;
} else {
SYS_LOG_DBG("I2C: high speed NOT supported");
dev->support_hs_mode = false;
dw->support_hs_mode = false;
}
rom->config_func(port);
rom->config_func(dev);
if (i2c_dw_runtime_configure(port, dev->app_config) != 0) {
SYS_LOG_DBG("I2C: Cannot set default configuration 0x%x",
dev->app_config);
dw->app_config = I2C_MODE_MASTER | _i2c_map_dt_bitrate(rom->bitrate);
if (i2c_dw_runtime_configure(dev, dw->app_config) != 0) {
SYS_LOG_DBG("I2C: Cannot set default configuration");
return -EIO;
}
dev->state = I2C_DW_STATE_READY;
dw->state = I2C_DW_STATE_READY;
return 0;
}
@ -704,11 +706,11 @@ static const struct i2c_dw_rom_config i2c_config_dw_0 = {
#ifdef CONFIG_GPIO_DW_0_IRQ_SHARED
.shared_irq_dev_name = CONFIG_I2C_DW_0_IRQ_SHARED_NAME,
#endif
.bitrate = CONFIG_I2C_0_BITRATE,
};
static struct i2c_dw_dev_config i2c_0_runtime = {
.base_address = CONFIG_I2C_0_BASE_ADDR,
.app_config = CONFIG_I2C_0_DEFAULT_CFG,
#if CONFIG_PCI
.pci_dev.class_type = I2C_DW_PCI_CLASS,
.pci_dev.bus = I2C_DW_0_PCI_BUS,
@ -752,12 +754,11 @@ static void i2c_config_1(struct device *port);
static const struct i2c_dw_rom_config i2c_config_dw_1 = {
.config_func = i2c_config_1,
.bitrate = CONFIG_I2C_1_BITRATE,
};
static struct i2c_dw_dev_config i2c_1_runtime = {
.base_address = CONFIG_I2C_1_BASE_ADDR,
.app_config = CONFIG_I2C_1_DEFAULT_CFG,
#if CONFIG_PCI
.pci_dev.class_type = I2C_DW_PCI_CLASS,
.pci_dev.bus = I2C_DW_1_PCI_BUS,

2
drivers/i2c/i2c_dw.h
View file

@ -90,6 +90,8 @@ struct i2c_dw_rom_config {
#ifdef CONFIG_I2C_DW_SHARED_IRQ
char *shared_irq_dev_name;
#endif /* CONFIG_I2C_DW_SHARED_IRQ */
u32_t bitrate;
};

2
dts/x86/quark_x1000.dtsi
View file

@ -1,5 +1,6 @@
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/intel-ioapic.h>
#include <dt-bindings/i2c/i2c.h>
#define __SIZE_K(x) (x * 1024)
@ -62,6 +63,7 @@
i2c0: i2c@90007000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x90007000 0x400>;