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arm: dts: Add DTS support for NRF52832 SoC

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Add plumbing to build system and SoC level dtsi for the NRF52832 SoC.
We additionally add the necessary yaml files for the UART on the NRF52
SoCs.

Change-Id: I3b4a821b2993827e33d8e84bdbbc759d1521f8bd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-04-11 10:05:42 -05:00
commit 77f65b907f
7 changed files with 128 additions and 0 deletions
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2
arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.nrf52832_QFAA
View file

@ -12,11 +12,13 @@ config SOC
string
default nRF52832_QFAA
if !HAS_DTS
config SRAM_SIZE
default 64
config FLASH_SIZE
default 512
endif
config NUM_IRQS
int

2
arch/arm/soc/nordic_nrf5/nrf52/Kconfig.defconfig.series
View file

@ -19,6 +19,7 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
config SYS_POWER_MANAGEMENT
default y
if !HAS_DTS
config SRAM_BASE_ADDRESS
default 0x20000000
@ -28,5 +29,6 @@ config FLASH_BASE_ADDRESS
config NUM_IRQ_PRIO_BITS
int
default 3
endif
endif # SOC_SERIES_NRF52X

2
drivers/serial/Kconfig.nrf5
View file

@ -24,6 +24,7 @@ config UART_NRF5_NAME
This is the device name for UART, and is included in the device
struct.
if !HAS_DTS
config UART_NRF5_IRQ_PRI
int "UART Interrupt Priority (Interrupt support)"
range 0 1 if SOC_SERIES_NRF51X
@ -41,6 +42,7 @@ config UART_NRF5_BAUD_RATE
depends on UART_NRF5
help
The baud rate for UART port to be set to at boot.
endif
config UART_NRF5_CLK_FREQ
int

31
dts/arm/nordic/mem.h Normal file
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@ -0,0 +1,31 @@
#ifndef __DT_BINDING_ST_MEM_H
#define __DT_BINDING_ST_MEM_H
#define __SIZE_K(x) (x * 1024)
#if defined(CONFIG_SOC_NRF51822_QFAA)
#define DT_FLASH_SIZE __SIZE_K(256)
#define DT_SRAM_SIZE __SIZE_K(16)
#elif defined(CONFIG_SOC_NRF51822_QFAB)
#define DT_FLASH_SIZE __SIZE_K(128)
#define DT_SRAM_SIZE __SIZE_K(16)
#elif defined(CONFIG_SOC_NRF51822_QFAC)
#define DT_FLASH_SIZE __SIZE_K(256)
#define DT_SRAM_SIZE __SIZE_K(32)
#elif defined(CONFIG_SOC_NRF52832_QFAA)
#define DT_FLASH_SIZE __SIZE_K(512)
#define DT_SRAM_SIZE __SIZE_K(64)
#elif defined(CONFIG_SOC_NRF52832_CIAA)
#define DT_FLASH_SIZE __SIZE_K(512)
#define DT_SRAM_SIZE __SIZE_K(64)
#elif defined(CONFIG_SOC_NRF52832_QFAB)
#define DT_FLASH_SIZE __SIZE_K(256)
#define DT_SRAM_SIZE __SIZE_K(32)
#elif defined(CONFIG_SOC_NRF52840_QIAA)
#define DT_FLASH_SIZE __SIZE_K(1024)
#define DT_SRAM_SIZE __SIZE_K(256)
#else
#error "Flash and RAM sizes not defined for this chip"
#endif
#endif /* __DT_BINDING_ST_MEM_H */

31
dts/arm/nordic/nrf52832.dtsi Normal file
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@ -0,0 +1,31 @@
#include <arm/armv7-m.dtsi>
#include <nordic/mem.h>
/ {
cpus {
cpu@0 {
compatible = "arm,cortex-m4f";
};
};
flash0: flash {
reg = <0x00000000 DT_FLASH_SIZE>;
};
sram0: memory {
reg = <0x20000000 DT_SRAM_SIZE>;
};
soc {
uart0: uart@40002000 {
compatible = "nordic,nrf-uarte", "nordic,nrf-uart";
reg = <0x40002000 0x1000>;
interrupts = <2 1>;
status = "disabled";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

30
dts/arm/yaml/nordic,nrf-uart.yaml Normal file
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@ -0,0 +1,30 @@
---
title: Nordic UART
id: nordic,nrf-uart
version: 0.1
description: >
This binding gives a base representation of the Nordic UART
inherits:
- !include uart.yaml
properties:
- compatible:
type: string
category: required
description: compatible strings
constraint: "nordic,nrf-uart"
- reg:
type: array
description: mmio register space
generation: define
category: required
- interrupts:
type: array
category: required
description: required interrupts
generation: define
...

30
dts/arm/yaml/nordic,nrf-uarte.yaml Normal file
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@ -0,0 +1,30 @@
---
title: Nordic UARTE
id: nordic,nrf-uarte
version: 0.1
description: >
This binding gives a base representation of the Nordic UARTE
inherits:
- !include uart.yaml
properties:
- compatible:
type: string
category: required
description: compatible strings
constraint: "nordic,nrf-uarte"
- reg:
type: array
description: mmio register space
generation: define
category: required
- interrupts:
type: array
category: required
description: required interrupts
generation: define
...