arm: stm32f2: Add support for stm32f2 series
Add necessary kconfig and DTS files for stm32f2 series Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
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9 changed files with 190 additions and 0 deletions
4
arch/arm/soc/st_stm32/stm32f2/CMakeLists.txt
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arch/arm/soc/st_stm32/stm32f2/CMakeLists.txt
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zephyr_include_directories(${ZEPHYR_BASE}/drivers)
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zephyr_sources(
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soc.c
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)
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15
arch/arm/soc/st_stm32/stm32f2/Kconfig.defconfig.series
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arch/arm/soc/st_stm32/stm32f2/Kconfig.defconfig.series
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# Kconfig - ST Microelectronics STM32F2 MCU line
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#
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# Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_SERIES_STM32F2X
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gsource "arch/arm/soc/st_stm32/stm32f2/Kconfig.defconfig.stm32f2*"
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config SOC_SERIES
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default "stm32f2"
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endif # SOC_SERIES_STM32F2X
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arch/arm/soc/st_stm32/stm32f2/Kconfig.series
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arch/arm/soc/st_stm32/stm32f2/Kconfig.series
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# Kconfig - ST Microelectronics STM32F2X MCU series
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#
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# Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_SERIES_STM32F2X
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bool "stm32f2x Series MCU"
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select CPU_CORTEX_M
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select CPU_CORTEX_M3
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select SOC_FAMILY_STM32
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select HAS_STM32CUBE
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select CPU_HAS_SYSTICK
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help
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Enable support for stm32f2 MCU series
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3
arch/arm/soc/st_stm32/stm32f2/dts.fixup
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arch/arm/soc/st_stm32/stm32f2/dts.fixup
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/* SoC level DTS fixup file */
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/* End of SoC Level DTS fixup file */
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9
arch/arm/soc/st_stm32/stm32f2/linker.ld
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arch/arm/soc/st_stm32/stm32f2/linker.ld
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/* linker.ld - Linker command/script file */
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/*
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* Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arch/arm/cortex_m/scripts/linker.ld>
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53
arch/arm/soc/st_stm32/stm32f2/soc.c
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arch/arm/soc/st_stm32/stm32f2/soc.c
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/*
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* Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief System/hardware module for stm32f2 processor
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*/
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <soc.h>
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#include <arch/cpu.h>
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#include <cortex_m/exc.h>
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#include <linker/linker-defs.h>
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#include <string.h>
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/**
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* @brief Perform basic hardware initialization at boot.
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*
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* This needs to be run from the very beginning.
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* So the init priority has to be 0 (zero).
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*
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* @return 0
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*/
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static int stm32f2_init(struct device *arg)
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{
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u32_t key;
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ARG_UNUSED(arg);
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key = irq_lock();
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_ClearFaults();
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/* Install default handler that simply resets the CPU
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* if configured in the kernel, NOP otherwise
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*/
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NMI_INIT();
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, system core clock is set to 16 MHz from HSI */
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SystemCoreClock = 16000000;
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return 0;
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}
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SYS_INIT(stm32f2_init, PRE_KERNEL_1, 0);
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34
arch/arm/soc/st_stm32/stm32f2/soc.h
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arch/arm/soc/st_stm32/stm32f2/soc.h
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/*
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* Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file SoC configuration macros for the stm32f2 family processors.
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*
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* Based on reference manual:
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* stm32f2X advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 2.2: Memory organization
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*/
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#ifndef _STM32F2_SOC_H_
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#define _STM32F2_SOC_H_
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#define GPIO_REG_SIZE 0x400
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/* base address for where GPIO registers start */
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#define GPIO_PORTS_BASE (GPIOA_BASE)
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <misc/util.h>
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#include <random/rand32.h>
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#include <stm32f2xx.h>
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32F2_SOC_H_ */
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12
dts/arm/st/stm32f2-pinctrl.dtsi
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dts/arm/st/stm32f2-pinctrl.dtsi
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/*
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* Copyright (c) 2018 qianfan Zhao
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/stm32-pinctrl.h>
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/ {
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soc {
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};
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};
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dts/arm/st/stm32f2.dtsi
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dts/arm/st/stm32f2.dtsi
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/*
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* Copyright (c) 2018 qianfan Zhao
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <st/mem.h>
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#include <st/stm32f2-pinctrl.dtsi>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m3";
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reg = <0>;
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};
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SRAM_SIZE>;
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};
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soc {
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flash-controller@40023c00 {
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@8000000 {
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compatible = "soc-nv-flash";
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label = "FLASH_STM32";
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reg = <0x08000000 DT_FLASH_SIZE>;
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write-block-size = <1>;
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};
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};
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};
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};
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