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cc3200: Resolve DTS fixup.

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As part of the transition to Device Tree, a temporary
HAS_DTS configuration variable, and a .fixup file per board
with symbol aliases were added.

This patch removes the cc32xx related fixup file
definitions, except for those used additionally outside
the cc32xx drivers.

Since cc32xx has DTS files, and since HAS_DTS will always be true,
it also removes the 'if !HAS_DTS' blocks from the cc32xx Kconfig
files.

Change-Id: I1c1b9f734795f523342f82ab32f2a38983812c0b
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Gil Pitney 2017-03-29 18:19:58 -07:00 • committed by Kumar Gala
commit 9b12803bf7
5 changed files with 5 additions and 49 deletions
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16
arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc3200
View file

@ -11,15 +11,6 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 80000000
if !HAS_DTS
config SRAM_SIZE
default 240
config FLASH_SIZE
default 0
endif # !HAS_DTS
config NUM_IRQS
int
# must be >= the highest interrupt number used
@ -29,13 +20,6 @@ config NUM_IRQS
config CC3200SDK_LIBRARY
def_bool n
if !HAS_DTS
if UART_CC32XX
config UART_CC32XX_IRQ_PRI
default 3
endif # UART_CC32XX
endif # !HAS_DTS
if GPIO
config GPIO_CC32XX

9
arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.series
View file

@ -8,13 +8,4 @@ source "arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc32*"
config SOC_SERIES
default cc32xx
if !HAS_DTS
config SRAM_BASE_ADDRESS
default 0x20004000
config NUM_IRQ_PRIO_BITS
int
default 3
endif # !HAS_DTS
endif # SOC_SERIES_CC32XX

14
drivers/serial/Kconfig.cc32xx
View file

@ -13,17 +13,3 @@ config UART_CC32XX_NAME
depends on UART_CC32XX
help
This is the UART's device name binding.
if !HAS_DTS
config UART_CC32XX_IRQ_PRI
depends on UART_CC32XX
int "IRQ priority from UART controller"
config UART_CC32XX_BAUDRATE
depends on UART_CC32XX
int "UART_0 baud rate"
default 115200
help
This option sets the baud rate for the CC32XX UART.
endif # !HAS_DTS

10
drivers/serial/uart_cc32xx.c
View file

@ -36,7 +36,7 @@ static void uart_cc32xx_isr(void *arg);
#endif
static const struct uart_device_config uart_cc32xx_dev_cfg_0 = {
.base = (void *)UART_CC32XX_BASE_ADDRESS,
.base = (void *)TI_CC32XX_UART_4000C000_BASE_ADDRESS,
.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
};
@ -62,7 +62,7 @@ static int uart_cc32xx_init(struct device *dev)
/* This also calls MAP_UARTEnable() to enable the FIFOs: */
MAP_UARTConfigSetExpClk((unsigned long)config->base,
MAP_PRCMPeripheralClockGet(PRCM_UARTA0),
CONFIG_UART_CC32XX_BAUDRATE,
TI_CC32XX_UART_4000C000_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE
| UART_CONFIG_PAR_NONE));
MAP_UARTFlowControlSet((unsigned long)config->base,
@ -75,11 +75,11 @@ static int uart_cc32xx_init(struct device *dev)
MAP_UARTIntClear((unsigned long)config->base,
(UART_INT_RX | UART_INT_TX));
IRQ_CONNECT(EXCEPTION_UARTA0,
CONFIG_UART_CC32XX_IRQ_PRI,
IRQ_CONNECT(TI_CC32XX_UART_4000C000_IRQ_0,
TI_CC32XX_UART_4000C000_IRQ_0_PRIORITY,
uart_cc32xx_isr, DEVICE_GET(uart_cc32xx_0),
0);
irq_enable(EXCEPTION_UARTA0);
irq_enable(TI_CC32XX_UART_4000C000_IRQ_0);
#endif
return 0;
}

5
dts/arm/cc3200_launchxl.fixup
View file

@ -1,6 +1 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define EXCEPTION_UARTA0 TI_CC32XX_UART_4000C000_IRQ_0
#define CONFIG_UART_CC32XX_IRQ_PRI TI_CC32XX_UART_4000C000_IRQ_0_PRIORITY
#define UART_CC32XX_BASE_ADDRESS TI_CC32XX_UART_4000C000_BASE_ADDRESS
#define CONFIG_UART_CC32XX_BAUDRATE TI_CC32XX_UART_4000C000_BAUD_RATE