dts: i2c: Add dts support for i2c
Change-Id: I9104f5230a4efbf1b6979e146e7ea73a76891947 Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
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4 changed files with 28 additions and 0 deletions
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@ -8,4 +8,13 @@
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#define L2_SRAM_SIZE CONFIG_SRAM_SIZE_0 * 1024
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#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_80400_BASE_ADDRESS
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#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_80400_CLOCK_FREQUENCY
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#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_80400_LABEL
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#define CONFIG_I2C_0_IRQ (SNPS_DESIGNWARE_I2C_80400_IRQ_0 << 16) | DW_ICTL_IRQ
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#define CONFIG_I2C_0_IRQ_FLAGS SNPS_DESIGNWARE_I2C_80400_IRQ_0_SENSE
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/* End of SoC Level DTS fixup file */
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@ -7,3 +7,4 @@ config BOARD_INTEL_S1000_CRB
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bool "Xtensa on Intel_S1000"
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depends on SOC_INTEL_S1000
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select HAS_DTS
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select HAS_DTS_I2C
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@ -21,3 +21,7 @@
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current-speed = <115200>;
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};
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&i2c0 {
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status = "ok";
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clock-frequency = <I2C_BITRATE_FAST>;
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};
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@ -1,4 +1,5 @@
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#include "skeleton.dtsi"
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#include <dt-bindings/i2c/i2c.h>
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#define __SIZE_K(x) (x * 1024)
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@ -40,5 +41,18 @@
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status = "disabled";
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};
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i2c0: i2c@80400 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80400 0x400>;
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interrupts = <2 0>;
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interrupt-parent = <&intc>;
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label = "I2C_0";
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status = "disabled";
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};
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};
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};
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