For quite a few peripherals that are currently supported by nrfx HALs
or drivers there are no definitions of corresponding CMSIS-Core
peripheral accessing symbols that would provide their base addresses
in the proper domain (secure or non-secure), accordingly to the build
target. This commits adds devicetree nodes for these peripherals so
that their base addresses can be used in definitions of the accessing
symbols mentioned above.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The 'irq-gpios' property is optional as the drivers work fine if this
property isn't set. The property is only required if "TRIGGER" mode is
enabled in the drivers.
As such mark 'irq-gpios' as 'required:false`.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the handcoded multi-level IRQ values in device tree. We now are
able to generate the encoded multi-level IRQ value.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the handcoded multi-level IRQ values in device tree. We now are
able to generate the encoded multi-level IRQ value.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Pull out the LPO fixed-clock that is part of the PMC hardware block as
its own child node of the PMC block. This is because the PMC could have
its own driver associated with it that is seperate from the LPO clk.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
With the change to "compatible", and deprecation of "inherit"
and "category: required", there are multiple warnings when
running cmake. So fix those by updating the DTS YAML file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Each intmux block acts like 8 interrupt controllers in which we can
have multiple device interrupts on a single channel and that channel
than interrupt than chained to another interrupt controller (in the
case of the RISC-V cores, it is the event unit).
So to describe things better to properly be able to walk the interrupt
chain in the device tree we treat each channel in the interrupt mux as
an interrupt controller rather than the intmux as a single interrupt
controller.
In the future this will allow the device tree generation code to walk
the interrupt chain from the device and up through any interrupt
controllers to generate the IRQ value that Zephyr expects (rather than
us hard coding this into the DTS).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
It's a bit subtle in that it's the only type where a property can
generate output even if it doesn't exist.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
For missing optional properties, it can be handy to generate a default
value instead of no value, to cut down on #ifdefs.
Allow a default value to be specified in the binding, via a new
'default: <default value>' setting for properties in bindings.
Defaults are supported for both scalar and array types. YAML arrays are
used to specify the value for array types.
'default:' also appears in json-schema, with the same meaning.
Include misc. sanity checks, like the 'default' value matching 'type'.
The documentation changes in binding-template.yaml explain the syntax.
Suggested by Peter A. Bigot in
https://github.com/zephyrproject-rtos/zephyr/issues/17829.
Fixes: #17829
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Instead of
properties:
compatible:
constraint: "foo"
, just have
compatible: "foo"
at the top level of the binding.
For backwards compatibility, the old 'properties: compatible: ...' form
is still accepted for now, and is treated the same as a single-element
'compatible:'.
The old syntax was inspired by dt-schema (though it isn't
dt-schema-compatible), which is in turn a thin wrapper around
json-schema (the idea is to transform .dts files into YAML and then
verify them).
Maybe the idea was to gradually switch the syntax over to dt-schema and
then be able to use unmodified dt-schema bindings, but dt-schema is
really a different kind of tool (a completely standalone linter), and
works very differently from our stuff (see schemas/dt-core.yaml in the
dt-schema repo to get an idea of just how differently).
Better to keep it simple.
This commit also piggybacks some clarifications to the binding template
re. '#cells:'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fixes an upcoming error:
device tree error: 'hw-flow-control' appears in /soc/uart@40028000
in nrf52840_pca10056.dts.pre.tmp, but is not declared in
'properties:' in .../dts/bindings/serial/nordic,nrf-uarte.yaml
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Have
include: foo.dts
include: [foo.dts, bar.dts]
instead of
inherits:
!include foo.dts
inherits:
!include [foo.dts, bar.dts]
This is a nicer and shorter and less cryptic syntax, and will make it
possible to get rid of the custom PyYAML constructor for '!include'
later.
'inherits: !include ...' is still supported for backwards compatibility
for now. Later on, I'm planning to mass-replace it, add a deprecation
warning if it's used, and document 'include:'. Then the '!include'
implementation can be removed a bit later.
'!include' has caused issues in the past (see the comment above the
add_constructor() call), gets iffy with multiple EDT instances, and
makes the code harder to follow.
I'm guessing '!include' might've been intended to be useful outside of
'inherits:' originally, but that's the only place where it's used. It's
undocumented that it's possible to put it elsewhere.
To implement the backwards compatibility, the code just transforms
inherits:
!include foo.dts
into
inherits:
- foo.dts
and treats 'inherits:' similarly to 'include:'. Previously, !include
inserted the contents of the included file instead.
Some more sanity checks for 'include:'/'inherits:' are included as well.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The 'category: required/optional' setting for properties is just a
yes/no thing. Using a boolean makes it clearer, so have
'required: true/false' instead.
Print a clear error when 'category:' is used:
edtlib.EDTError: please put 'required: true' instead of 'category:
required' in 'properties: foo: ...' in
test-bindings/sub-node-parent.yaml - 'category' has been removed
The old scripts in scripts/dts/ ignore this setting, and only print a
warning if 'category: required' in an inherited binding is changed to
'category: optional'. Remove that code, since the new scripts already
have the same check.
The replacement was done with
git ls-files 'dts/bindings/*.yaml' | xargs sed -i \
-e 's/category:\s*required/required: true/' \
-e 's/category:\s*optional/required: false/'
dts/binding-template.yaml is updated as well.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Update the ADC bindings to include #io-channel-cells and update the
related dts files to set #io-channel-cells.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Sanity-checking each !included file separately was inherited from the
old scripts. It makes it messy to check that combinations of fields make
sense, e.g. to check 'const:' or 'default:' against 'type:', since those
fields might come from different files (this is handy, since it makes
sense to just add/change a 'const:' value, for example).
Drop the requirement that each !included file is a complete binding in
itself, and treat them as binding fragments instead. Only check the
final merged binding.
This also means that !included files no longer need to have a
'description:' or 'title:' (those have always been unused for !included
files), so remove those, and add comments that explain what the
fragments are for instead. That should demystify bindings a bit.
Also fix the descriptions of i2c.yaml, i2s.yaml, spi.yaml, and
uart.yaml. They're for controllers, not devices. These are copy-paste
error from the corresponding device .yaml files.
Piggyback some indentation consistency nits in binding-template.yaml.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Convert type from compound to phandle-array for various bindings that
have properties like like <FOO>-gpios, pwms, clocks,
interrupt-extended, etc. that are phandle-array's.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add two new type-checked property types 'phandles' and 'phandle-array'
to edtlib.
'phandles' is for pure lists of phandles, with no other data, like
foo = < &bar &baz ... >
'phandle-array' is for lists of phandles and (possibly) numbers, like
foo = < &bar 1 2 &baz 3 4 ... >
dt-schema also has the 'phandle-array' type.
Property.val (in edtlib) is set to an array of Device objects for the
'phandles' type.
For the 'phandle-array' type, no Property object is created. This type
is only used for type checking.
Also refactor how types that do not create a Property object
('phandle-array' and 'compound') are handled. Have _prop_val() return
None for them.
The new types are implemented with two new TYPE_PHANDLES and
TYPE_PHANDLES_AND_NUMS types at the dtlib level. There is also a new
Property.to_nodes() functions for fetching the Nodes for an array of
phandles, with type checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
* Add "#address-cells" and "#size-cells" to base.yaml as properties
that can exist on any node. Cleanup other bindings that inherit
from the base.yaml.
* Add "status" property with an enum of valid options.
* Add "interrupt-parent" to base.yaml. It's a phandle to the node
which is the interrupt controller for the interrupt.
* Add "interrupt-extended" to base.yaml. Provides a way to specify
an interrupt-parent and specifier in a single property. Useful if
a device has multiple interrupts in which different interrupts go
to different interrult controllers.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In most cases #<FOO>-cells should be a constant. For example in spi
controller #address-cells should be 1, and #size-cells should be 0.
Use the const attribute to specify such single known values. Add const
value to missing bindings which have cells.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a 'const' property to bindings for any properties that are expected
to have a specifi known value. For example, #address-cells for an I2C
bus should always be '1'. So we can do something like the following in
the I2C bus binding:
"#address-cells":
type: int
category: required
const: 1
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Change binding for ST sensors property 'irq-gpios' to optional for the
cases of in which its obvious from the driver that the property is
optional (there's an ifdef based on the #define
DT_INST_0_ST_LIS2DH_IRQ_GPIOS_*).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The file contained an invalid license which came from a Nordic custom
repository. Switch it to Apache 2.0.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
'child: bus:' should be in the binding for the bus node, and
'parent: bus:' in the binding for devices that appear on the bus.
The description accidentally swapped them. Fix it.
Fixes: #18821
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Adding required fields to the devicetree overlay of the CAN sample as
this is often used as a reference. Also use these fields instead of the
KConfig entries.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
'interrupt-parent' should contain just the phandle of the node
interrupts are sent to.
This node (gic: interrupt-controller@f9010000) doesn't generate any
interrupts, so the 'interrupt-parent' value is never used (this is why
it wasn't caught). It'll give an error later with 'interrupt-parent'
declared as 'type: phandle' in bindings though.
Don't know what was intended. Just remove the 0.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Mark the 'reset-gpios' property as optional. It was incorrectly set
as required and its not required for the driver to function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Property type-checking has been pretty rudimentary until now, only
checking things like the length being divisible by 4 for 'type: array',
and strings being null-terminated. In particular, no checking was done
for 'type: uint8-array', letting
jedec-id = < 0xc8 0x28 0x17 >;
slip through when
jedec-id = [ 0xc8 0x28 0x17 ];
was intended.
Fix it by adding a syntax-based type checker:
1. Add Property.type, which gives a high-level type for the property,
derived from the markers added in the previous commit.
This includes types like TYPE_EMPTY ('foo;'),
TYPE_NUM ('foo = < 3 >;'), TYPE_BYTES ('foo = [ 01 02 ];'),
TYPE_STRINGS ('foo = "bar", "baz"'),
TYPE_PHANDLE ('foo = < &bar >;'), and TYPE_COMPOUND (everything not
recognized).
See the Property.type docstring in dtlib for more info.
2. Use the high-level type in
Property.to_num()/to_string()/to_node()/etc. to verify that the
property was assigned in an expected way for the type.
If the assignment looks bad, give a helpful error:
expected property 'nums' on /foo/bar in some.dts to be assigned
with 'nums = < (number) (number) ... >', not 'nums = "oops";'
Some other related changes are included as well:
- There's a new Property.to_bytes() function that works like accessing
Property.bytes, except with an added check for the value being
assigned like 'foo = [ ... ]'.
This function solves problems like the jedec-id one.
- There's a new Property.to_path() function for fetching the
referenced node for assignments like 'foo = &node;', with type
checking. (Strings are accepted too, as long as they give the path
to an existing node.)
This function is used for /chosen and /aliases.
- A new 'type: phandle' type can now be given in bindings, for
properties that are assigned like 'foo = < &node >;'.
- Property.__str__() now displays phandles and path references as they
were written (e.g. '< &foo >' instead of '< 0x1 >', if the
allocated phandle happened to be 1).
- Property.to_num() and Property.to_nums() no longer take a 'length'
parameter, because it makes no sense with the type checking.
- The global dtlib.to_string() and dtlib.to_strings() functions were
removed, because they're not that useful.
- More tests were added, along with misc. minor cleanup in various
places.
- Probably other stuff I forgot.
The more strict type checking in dtlib indirectly makes some parts of
edtlib more strict as well (wherever Property.to_*() is used).
Fixes: #18131
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
the microchip,mcp2515 and microchip,enc28j60 bindings would hit the
following build error:
device tree error: dts/bindings/can/microchip,mcp2515.yaml (in 'reg'):
'category' from !included file overwritten
('required' replaced with 'optional')
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
SPI3 clock info were missing and following macros were
not generated:
- DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BITS
- DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BUS
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit includes the initial support of ARC HS Development Kit:
* hsdk soc support
* hsdk board support
* no mmu support, so no userspace
* smp support
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This adds support for SARA-U2 modems. They have different timings on
the PWR_ON pin, don't support AT+CESQ and require a manual GPRS
connection setup.
The VINT pin is used as a more reliable and faster way to power on the
modem.
Based on work by Göran Weinholt <goran.weinholt@endian.se>
Signed-off-by: Michael Scott <mike@foundries.io>
This commit adds support for the Zynq UltraScale+ MPSoC as a qemu based
platform for Cortex-R based testing. This SoC only supports an
interrupt controller and serial port for limited testing.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
The GIC400 is a common interrupt controller that can be used with the
Cortex A and R series processors. This patch adds basic interrupt
handling for the GIC, but does not handle multiple routing or
priorities.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
Remove unused "system-clock-frequency" property, we don't have this
defined in various bindings and thus aren't using it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add "#address-cells" and "#size-cells" to the fixed-partition binding as
these are properties that may existing in the fixed-partition node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* Change pwm device bindings to include both base and pwm.yaml. This
allow for flexibility for any nodes that might not need/utilize the
base binding.
* Added pwm.yaml to a few device bindings that were missing it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a clock.yaml that clock controller bindings should inherit
from. clock.yaml defines the properties "#clock-cells" which all
clock controllers should have.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a gpio.yaml that GPIO controller bindings should inherit
from. gpio.yaml defines the properties "gpio-controller" and
"#gpio-cells" which all gpio controllers should have.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a intc.yaml that interrupt controller bindings should inherit
from. intc.yaml defines the properties "interrupt-controller" and
"#interrupt-cells" which all interrupt controllers should have.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is to support e.g. "<&adc 3>" in the device tree to create e.g.
DT_FOO_IO_CHANNELS_CONTROLLER = "ADC_0"
DT_FOO_IO_CHANNELS_INPUT = 3
Signed-off-by: Jim Paris <jim@jtan.com>
The nxp,kinetis-sim is shared by 2 SoC familes and on one of them
its not used for clocks. As such that SoC will not have a #clock-cells
property so mark it optional.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The binding for st,stm32-timers specifies #address-cells and #size-cells
as required but no dts files that have st,stm32-timers specify these
properties. Remove them from the binding.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Use clock specified in the device tree for obtaining the source clock
frequency for the pwm_mcux_ftm driver instead of relying on having an
NXP Kinetis MCG clock available in all SoCs supporting FlexTimer (FTM)
modules.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds a driver for st7789v lcd controller, and TL019FQV01 lcd.
The bulk of the driver is based on the existing ili9340 driver.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
NRF_UICR needs to be defined for nRF9160 SoC in
nrfx_config_nrf9160.h, because it is not defined
in nrfx/hal/mdk/nrf9160.h (as it is a Secure-only
peripheral).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
- update doc for different core configuration.
- fix some bugs in dts related files.
- add dts config and defconfig for different core configuration.
- end files with a newline in boards/arc/emsdp/board.dtsi
- remove unused head in boards/arc/emsdp/doc/index.rst
- ARC_MPU_VER in different core is fixed. so remove some useless code
for ARC_MPU_VER judgements in Kconfig.defconfig.* files for emsdp
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
The snps,designware-intc.yaml and xtensa,intc.yaml define a required
property snps,num-irq-priority-bits that isn't defined in any .dts
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
After witnessing some strange errors with memory not being
what it should be, lifiting everything above 1MB has solved
it. The Zephyr binary was being loaded into memory containing
reserved regions, resulting in data corruption.
We still simulate XIP for testing purposes by setting up the
memory map as follows:
0x000000 - 0x0FFFFF : Non-present
0x100000 - 0x4FFFFF : "Flash" ROM region
0x500000 - 0x8FFFFF : "SRAM" RAM region
For a total of 9 megabytes of physical RAM used.
Fixes problems observed in some large tests when code coverage
is enabled (which increases the amount of RAM used even more).
Fixes: #17782
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
With the new DT checks the dts bindings for "nxp,flexpwm" and
"nxp,imx-pwm" had old conventions that we now treat as build errors.
Additionally fix the number of #pwm-cells for "nxp,imx-pwm" to be 1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
i.MX RT10XX processors have four eFlexPWM modules, each containing
four 2-channels PWM submodules.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The "{d,i}ccm" nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are {d,i}ccm.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This dts binding file remained out from 0ec0c84808 commit, because
it was still in the pre-merging status.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add a new sifive,plic-1.0.0 binding that inherits from the riscv,plic0
binding. The new binding adds a required riscv,ndev property, which
gives the number of external interrupts supported.
Use the new binding for microsemi-miv.dtsi (with a value of 31 for
riscv,ndev, from http://www.actel.com/ipdocs/MiV_RV32IMAF_L1_AHB_HB.pdf)
and riscv32-fe310.dtsi (which already assigns riscv,ndev).
Also remove a spurious riscv,ndev assignment from
riscv32-litex-vexriscv.dtsi.
Also make edtlib and the old scripts/dts/ scripts replace '.' in
compatible strings with '_' when generating identifiers.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These are not declared in dts/bindings/arm/nxp,kinetis-sim.yaml and do
not generate any output.
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
A minor spelling fix in an inline comment in
both nRF9160 Secure and Non-Secure .dtsi headers.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
These are not declared in any binding and do not generate any output.
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fix the following dtc warning:
mimxrt1064_evk.dts.pre.tmp:78.31-85.5: Warning (spi_bus_bridge):
/soc/flexspi1@402a4000: node name for SPI buses should be 'spi'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Several aliases were added to nrf9160[ns].dtsi files solely for
the purpose of getting base addresses of certain hardware modules
via DT_ macros generated for these aliases.
Since for one-instance modules the same can be now achieved with
standard DT_INST_0_* macros, there is no need to keep these aliases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
pinmux: Add the relevant definition of the spi3 pin
dts: Fix a bug, spi3 does not have a label
soc: Supplement spi3 related definition
Signed-off-by: Findlay Feng <i@fengch.me>
Add some information that would've saved me a lot of time:
- Give an overview of how device tree nodes and bindings fit together,
with examples. Assume people might be coming at it without knowing
anything about device tree.
- Explain how 'inherits' works in more detail
- Explain what 'parent/child: bus: ...' does more concretely, and what
problem it solves
- Add more examples to show what things look like in the .dts file
- Clean up the language a bit and make things more consistent
Also fix some errors, like 'properties: compatible: ...' being wrong
(missing 'constraint:' and compatible strings in the wrong place).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
stm32f429.dtsi wrongly introduced i2s nodes 4, 5 and 6.
Remove them as actually only i2s nodes 2 and 3 are supported on
these socs.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a kernel timer driver for the MEC1501 32KHz RTOS timer.
This timer is a count down 32-bit counter clocked at a fixed
32768 Hz. It features one-shot, auto-reload, and halt count down
while the Cortex-M is halted by JTAG/SWD. This driver is based
on the new Intel local APIC driver. The driver was tuned for
accuracy at small sleep values. Added a work-around for RTOS
timer restart issue. RTOS timer driver requires board ticks per
second to be 32768 if tickless operation is configured.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This was always intended to be a bytestring rather than an array, but
full support was missing. Since that has been addressed switch it to
the preferred format.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The JEDEC API defines the hardware page, sector, and block sizes.
Deprecate the Kconfig settings, remove the `erase-size-block` property,
and add `has-be32k` to indicate that 32K-byte erase is supported.
Rework the driver to use the constants instead of configured values.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Liteeth exposes two memory regions:
* set of rx/tx buffers (aka slots) to exchange packets,
* control and status registers.
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Same deal as in commit eba81c6e54 ("yaml: Remove redundant document
separators"), for some newly added stuff.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
No binding has anything but 'version: 0.1', and the code in scripts/dts/
never does anything with it except print a warning if it isn't there.
It's undocumented what it means.
I suspect it's overkill if it's meant to be the binding format version.
If we'd need to tell different versions from each other, we could change
some other minor thing in the format, and it probably won't be needed.
Remove the 'version' fields from the bindings and the warning from the
scripts/dts/ scripts.
The new device tree script will give an error when unknown fields appear
in bindings.
The deletion was done with
git ls-files 'dts/bindings/*.yaml' | xargs sed -i '/^\s*version: /d'
Some blank lines at the beginning of bindings were removed as well.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Commit 948ef47cf4 ("dts: riscv32: Add rv32m1 zero-riscy core") put
common ri5cy and zero_riscy DT parts in rv32m1.dtsi, with two separate
rv32m1_ri5cy.dtsi rv32m1_zero_riscy.dtsi files that #include it.
The two interrupt multiplexers are defined in the common rv32m1.dtsi
file, but rv32m1_ri5cy.dtsi rv32m1_zero_riscy.dtsi each only specify
'interrupts' for one of them. Since 'interrupts' is 'category: required'
in openisa,rv32m1-intmux.yaml, this leads to warnings (or errors with
the new DT parser).
Disable (status = "disabled") the two interrupt multiplexers in the
common rv32m1.dtsi file and enable them in the board-specific files to
fix it. Required props. are only checked for enabled nodes.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The property is required on all SPI clients, but was missing from
several devicetree nodes. Set it, using the capitalized version of the
node alias when present, with "jedec,spi-nor#0" as the fallback.
Closes#17662
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
In most of the cases the fixed-clock node is not referenced by the
Zephyr code, making the label property just a burden.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Have the SoC dtsi files for microchip mark the devices (uart & i2c) as
disabled by default and let the board dts files enable which one's they
need/use (which is what's happening already).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
I'm guessing STM32 GPIO nodes don't generate interrupts, because I can't
find any device tree nodes with 'compatible = "st,stm32-gpio"' and an
'interrupts' property.
Remove the required 'interrupts' property from the binding. This fixes a
bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
spi-max-frequency is marked as required in
dts/bindings/mtd/jedec,spi-nor.yaml.
I took the value from the datasheets (133 MHz for all), and guessed that
a dummy entry is fine for QEMU.
Fixes some errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The port_sel property had the category set to 'define' which isn't a
valid option. Change it to be 'required'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit makes the clock property optional (through base.yaml),
as clock reference is not used in the code.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds a DTCM (Device Tightly Coupled Memory) section for
Cortex F7 MCUs. The Address and length is defined in the corresponding
device tree file.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Since the nxp,imx-gpio binding is shared between i.MX and i.MX-RT SoC
the 'rdc' property needs to be optional (as it doesn't make sense on the
RT SoCs).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There doesn't seem to be any use of the virtualcom device in the code,
so lets remove it from the dts as it describes itself as a usb device
controller which it is not.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We've removed the need for the 'generation:' property in the binding
files. Remove use in st,stm32-usb.yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A number of dts bindings mark 'interrupts' as a required property when
in fact they are not for those devices. Remove the 'required' setting
and just have 'interrupts' as 'optional'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The dts that have intel,qmsi-watchdog don't sent a clock property so its
not required. Change it from being required to optional.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:
- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
in order to configure USB clock source.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
These bindings override the 'category: optional' for 'clocks' from
uart.yaml with 'category: required', but none of the nodes that use the
bindings set 'clocks'.
Maybe it's a copy-paste error. Remove the 'clock' overrides.
Fixes some errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These bindings !include adc.yaml, but their device tree nodes never set
'clocks':
dts/bindings/iio/adc/atmel,sam-afec.yaml
dts/bindings/iio/adc/atmel,sam0-adc.yaml
dts/bindings/iio/adc/nordic,nrf-adc.yaml
dts/bindings/iio/adc/nordic,nrf-saadc.yaml
The nodes for these bindings do set it (think it's consistent for
st,stm32-adc.yaml):
dts/bindings/iio/adc/nxp,kinetis-adc12.yaml
dts/bindings/iio/adc/st,stm32-adc.yaml
Make 'clocks' optional in adc.yaml. Maybe it should be changed to
required on some platforms (!including bindings can change 'optional' to
'required').
Fixes a bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Setting it seems rare. Maybe it could be changed to required on just
some platforms (!including bindings can change 'optional' to
'required').
Fixes a bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
None of the interrupt controller nodes that use this binding in the
device tree files set 'reg' (or have a unit address).
Fixes a bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch populates "clocks" property in stm32 usb nodes
for clock related usb configuration code of each dtsi files
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The st,stm32-can binding specified several required properties that were
never set in actual .dts files and not used by the code. Remove them at
this time since they aren't being used.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We removed support for cell_string some time ago, so we have some stale
references in a number of bindings that we can remove.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Note that these appear as
properties: {erase,write}-block-size: label: ...
rather than as
properties: label: ...
I can't see anything looking at 'label' for individual properties in
bindings, so it's probably dead code. Labels are fetched from the device
tree in extract/flash.py.
Piggyback removal of some 'generation: define's and a redundant pair of
YAML document separators.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The spi-nor flash nodes require a jedec-id property as per the binding.
We add the jedec-id's as best we can determine based on the data sheets
for the various flash modules on these boards.
However these id's should be validated by actually reading the value to
ensure they are correct.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We define "arc,num-irq-priority-bits" and "intel,num-irq-priority-bits"
as required properties in the bindings for the interrupt controllers
however we never specify these properties in any .dts files or use them
in any code.
Remove them as stale properties in the binding files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix USB phy node for stm32l432 and stm32l452, which contain
a USB controller and not a OTG FS controller.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Now that the generation script doesn't look at the "generation" in the
YAML, we can remove it from the binding files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
uint8-array is the name for what the devicetree specification calls a
bytestring.
The original parsing code treated square brackets as equivalent to
quotes or angle brackets, failing to interpret elements as hex-encoded.
This was a bug, corrected in this patch by processing content as a
sequence of hex-encoded bytes with arbitrary whitespace.
The original generating code emitted the property as individual
elements. Replace that with generation of a single structure
initializer, which is more useful in cases where the length of a
property value may vary between nodes.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
1) dts/bindings/mmc/mmc.yaml: specifies common mmc.
2) dts/bindings/mmc/nxp,imx-usdhc.yaml: specifies
nxp usdhc module which inherits mmc.
3) dts/arm/nxp/nxp_rt.dtsi: usdhc support on RT chip.
4) boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts:
usdhc slot support on mimxrt1050_evk board.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
A number of minor issues with the 'fixed-clock' support:
* Fix the #clock-cells to be 0
* Fix nxp_ke1xf.dtsi to set #clock-cells 0 and the clock reference to
only be a phandle.
* Fix the generation script to only generate what it should for a
'fixed-clock'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A few clock bindings only have a single clock cell defined, but the
binding described more than one cell.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add clock support for STM32G0X SoC series.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add flash support for STM32G0X SoC series.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch adds support for the STM32G071xx
from STMicroelectronics.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support to STM LSM6DSO 6-axis IMU sensor driver.
This driver supports communication with device though both
I2C and SPI bus and both polling and drdy trigger mode.
This driver supports also the sensorhub mode with the possibility
to connect a maximum of two external devices, typically a
magnetometer and an environmental sensor, currently selected among
following devices: lis2mdl magnetometer, lps22hh or lps22hb
pressure and temperature sensors, HTS221 humidity sensor.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add support to STM LPS22HH pressure and temperature sensor.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit adds binding for clock provider with fixed frequency.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Removed Quark D2000 SoC files and first-order related DT bindings.
A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Several bindings have an expectation of sub-nodes that describe the
actual infomation. The sub-nodes don't have any compatiable so we can't
key on that.
So we can add the concept of a sub-node to the YAML to handle cases like
'gpio-keys', 'gpio-leds', 'pwm-leds', etc..
The sub-node in the YAML is effective the "binding" params that describe
what properties should exist in the sub-node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The binding specified 2 cells for an interrupt, but in reality we only
have an IRQ number. Remove the 'pri' cell from the binding to match
what the dts files are doing.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The pinctrl property in the bindings is meaningless, lets remove it and
add a proper pinctrl property when we are ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
YAML document separators are needed e.g. when doing
$ cat doc1.yaml doc2.yaml | <parser>
For the bindings, we never parse concatenated documents. Assume we don't
for any other .yaml files either.
Having document separators in e.g. base.yaml makes !include a bit
confusing, since the !included files are merged and not separate
documents (the merging is done in Python code though, so it makes no
difference for behavior).
The replacement was done with
$ git ls-files '*.yaml' | \
xargs sed -i -e '${/\s*\.\.\.\s*/d;}' -e 's/^\s*---\s*$//'
First pattern removes ... at the end of files, second pattern clears a
line with a lone --- on it.
Some redundant blank lines at the end of files were cleared with
$ git ls-files '*.yaml' | xargs sed -i '${/^\s*$/d}'
This is more about making sure people can understand why every part of a
binding is there than about removing some text.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Added support for the STM32L496XE series with 512KB internal flash and
256KB SRAM of contiguous addresses.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
* Fix white space in phy.yaml
* Fix property name in st,stm32-usbphyc.yaml and usb-nop-xceiv.yaml to
use "#phy-cells" and not "phy-cells"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce uint8-array type for local-mac-address as we need to
distinguish it from 'array' meaning a uint32 array.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DT spec. only has "okay" and not "ok". The Linux kernel has around
12k "okay"s and 300 "ok"s.
The scripts/dts scripts only check for "disabled", so should be safe re.
those at least.
The replacement was done with
git ls-files | xargs sed -i 's/status\s*=\s*"ok"/status = "okay"/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
* Rename stringlist to string-array to be closer inline with upstream
dtschema definitions.
* Add string-array to the device_node.yaml.template
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
TI_HDC Driver now also supports waiting for conversion to finish instead
of waiting for GPIO interrupt.
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
Hdc1008 driver is renamed into ti_hdc to prepare it to support all
available Texas Instruments HDC sensors (e.g. hdc1080, hdc2080).
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
This commit adds counter driver based on RTCC module for SiLabs Gecko
SoCs.
Tested with SLWSTK6061A / BRD4250B wireless starter kit.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Move common properties like 'compatible', 'reg', 'reg-names',
'interrupts', 'interrupt-names', and 'label' into one common base.yaml
that all the other yaml's can inherit from. This removes both
duplication and inconsistent definition.
The device specific yamls just need to say if a property is 'required'
or not.
NOTE: due to some generation conflicts we did not covert
'soc-nv-flash.yaml' to use base.yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We've never propertly generated any pinmux info, so remove generation
from the binding yaml files for pinmux properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
sram2a and sram2b where defined in the prospect of defining
HCI shared memory sections from device tree.
Remove them, since this is not the case anymore.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Since Kconfig is responsible for enabling/disabling devices at build,
the devices in dt are defaulted to status="ok" to keep the output in
generated_dts_board.conf the same across configurations and simplify
the board-level dts files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This adds support for the async API for SAM0 SERCOM USARTs using
DMA to drive the device.
Tested on SAMD21 with a few trivial programs and with
tests/drivers/uart/uart_async_api.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the basic timer counter (TC) found on SAM0
series parts. This driver only supports running the counter
in 32 bit wide mode. Since this mode explicitly slaves the odd
counters to the even ones, only instances of the even ones are
defined.
Tested with tests/drivers/counter/counter_basic_api on SAMD21.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Add support for the Low Power Inter-Integrated Circuit (LPI2C)
controllers found in the NXP Kinetis KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The node name for device_id was device_id@0 it should be
device_id@80a00c to reflect the first register region
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
import linux-v5.1:Documentation/devicetree/bindings/vendor-prefixes.txt
Use vendor-prefixes.txt to check vendor prefixes
used in compatible strings and property names.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Previous the register size was 1M, technically the there are only a
small handful of registers defined in the IOAPIC, so shrinking the size
to 4k, so its as most one page large.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The IOAPIC node shouldn't have been in the cpu container, especially
since the cpu container does:
#address-cells = <1>;
#size-cells = <0>;
So the reg field of the IOAPIC would be treated as 2 registers instead
of a register and size. Move IOAPIC node out of the CPU node fixes this
issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Apollo Lake devicetree is augmented with its 8 I2C interfaces.
The default number of dynamic IRQ stubs is increased to deal with
these new interfaces having IRQ vector detection at runtime.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The legacy PCI support in the DesignWare I2C driver is replaced with
the new PCIe support. The Intel Quark X1000 SoC and the galileo board
configurations are updated accordingly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The SARA-R4 series modules from U-Blox are size-optimized LTE-M /
NB-IoT and EGPRS modules designed for low power consumption and
longer battery life.
The binding identifies the UART device, power GPIO and reset GPIO
lines.
Signed-off-by: Michael Scott <mike@foundries.io>
The label binding was missed during initial development of the
WNC-M14A2A modem. Let's add the binding so that during the
migration to a shield, we can update the DTS correctly.
Signed-off-by: Michael Scott <mike@foundries.io>
ARM SysTick peripheral is optional in Cortex-M0 MCUs,
so we delete the respective dts node when the peripheral
is not present.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Atmel SAM D series SoC variants (present in the tree) all have
an ARM Cortex-M0+ core, not a Cortex-M0, so we correct this in
the .dtsi header.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Unlike Cortex-M3 and Cortex-M4, in Cortex-M7 the number of
MPU regions may vary based on the implementation. This commit
adds a DTS node for the ARM MPU peripheral in the device tree
of Cortex-M7 SoCs and updates the fixup files, so we may extract
the number of MPU regions at build time. SoCs:
- nxp_rt
- same70
- stm32f7
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds a DTS node for the ARM MPU peripheral in the
device tree of ARMv8-M SoCs (for the secure and the non-secure
DTS descriptions) and updates the fixup files. SoCs:
- nrf9160
- musca_a
- musca_b1
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add DTS binding files for the ARM MPU, for both ARM
MPU architecture variants, ARMv7-M and ARMv8-M.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add enum to list what values of maximum-speed are exceptable since
enum's get represented as strings in DT. This also allows us to
generate a code enum to correspond to the string.
We also introduce include/dt-bindings/usb/usb.h which is a hand coded
definition of the enum. We don't have a great way to generate this
right now, however it would be better if we did.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
MHU (Message Handling Unit) enables software to raise interrupts to
the processor cores. It is enabled in SSE 200 subsystems.
This patch aims to implement inter processor communication.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Add LiteX with softcore CPU VexRiscV SoC definitions and default
configurations.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add LiteX interrupt controller driver and bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add LiteX timer driver with bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add LiteX UART driver with bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Adding missing erase-block-size entries for the flash-controller
nodes in the nrf52810 and nrf52811 .dtsi files.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Move flash-controller and SRAM node definitions under SoC node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Reduced Kconfig for counter with nRF TIMER and RTC. Added overlays
for TIMER and RTC configuration in the counter test.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add support for CLKOUT source selection and divider as found on the
NXP Kinetis KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a new clock control driver for NXP Kinetis SoCs that have the
Peripheral Clock Controller module (PCC).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds basic support for nrf52811 in the arch SoC, dts
and nrfx folders.
The nRF52811 is a Bluetooth 5.1 Direction Finding SoC with comprehensive
protocol support.
The nRF52811 SoC is capable of the latest features of Bluetooth 5.1,
the most prominent being Direction Finding.
The radio in the nRF52811 SoC has comprehensive protocol capabilities,
including Bluetooth 5.1 Directing Finding, all Bluetooth 5 features,
802.15.4, Thread, Zigbee, ANT and 2.4 GHz proprietary.
It has 4 dBm TX power and has been optimized to offer the best RX
sensitivity of all SoCs in the nRF52 series.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Add flash and SRAM to the Microsemi MiV device tree.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add bindings for SiFive Data Tightly-Integrated Memory.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
add usbd1 definition to rt dts file,
set EHCI controller config default value in rt1050 default config file,
add EHCI controller driver MACROs to dts_fixup.h,
initialize EHCI clock in rt soc.c
add HAS_MCUX_USB_EHCI for supported soc in Kconfig.soc
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Dts Nodes for all the GPIO portswere defined. In addition,
a new binding file was created for the gpio driver.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Expose MEC1501 5 I2C/SMB controllers
Add Microchip specific I2C device tree properties
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
All series of stm32 have at least one ADC instance and this commit adds
one ADC node to the root dts file of each soc, and also adds fixing up
mappings to them.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
The HT16K33 is a memory mapping, multifunction LED controller
driver. The controller supports up to 128 LEDs (up to 16 rows and 8
commons) and matrix key scan circuit of up to 13x3 keys.
This commit adds support for the keyscan functionality of the HT16K33.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The HT16K33 is a memory mapping, multifunction LED controller
driver. The controller supports up to 128 LEDs (up to 16 rows and 8
commons) and matrix key scan circuit of up to 13x3 keys.
This commit add support for the LED driver functionality of the
HT16K33.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This adds interrupt support to the SAM0 GPIO driver. This is heavily
inspired by @nzmichaelh work in #5715. The primary difference
from that implementation is that here the External Interrupt
Controller (EIC) is separated out into an interrupt controller driver
that is less tightly coupled to the GPIO API. Instead it implements
more of a conversion from the EIC's own odd multiplexing to a more
traditional port and pin mask IRQ-like callback. Unfortunately,
through the EIC on the SAMD2x are relatively well behaved
in terms of pin to EIC line mappings, other chips that share the
peripheral interface are not. So the EIC driver implements a
per-line lookup to the pin and port pair using definitions extracted
from the ASF headers.
The EIC driver still makes some assumptions about how it will be used:
mostly it assumes exactly one callback per port. This should be fine
as the only intended user is the GPIO driver itself.
This has been tested with some simple programs and with
tests/drivers/gpio/gpio_basic_api on a SAMD21 breakout and an
adafruit_trinket_m0 board.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds a SERCOM I2C driver for SAM0 series chips.
Tested with a SAMD21 chip on a SSD1306 display and a MLX90393
sensor. Only compile tested for SAMD20 and SAMR21.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Moves the flash memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the sram memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors peripheral addresses, clocks, and compatibles from the ri5cy
core dtsi into a common soc dtsi, then attaches interrupts in
core-specific dtsi files.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add initial support for the TI CC13x2 / CC26x2 series with the CC2652R
and CC1352R SoCs. The UART and GPIO peripherals are supported. Drivers
use the driverlib HAL from the TI CC13x2 / CC26x2 SDK.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
Implementation of pinmux for the stm32mp157c_dk2 board.
Some UART pin mux definition has been added (mainly for
UART console and UART/SPI Arduino shield support).
This can be completed with pin mux for other stm32mp157c
UART.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move SERCOM peripherals to use the raw defines generated from DTS
parsing. This adds aliases to the DTS so that the SERCOM number
can still be used for clocking and pinmux.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the SAM0 DMA Controller (DMAC). Chained
transfer are not currently implemented.
Tested with tests/drivers/dma/loop_transfer and custom modifications
to that test using three parallel reloading channels. Also tested
with a trivial program that did memory->serial.
Signed-off-by: Michael Hope <mlhx@google.com>
[hageman@inthat.cloud: Rebased and updated commit message]
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the async API for SAM0 SERCOM SPI using
DMA to drive the device. This implementation does the reload
for both transmit and receive in the receive DMA handler.
Doing this simplifies the implementation but means that the
transmit drains completely, resulting in the SPI clock pausing
between buffers while both are reloaded in the receive handler.
Tested with tests/drivers/spi/spi_loopback and several simple
programs monitored with a logic analyzer.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Initial support for Microchip MEC1501 series is added to the tree.
Additional support for UART is also included. This SoC supports
two operational modes for interrupts (Direct and Aggregated). For
this commit, the direct capable interrupts are configured in
direct mode.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Adds Atmel SAMR21 soc which is based on SAMD21, but with a AT86RF233
radio connected internally via SPI.
The AT86RF233 is not yet supprted by Zephyr at this point.
This code is very much copy & paste from atmel_sam0/samd21
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
This commit adds a flash driver implementation that writes to RAM and
exports statistics through stats.h. It can be used to simulate flash
memory for testing purposes.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
The GPIO driver for the Intel Apollo Lake has so many pins it has to
export ten devices to shoehorn its one device into the GPIO API. The
current implementation uses the shared IRQ driver because these
pseudodevices all share one IRQ. However, since the GPIO driver is
aware of all the possible interrupt sources, it's smaller and faster
(and not even messy) to handle it internally, so this patch eliminates
the dependency on the shared IRQ driver.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implementation of AMS (Austria Micro Systems) ENS210 temperature and
relative humidity sensor.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Add driver support for Atmel SAM0 device ID, which is 16-bytes long.
The device ID can simply be read from memory at a known location, but
the location is only described in the data sheet, not in ASF.
For SAMD2x it's 0x0080A00C, 0x0080A040, 0x0080A044 & 0x0080A048.
For SAMD5x it's 0x008061FC, 0x00806010, 0x00806014 & 0x00806018.
This adds a new property to the device tree to define the device ID
registers for this SoC family.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Add driver and device tree binding for the Low Power Inter-Integrated
Circuit (LPI2C) controllers found in the RV32M1 RI5CY SoC.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Add support for pulsing the hardware reset pin of the FXOS8700 high
during initialization.
According to the datasheet, this is required for the I2C/SPI bus
auto-detection logic to work properly if the VDD/VDDIO power
sequencing order cannot be guaranteed.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2 identical packages were defined for stm32f412 SoC, invariant "g".
Merge them in new sinclge stm32f412Xg.dtsi.
Update matching boards accordinlgy.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Allows to enable initial RTS/CTS hardware flow control
in the dts.
Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Adjusted the MCP2515 driver to switch from KConfig SPI configuration to
DTS based configuration.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
The MCP2515 is a CAN controller that can be connected via SPI to an
host MCU. This driver adds support for the MCP2515 as a new driver in
the CAN subsystem.
As it is a SPI peripheral it uses a thread for its interrupt
handling and the received message filtering is done inside this
interrupt thread, as the MCP2515 filter capabilities are not sufficient
for the Zephyr CAN interface.
The driver was validated with an external CAN logger and the adjusted
CAN sample application.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.
The NS16550 UART driver is modified to use pcie.
pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.
This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.
Deficiencies:
64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.
The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Enable the clock for GPIO ports on the RV32M1 SoC before attempting to
access the port controller registers.
Fixes: #15339
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
SAMD20 does not have the DMA or USB peripherals and as a result
the IRQs for all subsequent lines are shifted down from SAMD21.
This splits the interrupt assignment for the SERCOMs into the
SoC specific DTS file and moves the USB definition to SAMD21 only.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.
Also fixes syntax error caused by a missing );.
Signed-off-by: Josef Gajdusek <atx@atx.name>
The erase-block-size and write-block-size are needed for the spi_nor
driver to compile.
scripts/dts/extract/flash.py automatically adds these properties if
this flash device is part of the "chosen" flash node, but they're
otherwise missing.
Signed-off-by: Jim Paris <jim@jtan.com>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Ports B and C share a common interrupt vector on kw40 and kw41z socs,
but we don't currently have a way to express this in device tree. A
check was added in commit 77cb942a97 that
correctly causes build errors on kw40/41 boards when both ports are
enabled.
Disable the port b interrupt for now until we have a better way to
handle this.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
According to nrf51 and nrf52 specifaction every peripheral is
assigned a fixed block of 0x1000 bytes. Due to that dts for
nrf51 and nrf52 chips have been updated.
The only exception is gpio for nrf52840 where gpio0 and gpio1
share the same memory regions. For this reason, the definition
of gpio for nrf52840 is different from the others.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
On various stm32 soc packages CCM is available and SRAM size
mentionned in datasheet include CCM.
Though, actual SRAM size defined in dtsi files should not
include CCM sizes.
Fix this on impacted dtsi files.
Fixes#14779
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram.
This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping
which is moved to 0x20280000 in order to guarentee global OCRAM memory
continuity regardless OCRAM1 size configuration (256KB by default).
In default configuration, this gives 768KB (512+256) on-chip ram:
0x20200000 to 0x202BFFFF.
OCRAM2: 0x20200000 - 0x2027FFFF
OCRAM1(FlexRam): 0x2028FFFF - 0x202BFFFF
Add this memory region as a single node in the rt1060 device tree.
Note: MPU expects power of two memory region, in case of 768KB, let
the MPU configure 1MB instead.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
uart4 is not available on whole stm32f4 series (not on stm32f401
for instance), remove from stm32f4.dtsi
It is actually correctly defined in f405, f413 but missing in f446,
so add it in there.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
1. SW PWM device node added to common nrf5_common.dtsi
2. SW PWM node set in all nRF5x DTSI files.
Different initial settings for nRF51 and nRF52 devices.
Status is ok by default for nRF51.
3. Added yaml binding for Nordic SW PWM node.
4. Set codeowner of nordic dts bindings to @anangl
Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
After commit 'scripts/dts: Never ignore properties in
generate_node_defines()', pointless entries for 'interrupt-names'
properties show up in generated_dts_board.conf and
generated_dts_board_fixups.h, because many bindings specify
'generate: define' for 'interrupt-names'.
If 'generation: define' is taken as "generate #define's for this
particular property", then only the 'interrupts' property ought to have
'generation: define'. Having it on both 'interrupts' and
'interrupt-names' makes you wonder what it would mean to only have it on
one of them.
Things get a bit confusing since 'interrupt-names' is still used when
determining the macro names generated for 'interrupts', but it's
probably best to have 'generation: define' work in a consistent way
still (and never be a no-op).
Remove 'generation: define' from all 'interrupt-names' bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In the recent MDK brought by nrfx 1.6.2, these legacy peripherals have
been revealed as available also in nRF52810. This patch allows their
use in Zephyr drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On currently supported stm32f3 chips,
erase-block-size = 2048
write-block-size = 2
Set these property in stm32f3 series root dtsi file.
Fixes#9686
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The 'partition\d+:' definition might be a leftover from an older way of
handling partitions. There are no 'partition[0-9]' properties anywhere
in the DTS files.
The reason I want to get rid of this is that it's the only place where
you get a 'properties:' nested inside inside a 'properties:'. That's an
undocumented feature, and removing it will make generate_node_defines()
much simpler (non-recursive).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
- Regexes (e.g. 'pinctrl-.*') are supported in property names in
bindings, but it was undocumented
- Remove the mention of 'generation: structure'. The only implemented
output format is #define's.
- Clean up the language a bit and move related stuff so that it appears
together
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add nvs support to nucleo_f091rc board. This requires to
add erase-block-size property to stm32f0.dtsi.
Storage partition is set to 4kb at the end of the flash.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Initial support for Microchip MEC1701 series is incorporated to the
tree. Additional support for UART is also included. This SOC supports
two operation modes for interrupts (Direct and Aggregated). For this
commit, the interrupts are configured in direct mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Add support to STM LIS2DW12 3-axis accelerometer driver.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Co-authored-by: Mario Tesi <mario.tesi@st.com>
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We've removed all references to base_label in dts bindings and are
removing the functionality. We should depend on DT_ prefixed defines
going forward.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We aren't using the defines generated by base_label for this device and
we should use DT_ prefixed ones if/when we do.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The values for the registers like GDV, SDV and Boarder Waveform
depend on the panel and display controller. Add DT properties
and obtain such values from DT.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
The PWM driver can only control channels 1-3 of the PWM peripheral, not
channel 0. This is an artifact of the peripheral's design.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
This patch adds basic support for the PWM devices available on the Atmel
SAM family. Beside enabling the driver, everything is selected through
the device tree, including enabling the PWM0 and PWM1 devices. Thus
CONFIG_PWM_0 and CONFIG_PWM_1 are ignored.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer)
peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Adds device tree bindings and nodes for the rocktech lcd module used on
imx rt boards. The use of port, endpoint, and remote-endpoint properties
follow what is currently done in linux, but they are not yet used in
zephyr because some additional plumbing is needed in the
extract_dts_includes.py script.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds device tree bindings for the imx enhanced LCD interface (eLCDIF)
controller. The compatible is reused from linux.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Configure the SiFive Freedom SoC to bind to the I2C Peripheral.
Note: The FE310-G000 used on the HiFive 1 does not posess the I2C
peripheral. However, the FE310 platform can have an I2C device memory
mapped in the location described in riscv32-fe310.dtsi.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Driver for the I2C peripheral in the SiFive Blocks RTL
Repository (https://github.com/sifive/sifive-blocks).
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.
Also fixes#12765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Actually, add the "status" property that enables the nodes explicitly.
They were apparently enabled by default without this property.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
From the driver point of view, monochrome controllers from the ssd16xx
family mostly differ by the amount of row and columns that are
supported. If they support more than 256 rows and/or columns the
corresponding size or position is sent using 2 bytes instead of 1 byte.
This patch therefore adds the width-bits and height-bits DT properties
to make this configurable.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Convert the hci_spi sample to get the SPI and GPIO settings from Device
Tree instead of Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use separate bindings for nRF Family SPI Slaves and SPI Masters so that
the properties "csn" and "def-char" can be made required for Slaves
(for Masters such settings are not applicable), and to avoid confusion
between the properties "csn" and "cs-gpios" for Master nodes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Convert the HCI SPI driver to get the SPI and GPIO settings from Device
Tree instead of Kconfig. The "zephyr,bt-hci-spi" binding is used as
a common one for this purpose ("st,spbtle-rf" is removed), to take
advantage of the new DT_<COMPAT>_<INSTANCE> generated macros and get
rid of related fixups and aliases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
As we want to remove dts dependency on Kconfig, we had a case based on
CONFIG_BOOTLOADER_MCUBOOT. From a DTS point of view that was just
getting the chosen property 'zephyr,code-partition' set. We can easily
move this to the actual dts files and remove the mcuboot.overlay.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
spi,flash has been superseded by jedec,spi-nor so remove it.
atmel,at24 belongs in mtd rather than slave, so move it.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Move IRQ number encoding out of dts_fixup.h and into the dtsi files.
For now just change devices on the dw_intc.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This board is unmaintained and unsupported. It is not known to work and
has lots of conditional code across the tree that makes code
unmaintainable.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Support for HW flow control was recently enabled in the NXP MCUX
HAL layer. Let's add a DTS binding definition for "hw-flow-control".
The MCUX uart driver shim can use this to enable HW flow control.
Signed-off-by: Michael Scott <mike@foundries.io>
Convert ssd1306 display driver to use new defines so we can remove
the dts_fixup.h code for it. Also dropped "-i2c" from compatible.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert ssd1673 display driver to use new defines so we can remove
the dts_fixup.h code for it. Also dropped "-spi" from compatible.
Fix up references in reel_board dts and sample.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert the lpd880x driver to use device tree and new DT_<COMPAT>
defines. Support both LPD8803 & LPD8806 device tree compats.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add sam0_rtc_driver that implements system timer API on top of the RTC
and can be used as a replacement for the default systick timer.
Signed-off-by: Martin Benda <martin.benda@omsquare.com>
This commit introduces the possibility to have multiple
device nodes attached to the same I2S controller. For this
purpose a new i2s-device.yaml description has been introduced
with the a 'reg' property to define the logic number of the
device. For example, if two microphones are attached to the
same I2S port (say 1) to achieve stereo audio, the two microphones
might be described in dts as:
&i2s1 {
status = "ok";
mic@0 {
compatible = "...";
reg = <0>;
label = "...";
};
mic@1 {
compatible = "...";
reg = <1>;
label = "...";
};
};
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fix the following dtc warnings on S1000:
Warning (simple_bus_reg): /soc/pinmux@81C30: simple-bus unit
address format error, expected "81c30"
Warning (alias_paths): /aliases: aliases property name must
include only lowercase and '-'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added UART4 alternate pin function for L4 µC for PC10 and PC11.
Corrected naming of previously defined UART4 TX and RX defines.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Adding a binding .yaml file for Nordic FICR and the
corresponding macro definition for NRF_FICR in
nrfx_config_nrf9160.h header file.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Correct the names of the binding files, so they comply
with binding file naming nomenclature.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit contributes a binding .yaml file for Nordic nRF
SPU peripheral and defines the macro for the peripheral base
register address in file ext/hal/nordic/nrfx_config_nrf9160.h.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.
As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.
Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:
- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral
The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.
Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
We get the following warning:
extract_dts_includes.py: WARNING: id field set in
'SMSC/Microchip LAN9220 Ethernet controller', should be
removed.
Removed the id: field to fix.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SPI1 controller that is connected to the mcr20a block utilizes the
hardware chipselect and not a GPIO CS. So remove the cs-gpios property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SPI0 node had a property called 'cs' which wasn't used or defined as
part of the binding yaml. So let's remove it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get warnings from dtc when building any of the NXP i.MX-RT boards of
the form:
mimxrt1020_evk.dts_compiled: Warning (simple_bus_reg):
/soc/random@400CC000: simple-bus unit address format
error, expected "400cc000"
Simple fix to make everything lowercase to have the unit-address and reg
match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use auto-generated device tree macros in LIS2DH driver to avoid
usage of dts.fixup files. The triggered interrupt part has been
slightly hacked to automatically understand whether only int1 is
configured or both int1 and int2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Adds STM32 L452 soc with L452xC variant. L452 has 160 KB SRAM;
therefore, mpu mem config has been extended; IRQ number is based on
'stm32l452xx.h'.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Add support to STM LIS2DS12 3-axis accelerometer driver.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Currently it uses high resolution only as power mode.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use the symbol generated from DT so that it is common for nRF9160
and nRF5 family SoCs. To avoid artificial renaming of CLOCK_POWER_IRQn
to POWER_CLOCK_IRQn.
For nRF5 family SoCs clock nodes were not defined so far, thus they are
added so that the proper DT symbol is generated for them as well.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing node for instance 0 of the RTC peripheral and use an alias
to the flash-controller node instead of the nvmc node definition (there
is no need to have a separate node just to get the NVMC base address).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The board has SMSC LAN9220 (actually as an "IP core" in an
FPGA-emulated SoC). The patch includes DTS bindings for this device.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Driver for networking device Microchip ENC28J60 is used as SPI slave,
moved to DTS type definition. Samples echo_client and echo_server use
this device on Arduino 101 board.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Support musca board as a variant, it is a Cortex-M33 based SoC.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Signed-off-by: Minos Galanakis <minos.galanakis@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds a serial driver for the ARM PL011 IP block.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Zephyr has been using "i2c,eeprom" for the compatible property. This is
inconsistent with the property documentation which expects
"manufacturer,model" to be used.
The Linux standard compatible name for I2C EEPROMs is "atmel,at24". The
standard for SPI EEPROMS is "atmel,at25". We don't have support for the
latter, but change the name for the former.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Fix the QSPI and hyperflash nodes to be proper SPI children and expose
the address range for direct access as part of the controller's reg
region.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The initial support of iotdk which is a board based on Synopsys
ARC IoT SoC.
In this commit, it includes
* processor support
* UART driver
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Convert the w25qxxdv driver to use device tree for SPI device params.
Updated the Arduino 101 config to use device tree to specify the SPI
flash. Update the arduino_101_sss to drop Kconfig support for the
w25qxxdv flash.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
By default, after reset SWO signal is not connected to GPIO pin.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
* Add DTS support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add uart5 nodes to stm32f1 series dts.
Provide matching dts_fixup add-on.
Signed-off-by: Chen Han <qq1433255094@outlook.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Features:
- Uses the SPI bus to communicate with the card
- Detects and safely rejects SDSC (<= 2 GiB) cards
- Uses the optional CRC support for data integrity
- Retries resumable errors like CRC failure or temporary IO failure
- Works well with ELMFAT
- When used on a device with a FIFO or DMA, achieves >= 310 KiB/s on a
4 MHz bus
Tested on a mix of SanDisk, Samsung, 4V, and ADATA cards from 4 GiB to
32 GiB.
Signed-off-by: Michael Hope <mlhx@google.com>
This commit introduces the main device tree header files (.dtsi)
for Nordic nRF9160 SOC, for both Secure and Non-Secure domains.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Convert lsm9ds0_gyro driver to get the device name as well as
i2c slave information and gpio info for triggers from device tree.
Updates the build_all test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We only need to add the reg property in flash0 and sram0,
in the different DTS headers for the nRF SOCS. We do not
seem to need to define the nodes again. This commit applies
this simplification for flash and sram sizes definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Fix the following warning that shows up in some NRF device tree files:
Warning (simple_bus_reg): /soc/pwm@4002D000: simple-bus unit
address format error, expected "4002d000"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On i.mx6/7 the TCMU and TCML regions are specific to instruction or
data. So use the nxp,imx-itcm for TCML and nxp,imx-dtcm for TCMU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The imx-rt-{i,d}tcm bindings can actually be utilized on the i.MX6/7 as
well for the TCM{L,U} regions of memory as they are specific to
instruction or data.
So let's rename imx-rt-{i,d}tcm to imx-{i,d}tcm.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert lsm9ds0_mfd accel/magn driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Due to a bad timing in merging PR #10744 and PR #12083, the flash0 node
in stm32f756Xg.dtsi ended-up at the root of the device tree, while the
flash0 node it is trying to override in stm32f7.dtsi is now under
/soc/flash-controller.
This patch fixes that by moving it at the right location.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).
Added basic documentation and some soc definitions for the
stm32 f756XX soc.
Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
Adds a second sram node to the k64 device tree to acknowledge that the
additional sram is present in hardware, but deliberately not used in
zephyr until an outstanding issue is solved. The upper and lower sram
nodes are contiguous in the memory map, however the Cortex-M4
architecture does not support misaligned accesses across the boundary
between the two nodes.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
We currently get a number of warnings like:
Warning (simple_bus_reg): /soc/otgfs_phy: missing or empty
reg/ranges property
This is due to the usb phy nodes not have a reg property since they
don't have an mmio address associated with them.
Move the phy nodes out of the SoC node so their lack of a reg property
will not cause a warning. This is similar to how Linux dts files
handle the phy nodes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix the following warning that shows up in some NRF device tree files:
Warning (simple_bus_reg): /soc/pwm@4001C000: simple-bus unit
address format error, expected "4001c000"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
1. PWM device node added with alias to all
nRF52x DTSI files. 1 instance for
nRF52810, 3 instances for nRF52832, and
4 instance for nRF52840.
2. Added yaml binding for Nordic PWM node.
Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
Add comptiable into the device tree and associated binding files for NXP
i.MX RT ITCM/DTCM memory regions.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert lis3dh accelerometer driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Now that we can support the same compatible but different bus types,
update the LSM6DSL support to utilize the same compatible for either I2C
or SPI. We rename the i2c binding file to st,lsm6dsl-i2c.yaml just to
be a bit more clear.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a dts binding file for the cc1200 and move the Kconfig options for
SPI and GPIOs to DTS for the CC1200 driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds dts/bindings/adi,adxl372-spi.yaml for
using ADXL372 on SPI bus instead of I2C which is used
in dts/bindings/adi,adxl372.yaml.
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
The STM32L433 has the same layout than the STM32L432, additionally it
has GPIOD, GPIOE, I2C2, USART3 and SPI2.
Also move USART3 and SPI2 out of stm32l4.dtsi since STM32L432 does not
have it.
Fixes#10909.
Signed-off-by: Markus Roppelt <markus.roppelt@gmx.de>
Convert lis2dh accelerometer driver to get the device name as well
as i2c/spi slave information from device tree. Updates the build_all
test accordingly. (issue #11605)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
There are different interrupt numbers for R22 v R23. Before this was
being handled via using Kconfig symbol CONFIG_BOARD_EM_STARTERKIT_R23 in
emsk_dt.h. Since we want to remove use of Kconfig in dts we handle this
via different dtsi files and having the proper one included by the
proper board revision dts file.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Towards removing Kconfig from DTS we need to move setting of the sizes
of ICCM/DCCM into the SoC specific DTS files and out of emsk_dt.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFM32 Pearl Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
Ported from EFM32WG:
https://www.silabs.com/documents/public/application-notes/an0918.0-efm32_to_efm32jgpg_migration_guide.pdf
Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds the virtualcom device to the nrf52840 SoC dts and adds a board
specific nrf52840_overlay.dts file, copied exactly from the
arduino101_overlay.dts file, to set the console device name
appropriately for the subsys/usb/console sample project.
There were no clear alternatives to add a usb_cdc: virtualcom device to
all known SoC devices with USB support as should probably happen.
There was also no clear alternatives to add a non-board specific overlay
to the example.
This fixes a specific problem with the nrf52840-dk board for this sample
project.
Signed-off-by: Tom Burdick <thomas.burdick@gmail.com>
This commit adds support for STM32L471xG. Since STM32L475 only adds
USB, stm32l475.dtsi now includes stm32l471.dtsi
Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
This patch adds a flash driver for the Atmel SAM E70 SoC. The driver has
been kept simple by considering that the flash is only composed of 8-KiB
blocks. Indeed an area at the beginning of the flash might be erased
with a smaller granularity, and the other blocks can also be erased with
a higher granularity. It also only handles the global read/write
protection, not the 128-KiB lock regions. A write error is returned if
a region is locked.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Enables Networking hardware on i.MX-RT type drivers.
Reuses the same eth_mcux driver used by Kinetis family; initialization
sequence refactored to work with this board as well. Unlike Kinetis
family, i.MX has a single ENET interrupt and we need to discriminate
between interrupts using a status register.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Add Messaging Unit B peripheral support for i.MX6SoloX soc so it can
use IMX IPM.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add driver for i.MX Messaging Unit peripheral which can be used for
i.MX6SoloX, i.MX7D and other i.MX socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
When the WNC-14A2A modem binding was originally introduced, I thought
the base_label would shorten the define keeping the result short and
easily portable. Turns out with the latest changes, it has a side
effect of removing the "DT_*" prefix which is breaking the build.
Let's remove "base_label" from the modem binding and adjust all of
the dts_fixups referring to the WNC14A2A defines.
NOTE: This commit moves the left-over WNC14A2A dts_fixup defines from
the nRF52 soc into samples/net/lwm2m_client as the new values.
They will stay there until the modem can be re-configured as a shield.
Signed-off-by: Michael Scott <mike@foundries.io>
dtc produces the following warning:
Warning (simple_bus_reg): /soc/itim@8000000: simple-bus unit address
format error, expected "0"
We had the wrong unit address in the dtsi file, should be 0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
dtc was producing this warning when we build on SAMD SoCs:
Warning (simple_bus_reg): /soc/nvmctrl@41004000:
simple-bus unit address format error, expected "40022000"
The reg addr isn't used by the flash_sam0.c driver so we wouldn't notice
this issue. Looking at the atmel HAL we see:
#define NVMCTRL ((Nvmctrl *)0x41004000UL)
So that provides confirmation of what the reg addr should be.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Kinetis device K64F's PTP interrupt crashed the system becase it was not
generated from dts. Device interrupt correctly set now.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Added support to the ti,cc2520 binding for optional GPIO signals and
moved the quark_se_c1000_devboard to define those signals in the DTS.
This lets us remove board.h and some #defines & fake Kconfig symbols
from the quark_se_c1000_devboard board.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The CC2520 device is specific to the quark_se_c1000_devboard not the
intel curie SoC. Move the device node where it belongs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add yaml file for initial support of USB PHYs.
It adds also yaml files for STM32 USBPHYC and
USB controllers with embedded PHY.
PHY refers to the physical layer which is used
to connect a device to the physical medium e.g.
USB controller.
Origin: original
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Converts the adxl362 sensor driver to get the device name and spi slave
properties from the device tree rather than Kconfig. Updates the
build_all test accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add a dts binding for the Atmel WINC1500 WIFI chip. Update the
quark_se_c1000_devboard to utilize this binding as well as the wifi
sample app.
We now get all the GPIOs related to the Atmel WINC1500 from the device
tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert the BMI160 to use Device Tree to get SPI and GPIO params instead
of Kconfig. Updated samples, tests, and arduino_101_sss board support
for this.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add #pwm-cells to the sifive PWM binding and dts files. This is to
support have a pwms clients work properly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F103 micros starting from 64-pin (xE) packages upward have
available port G. This patch defines a dts binding for them.
Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
Add #pwm-cells to the i.MX PWM binding and dts files. This is to
support have a pwms clients work properly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add #pwm-cells to the STM32 PWM binding and dts files. This is to
support have a pwms clients work properly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Newer DTC now warns about mismatch between the reg and unit-address.
Most of these cases are due to case not matching, so fix thoses so
everything is lowercase.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Intel S1000 has 4MB of internal memory.
In DTS it was defined as 3MB and is now updated to 4MB.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
This is found on quark_se_c1000_devboard but can also be wired on
any boad with SPI bus.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.
The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.
The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.
Manual tests were executed on:
- NUCLEO-F103RB
- STM32F429I-DISCO
- STM32F746G-DISCO
- NUCLEO-F767ZI
Manual tests consisted of blinky on different GPIOs and pins on each
board.
sanitycheck was executed for all STM32 based boards
Fixes: #10629
Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
Update stm32f469i_disco configuration to match with
default configuration guidelines:
-Configure available connectors
-Update yaml file
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update stm32l496g_disco configuration to match with
default configuration guidelines:
-Deactivate features by default
-Configure available connectors
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update disco_l475_iot1 configuration to match with
default configuration guidelines:
-Deactivate features by default
-Configure available connectors
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The only difference between the F413xH and F413xG is flash memory size.
STMF413xH: 1536 Kbytes
STMF413xG: 1024 Kbytes
Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
This patch adds a USB device driver for the USBHS device that can be
found on Atmel SAM E70 SoC family. Only the FIFO mode is supported
(as opposed to DMA). It supports LS, FS and HS modes, but defaults to
FS mode as Zephyr does not fully support HS mode yet.
Tested examples on an Atmel SMART SAM E70 Xplained Board:
* usb/cdc_acm
* usb/hid-mouse
* usb/mass
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add clocks property in stm32l4r5 devices.
Replace i2c2 node by i2c3 node in l4.dtsi as i2c3 available
in all stm32l4 SoCs while i2c2 is not available in some parts.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add dts binding and info for TRNG device and enable basic support to
get the device name from DTS. We leave for now the base addresses
coming from the MCUX HAL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add dts binding and info for RNGA device and enable basic support to
get the device name from DTS. We leave for now the base addresses
coming from the MCUX HAL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we have DTS support for an entropy driver we should get the name
generated from DTS ('label' property on the entropy device node).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Reworked flash partition extraction so we call it when we see a
node that is 'partiton@' instead of per property. We also handle the
'read-only' property in the flash partition extraction function which
lets us remove 'use-property-label' handling.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add #pwm-cells properties to kinetis dts files and update the yaml
binding to spec the two cells as pin and period (in nanosecond to match
Linux Kernel binding spec).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert gpio_cc32xx driver over to using device tree. Added binding
files, updates to dts for various SoCs that use cc32xx.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We set 'use-prop-label' incorrectly in the st,stm32-ccm binding file.
This property is meant to generate names based on there being a label
property set in the node. For st,stm32-ccm nodes we don't ever set
labels and the binding file doesn't specify a label. So remove setting
'use-prop-label'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
atmel,sam-watchdog..yaml had the old id field that we have removed.
Remove it so we stop getting a warning about it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add minimal DTS support for the m2gl025_miv. The dts just has the core,
SoC, PLIC, and UART described. We still get memory related info from
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adding watchdog driver for sam SoC. The current implemntation just
diables the watchdog on device boot.
This PR adds the following support for SAM3X, SAM4S and SAME70
1. Activate processor reset
2. Activate all reset
3. Generate interrupt on watchdog timer expiration.
Signed-off-by: Subramanian Meenakshi Sundaram <subbu147@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
inventek,eswifi.yaml had the old id field that we have removed. Remove
it so we stop getting a warning about it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove setting of base_label and use-property-label from soc-nv-flash
binding file. We don't really need to set either of these properties
in the binding and it just goes to make things more complicated than
they need to be.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There were several issues in the dts binding for the ssd1673 display:
* binding file mixed description & generation up together
* Use of BASE_LABEL
* orientation-flipped should have been of type boolean
Update the binding file to reflect these changes, and made associated
changes to dts_fixup.h and driver as needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A few issues with the dts support for the SSD1306 display driver:
1. binding file mixed description & generation up together
- rename most uses of generation to description and add proper
generation field into yaml
2. Drop use of BASE_LABEL, this shouldn't be used by most bindings
3. dts defines that are being assumed in driver aren't correct. We
should be using a dts_fixup.h in the sample to map the generated
defines to those used in the driver. We remove the incorrect
defines that the driver assumes right now.
4. Fixup 'segment-remap' and 'com-invdir' properties that are booleans
in the binding file and associated code changes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFR32MG12P Mighty Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* integrated Sub-GHz and/or 2.4GHz radio
* multiple low power peripherals
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
Partially replaces Kinetis MCUX driver configuration from Kconfig to
Device Tree. Interrputs moved from defines configuration to DT.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Fix the following dts warnings:
up_squared.dts_compiled: Warning (simple_bus_reg): /soc/gpio@0:
simple-bus unit address format error, expected "d0c50000"
up_squared.dts_compiled: Warning (simple_bus_reg): /soc/i2c@91528000:
simple-bus unit address format error, expected "9158000"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Driver fxos8700 can also be used for the MMA8451
accelerometer and offers more functionality.
Revert the commit to avoid duplicate code.
This reverts commit 9c0d7813e5.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Some new yaml bindings that got committed added back in the 'id:' field
which we have removed. Remove it from those dts binding files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduces the location property and adds the ability to use values
generated by the device tree configuration.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch adds the device binding for qmsi watchdog and device node
for socs which are using wdt qmsi driver.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Added support to LIS2MDL Magnetometer sensor provided
with following features:
- I2C interface
- Mag data
- Temperature data
- ODR configurable by config or at runtime
- Trigger mode selectable by menuconfig
- IRQ pin configurable (by dts or Kconfig)
- Hard Iron offset setting at runtime
- Include yaml file
Tested on ST MEMS IKS01A2 + NUCLEO STM32F411RE board.
LIS2MDL connected to I2C master interface (SPI 3 wire not
supported yet).
Test run with all ODR {10, 20, 50, 100} Hz in poll and
trigger mode.
GPIO IRQ dts configuration has been tested by adding
to boards/arm/nucleo_f411re/nucleo_f411re.dts file
this patch:
&i2c1 {
status = "ok";
clock-frequency = <I2C_BITRATE_FAST>;
+
+ /* ST Microelectronics LIS2MDL mag sensor */
+ lis2mdl-magn@1e {
+ compatible = "st,lis2mdl-magn";
+ reg = <0x1e>;
+ irq-gpios = <&gpioa 4 0>;
+ label = "LIS2MDL";
+ status = "ok";
+ };
};
and adding boards/arm/nucleo_f411re/dts.fixup with following
content:
ST_STM32_I2C_V1_40005400_ST_LIS2MDL_MAGN_1E_LABEL
ST_STM32_I2C_V1_40005400_ST_LIS2MDL_MAGN_1E_BASE_ADDRESS
ST_STM32_I2C_V1_40005400_ST_LIS2MDL_MAGN_1E_BUS_NAME
ST_STM32_I2C_V1_40005400_ST_LIS2MDL_MAGN_1E_IRQ_GPIOS_CONTROLLER
ST_STM32_I2C_V1_40005400_ST_LIS2MDL_MAGN_1E_IRQ_GPIOS_PIN
For more info on this LIS2MDL please follow this link:
http://www.st.com/en/mems-and-sensors/lis2mdl.html
Signed-off-by: Mario Tesi <mario.tesi@st.com>
Add I2S bus initial support to stm32f4 SOC family.
On stm32f4 the I2S shares same controller as SPI, so
the declarations have been adapted from SPI ones.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The 'id' field was never used and tended to just have the compat of the
node. Lets remove it and removed some code in extract_dts_includes.py
related to it. Added a warning if 'id' is set in a yaml so we can
remove it going forward.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFM32 Happy Gecko MCU includes:
* Cortex-M0+ core at 24MHz
* Up to 64KB of flash and 8KB of RAM
* Full speed (12 MHz) USB 2.0 Device
* Multiple low power peripherals
Signed-off-by: Marcio Montenegro <mtuxpe@gmail.com>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Convert over arc based boards to use device tree instead of board.h to
describe buttons & LEDs. There are a few boards that the button gpio
flags need validation.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will be usefull to tell when Ethernet device has its attributes
filled in by DTS rather than by Kconfig.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add maximum-speed property to usb nodes and set it to
their maximum on-chip PHY capability.
SoCs with USB device controllers only support full
speed, so we don't add maximum-speed to these nodes.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add maximum-speed property to usb node.
It configures USB controllers to work up to a specific speed.
Valid arguments are "super-speed", "high-speed", "full-speed"
and "low-speed".
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Convert over x86 based boards to use device tree instead of board.h to
describe buttons & LEDs. There are a few boards that the button gpio
flags need validation.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin
generation based on device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The gpio controllers on SAM4S, SAME70, and SAMD were missing properties
related to GPIO pin generation. Add the missing details into the yaml
and dts files to allow boards to specific gpio pins.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the needed bits to get device tree support for the GPIO controller
on the Zedboard-Pulpino. This will allow us to move LED & button info
into the board.dts.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add simple device tree support for the Pulpino SoC and Zedboard-Pulpino
board port. This gets the UART info from device tree instead of soc.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
added sam4s16b, sam4s8c, sam4s8b, sam4s4c, sam4s4b,
sam4s4a, sam4s2c, sam4s2b and sam4s2a.
Used the same order as in the data sheet and code structure
equal to same70. Updated the sam4s_xplained board to match
the altered .dtsi location of the specific SoC.
Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
This patch adds timers and PWM nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_PINS and
HAS_DTS_SPI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled gpio drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_GPIO_DEVICE and
HAS_DTS_GPIO.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_DEVICE and
HAS_DTS_SPI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Now that we've cleaned up all the STM32 related .dtsi files we don't
use dts/arm/st/mem.h so we can remove it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F7 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F4 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F3 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F2 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.
Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the L4 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the L0 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F1 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. We also seperate
out the F0 dtsi files into their own dir.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adding i2c slave requires overlay with node definitions and
proper aliases depending on driver implementation.
Modified i2c_slave_api test to use information from dts.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Added basic PSoC6 UART driver and added two UART nodes in the PSoC6
device tree to have output from CM0+ and CM4 cores.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
Enable UART 16550 driver for Nios-II QEMU platform.
Note: This PR is tested with patched version Qemu 3.0.0 which
adds support for altera_10m50_zephyr machine type.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
'use-prop-name' is not documented.
Update dts/bindings/device_node.yaml.template to fix this.
Document that 'type' attribute is not used.
Fixes#9971
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash controller-node for stm32f2 based SoCs was missing basic
properties such as compatible, labeln reg and interrupts.
Fix this and add matching yaml binding file;
Fixes#10057
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When we fixed the missing reg property in the cpu node, we forgot to
add #address-cells & #size-cells for the node.
This fix the following warnings we get:
Warning (reg_format): "reg" property in /cpus/cpu@0 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This change aims at fixing 'unit_address_vs_reg' warning in
stm32 *-pinctrl.dtsi files.
This warning pops up when a node name is made up with an address
(node_name@xx) but does not contain a reg property.
This case was encountered for led nodes for instance,
where a reg property has no meaning.
Fix this by changing node_name@xx to node_name_xx which removes the
guilty '@xx' syntax but preserves node_name uniqueness.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /soc/virtualcom@0:
node has a unit name, but no reg property
Fix by dropping the unit address from the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /flash: node has a reg or ranges
property, but no unit name
or
Warning (unit_address_vs_reg): /memory: node has a reg or ranges
property, but no unit name
Fix by adding unit address that is missing to flash & memory nodes.
Additionally the Silabs memory nodes didn't have a compatiable or
device_type, so add those properties as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/cpu@0: node has a
unit name, but no reg property
Fix by adding reg property to missing cpu nodes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/arcv2-intc@0:
node has a unit name, but no reg property
Fix by removing the unit address from the nodes. Some cases we had a
reg property and a unit address for such interrupt controllers, in those
cases remove both the reg & unit address in the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_format): /soc/uart@000003f8:
unit name should not have leading 0s
Fix these by remove the leading 0s.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_NRF51822_QFAA
CONFIG_SOC_NRF51822_QFAB
CONFIG_SOC_NRF51822_QFAC
CONFIG_SOC_NRF52810_QFAA
CONFIG_SOC_NRF52832_QFAA
CONFIG_SOC_NRF52832_CIAA
CONFIG_SOC_NRF52832_QFAB
CONFIG_SOC_NRF52840_QIAA
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_PART_NUMBER_SAME70*
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere. We also have DT_SIZE_M, so use that in a few
places as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The RTC node for some reason was setting #address-cells and #size-cells.
However it has no children so there isn't really any reason to do this.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In case of out of tree SoC, mem.h will trigger and error since
it is not aware of new SoC CONFIG_SOC_<reference>.
Modify error condition in order to generate the error only if
the flash and error size are not defined at this point (even in
out of tree case).
Fixes#9978
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_PART_NUMBER_EFM32WG990F256
CONFIG_SOC_PART_NUMBER_EFR32FG1P133F256GM48
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_CC3220SF
CONFIG_SOC_MSP432P401R
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add 'generation: define' directive to 'compatible' property.
When existing for a type of device, move compatible property
description in device base structure (eg: i2c.yaml)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
All flash controllers have a mandatory compatible property.
Add it to the generic binding that is included by all.
Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
UART pins (TX, RX, RTS, CTS) are now configured in DTS files.
RTS and CTS definitions are optional. If flow control is enabled
and RTS/CTS pins are not defined, then compiler will issue
an error message.
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
The LEDs, buttons and necessary aliases are now configured via dts.
This commit breaks the sample under samples/boards/nrf52/power_mgr.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
According to Device Tree specification, previously
defined nodes may be deleted with the followin
syntax:
/delete-node/ node-name;
or
/delete-node/ &label;
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This change adds DTS definition of SPI device for nRF chips.
It also removes SPI pin configuration from Kconfig and moves it to
chip DTS.
Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
This commit adds ADC nodes to DTS files for nRF SoCs and introduces
corresponding bindings for these nodes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The whole STM32L4 family has a flash with a constant page size of 2kB.
Specify this value in the DTS as the nvs sample application pull it
from there.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The nvs sample assumed a 1 KB flash erase block size, which caused the
sample to fail on frdm_k64f because its erase block size is 4 KB. Get
the erase block size from dts instead.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Michael Hope
