drivers: clock_control: Add STM32L1X clock support
Add clock support for STM32L1X SoC series. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit is contained in:
parent
92ac6d8fc6
commit
c8b0a8d41f
5 changed files with 60 additions and 3 deletions
|
@ -17,6 +17,7 @@ if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
|
|||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F4X stm32f4x_ll_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F7X stm32f7x_ll_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L0X stm32l0x_ll_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L1X stm32l1x_ll_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L4X stm32l4x_ll_clock.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32WBX stm32wbx_ll_clock.c)
|
||||
endif()
|
||||
|
|
|
@ -300,7 +300,7 @@ config CLOCK_STM32_PLL_Q_DIVISOR
|
|||
|
||||
endif # SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
|
||||
|
||||
if SOC_SERIES_STM32L0X
|
||||
if SOC_SERIES_STM32L0X || SOC_SERIES_STM32L1X
|
||||
|
||||
config CLOCK_STM32_PLL_MULTIPLIER
|
||||
int "PLL multiplier"
|
||||
|
@ -319,7 +319,7 @@ config CLOCK_STM32_PLL_DIVISOR
|
|||
help
|
||||
PLL divisor, allowed values: 2-4.
|
||||
|
||||
endif # SOC_SERIES_STM32L0X
|
||||
endif # SOC_SERIES_STM32L0X || SOC_SERIES_STM32L1X
|
||||
|
||||
if SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX
|
||||
|
||||
|
|
42
drivers/clock_control/stm32l1x_ll_clock.c
Normal file
42
drivers/clock_control/stm32l1x_ll_clock.c
Normal file
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* Copyright (c) 2019 Linaro Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
|
||||
#include <soc.h>
|
||||
#include <soc_registers.h>
|
||||
#include <clock_control.h>
|
||||
#include <misc/util.h>
|
||||
#include <clock_control/stm32_clock_control.h>
|
||||
#include "stm32_ll_clock.h"
|
||||
|
||||
|
||||
#ifdef CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL
|
||||
|
||||
/* Macros to fill up multiplication and division factors values */
|
||||
#define _pll_mul(v) LL_RCC_PLL_MUL_ ## v
|
||||
#define pll_mul(v) _pll_mul(v)
|
||||
|
||||
#define _pll_div(v) LL_RCC_PLL_DIV_ ## v
|
||||
#define pll_div(v) _pll_div(v)
|
||||
|
||||
/**
|
||||
* @brief Fill PLL configuration structure
|
||||
*/
|
||||
void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
|
||||
{
|
||||
pllinit->PLLMul = pll_mul(CONFIG_CLOCK_STM32_PLL_MULTIPLIER);
|
||||
pllinit->PLLDiv = pll_div(CONFIG_CLOCK_STM32_PLL_DIVISOR);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL */
|
||||
|
||||
/**
|
||||
* @brief Activate default clocks
|
||||
*/
|
||||
void config_enable_default_clocks(void)
|
||||
{
|
||||
/* Nothing for now */
|
||||
}
|
|
@ -5,6 +5,7 @@
|
|||
*/
|
||||
|
||||
#include <arm/armv7-m.dtsi>
|
||||
#include <dt-bindings/clock/stm32_clock.h>
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
|
@ -24,6 +25,14 @@
|
|||
};
|
||||
|
||||
soc {
|
||||
rcc: rcc@40023800 {
|
||||
compatible = "st,stm32-rcc";
|
||||
clocks-controller;
|
||||
#clock-cells = <2>;
|
||||
reg = <0x40023800 0x400>;
|
||||
label = "STM32_CLK_RCC";
|
||||
};
|
||||
|
||||
flash-controller@40023c00 {
|
||||
compatible = "st,stm32l1-flash-controller";
|
||||
label = "FLASH_CTRL";
|
||||
|
@ -40,7 +49,6 @@
|
|||
write-block-size = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -29,6 +29,12 @@
|
|||
|
||||
#include <stm32l1xx_ll_system.h>
|
||||
|
||||
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
|
||||
#include <stm32l1xx_ll_utils.h>
|
||||
#include <stm32l1xx_ll_bus.h>
|
||||
#include <stm32l1xx_ll_rcc.h>
|
||||
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
|
||||
|
||||
#endif /* !_ASMLANGUAGE */
|
||||
|
||||
#endif /* _STM32L1_SOC_H_ */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue