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dts: riscv32: microsemi-miv: add flash and sram

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Add flash and SRAM to the Microsemi MiV device tree.

Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This commit is contained in:
Filip Kokosinski 2019-04-18 15:54:07 +02:00 • committed by Maureen Helm
commit 6299890b0e
1 changed files with 11 additions and 0 deletions
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11
dts/riscv32/microsemi-miv.dtsi
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@ -31,6 +31,17 @@
compatible = "microsemi,miv-soc", "simple-bus";
ranges;
flash0: flash@80000000 {
compatible = "soc-nv-flash";
reg = <0x80000000 0x40000>;
};
sram0: memory@80040000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0x80040000 0x40000>;
};
plic: interrupt-controller@40000000 {
#interrupt-cells = <1>;
compatible = "riscv,plic0";