drivers: usb/stm32: use dts information to populate clock settings
This patch populates "clocks" property in stm32 usb nodes for clock related usb configuration code of each dtsi files Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
parent
8e11970378
commit
474c99c9ef
27 changed files with 59 additions and 23 deletions
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@ -196,29 +196,8 @@ static int usb_dc_stm32_clock_enable(void)
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{
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struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
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struct stm32_pclken pclken = {
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#ifdef DT_USB_HS_BASE_ADDRESS
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.bus = STM32_CLOCK_BUS_AHB1,
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.enr = LL_AHB1_GRP1_PERIPH_OTGHS
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#else /* DT_USB_HS_BASE_ADDRESS */
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#ifdef USB
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.bus = STM32_CLOCK_BUS_APB1,
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.enr = LL_APB1_GRP1_PERIPH_USB,
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#else /* USB_OTG_FS */
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#ifdef CONFIG_SOC_SERIES_STM32F1X
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.bus = STM32_CLOCK_BUS_AHB1,
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.enr = LL_AHB1_GRP1_PERIPH_OTGFS,
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#else
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.bus = STM32_CLOCK_BUS_AHB2,
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.enr = LL_AHB2_GRP1_PERIPH_OTGFS,
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#endif /* CONFIG_SOC_SERIES_STM32F1X */
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#endif /* USB */
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#endif /* DT_USB_HS_BASE_ADDRESS */
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.bus = DT_USB_CLOCK_BUS,
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.enr = DT_USB_CLOCK_BITS,
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};
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/*
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@ -33,6 +33,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&usb_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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status = "disabled";
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label= "USB";
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};
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@ -61,6 +61,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&usb_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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status = "disabled";
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label= "USB";
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};
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@ -39,6 +39,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <512>;
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status = "disabled";
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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phys = <&usb_fs_phy>;
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label= "USB";
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};
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@ -208,6 +208,7 @@
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num-bidir-endpoints = <4>;
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ram-size = <1280>;
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maximum-speed = "full-speed";
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
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phys = <&otgfs_phy>;
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status = "disabled";
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label = "OTGFS";
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@ -171,6 +171,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <512>;
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phys = <&usb_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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status = "disabled";
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label= "USB";
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};
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@ -217,6 +217,7 @@
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ram-size = <1280>;
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maximum-speed = "full-speed";
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phys = <&otgfs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
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status = "disabled";
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label= "OTGFS";
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};
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@ -172,6 +172,7 @@
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ram-size = <4096>;
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maximum-speed = "full-speed";
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phys = <&otghs_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
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status = "disabled";
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label= "OTGHS";
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};
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@ -30,6 +30,7 @@
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ram-size = <4096>;
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maximum-speed = "full-speed";
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phys = <&otghs_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
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status = "disabled";
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label= "OTGHS";
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};
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@ -571,6 +571,7 @@
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ram-size = <1280>;
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maximum-speed = "full-speed";
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phys = <&otgfs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
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status = "disabled";
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label = "OTGFS";
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};
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@ -583,6 +584,7 @@
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num-bidir-endpoints = <9>;
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ram-size = <4096>;
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maximum-speed = "full-speed";
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clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
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phys = <&otghs_fs_phy>;
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status = "disabled";
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label= "OTGHS";
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@ -65,6 +65,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&otgfs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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status = "disabled";
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label= "USB";
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};
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@ -64,6 +64,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&otgfs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
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status = "disabled";
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label= "USB";
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};
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@ -16,6 +16,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&usb_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
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status = "disabled";
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label = "USB";
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};
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@ -36,6 +36,7 @@
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num-bidir-endpoints = <8>;
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ram-size = <1024>;
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phys = <&usb_fs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
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status = "disabled";
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label = "USB";
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};
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@ -17,6 +17,7 @@
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ram-size = <1280>;
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maximum-speed = "full-speed";
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phys = <&otgfs_phy>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
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status = "disabled";
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label= "OTGFS";
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};
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@ -139,6 +139,7 @@
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num-bidir-endpoints = <6>;
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ram-size = <1280>;
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maximum-speed = "full-speed";
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
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phys = <&otgfs_phy>;
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status = "disabled";
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label= "OTGFS";
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@ -33,3 +33,9 @@ properties:
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type: array
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category: optional
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description: PHY provider specifier
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clocks:
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type: array
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category: required
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description: Clock gate control information
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generation: define
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@ -33,3 +33,9 @@ properties:
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type: array
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category: optional
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description: PHY provider specifier
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clocks:
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type: array
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category: required
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description: Clock gate control information
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generation: define
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@ -45,3 +45,10 @@ properties:
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category: optional
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description: For STM32F0 series SoCs on QFN28 and TSSOP20 packages
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enable PIN pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
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generation: define
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clocks:
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type: array
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category: required
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description: Clock gate control information
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generation: define
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@ -127,6 +127,8 @@
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#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
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#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS
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#ifdef DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
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#define DT_USB_ENABLE_PIN_REMAP DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
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@ -156,6 +156,8 @@
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#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
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#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS
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#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
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#define DT_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
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@ -145,6 +145,8 @@
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
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#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
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#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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@ -151,6 +151,8 @@
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#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
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#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS
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#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
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#define DT_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
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@ -290,6 +290,8 @@
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
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#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
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#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
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#endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */
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#ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
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@ -299,6 +301,8 @@
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_OTGHS_40040000_RAM_SIZE
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#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
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#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGHS_40040000_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGHS_40040000_CLOCK_BUS
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#endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */
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#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40010000_PWM_LABEL
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@ -266,6 +266,8 @@
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
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#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
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#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
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#endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */
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#ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
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@ -275,6 +277,8 @@
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_OTGHS_40040000_RAM_SIZE
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#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
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#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGHS_40040000_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGHS_40040000_CLOCK_BUS
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#endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */
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#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40010000_PWM_LABEL
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@ -130,6 +130,8 @@
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#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
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#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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@ -218,6 +218,8 @@
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#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40006800_IRQ_USB_PRIORITY
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40006800_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40006800_RAM_SIZE
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#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40006800_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40006800_CLOCK_BUS
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#endif
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#if defined(DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS)
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#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
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#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
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#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
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#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
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#endif
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#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
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