arm: exx32: Add Silabs EFM32PG12B soc files
The Silicon Labs EFM32 Pearl Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
Ported from EFM32WG:
https://www.silabs.com/documents/public/application-notes/an0918.0-efm32_to_efm32jgpg_migration_guide.pdf
Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Gil Benkö
Kumar Gala
parent
4466460be4
commit
1f6425b1d8
11 changed files with 553 additions and 0 deletions
174
dts/arm/silabs/efm32pg12b.dtsi
Normal file
174
dts/arm/silabs/efm32pg12b.dtsi
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@ -0,0 +1,174 @@
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/*
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* Copyright (c) 2018 Christian Taedcke <hacking@taedcke.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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flash-controller@400e0000 {
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compatible = "silabs,gecko-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x400e0000 0x104>;
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interrupts = <25 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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write-block-size = <4>;
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};
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};
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usart0: usart@40010000 { /* USART0 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010000 0x400>;
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interrupts = <12 0 13 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_0";
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};
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usart1: usart@40010400 { /* USART1 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010400 0x400>;
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interrupts = <20 0 21 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_1";
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};
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usart2: usart@40010800 { /* USART2 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010800 0x400>;
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interrupts = <40 0 41 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_2";
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};
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usart3: usart@40010c00 { /* USART3 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010c00 0x400>;
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interrupts = <43 0 44 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_3";
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};
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leuart0: leuart@4004a000 { /* LEUART0 */
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compatible = "silabs,gecko-leuart";
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reg = <0x4004a000 0x400>;
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interrupts = <22 0>;
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status = "disabled";
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label = "LEUART_0";
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};
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i2c0: i2c@4000c000 {
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compatible = "silabs,gecko-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4000c000 0x400>;
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interrupts = <17 0>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@4000c400 {
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compatible = "silabs,gecko-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4000c400 0x400>;
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interrupts = <42 0>;
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label = "I2C_1";
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status = "disabled";
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};
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gpio@4000a400 {
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compatible = "silabs,efm32-gpio";
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reg = <0x4000a400 0xf00>;
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interrupts = <1 2 11 2>;
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interrupt-names = "GPIO_EVEN", "GPIO_ODD";
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label = "GPIO";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioa: gpio@4000a000 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000a000 0x30>;
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label = "GPIO_A";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@4000a030 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000a030 0x30>;
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label = "GPIO_B";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@4000a060 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000a060 0x30>;
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label = "GPIO_C";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@4000a090 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000a090 0x30>;
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label = "GPIO_D";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@4000a0c0 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000a0c0 0x30>;
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label = "GPIO_E";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiof: gpio@4000a0f0 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000a0f0 0x30>;
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label = "GPIO_F";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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23
dts/arm/silabs/efm32pg12b500f1024gl125.dtsi
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23
dts/arm/silabs/efm32pg12b500f1024gl125.dtsi
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@ -0,0 +1,23 @@
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/*
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* Copyright (c) 2018 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/efm32pg12b.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(256)>;
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};
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soc {
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flash-controller@400e0000 {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(1024)>;
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};
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};
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};
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};
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@ -1,5 +1,6 @@
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#
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# Copyright (c) 2017 Christian Taedcke
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# Copyright (c) 2018 Gil Benkoe
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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@ -22,6 +23,7 @@ config SOC_PART_NUMBER
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default SOC_PART_NUMBER_EXX32_EFR32FG1P if SOC_SERIES_EFR32FG1P
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default SOC_PART_NUMBER_EXX32_EFM32HG if SOC_SERIES_EFM32HG
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default SOC_PART_NUMBER_EXX32_EFR32MG12P if SOC_SERIES_EFR32MG12P
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default SOC_PART_NUMBER_EXX32_EFM32PG12B if SOC_SERIES_EFM32PG12B
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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49
soc/arm/silabs_exx32/efm32pg12b/Kconfig.defconfig.efm32pg12b
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49
soc/arm/silabs_exx32/efm32pg12b/Kconfig.defconfig.efm32pg12b
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@ -0,0 +1,49 @@
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# Kconfig - Silicon Labs EFM32PG-STK3402A platform configuration options
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#
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# Copyright (c) 2018 Christian Taedcke
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_EFM32PG12B
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config SOC
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string
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default "efm32pg12b"
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config GPIO
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default y
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if GPIO
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config GPIO_GECKO
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default y
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endif # GPIO
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if SERIAL
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config UART_GECKO
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default y
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config LEUART_GECKO
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default y
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endif # SERIAL
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if I2C
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config I2C_GECKO
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default y
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endif # I2C
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if FLASH
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config SOC_FLASH_GECKO
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default y
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endif # FLASH
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endif # SOC_EFM32
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22
soc/arm/silabs_exx32/efm32pg12b/Kconfig.defconfig.series
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22
soc/arm/silabs_exx32/efm32pg12b/Kconfig.defconfig.series
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@ -0,0 +1,22 @@
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# Kconfig - EFM32PG12B series configuration options
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#
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# Copyright (c) 2018 Christian Taedcke
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_SERIES_EFM32PG12B
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config SOC_SERIES
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default "efm32pg12b"
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config NUM_IRQS
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int
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# must be >= the highest interrupt number used
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default 50
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source "soc/arm/silabs_exx32/efm32pg12b/Kconfig.defconfig.e*"
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endif # SOC_SERIES_EFM32PG12B
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17
soc/arm/silabs_exx32/efm32pg12b/Kconfig.series
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17
soc/arm/silabs_exx32/efm32pg12b/Kconfig.series
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@ -0,0 +1,17 @@
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# Kconfig - EFM32PG12B MCU line
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#
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# Copyright (c) 2018 Christian Taedcke
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_SERIES_EFM32PG12B
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bool "EFM32PG12B Series MCU"
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select HAS_SILABS_GECKO
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select CPU_CORTEX_M4
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select CPU_HAS_FPU
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select SOC_FAMILY_EXX32
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select CPU_HAS_SYSTICK
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help
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Enable support for EFM32 PearlGecko MCU series
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32
soc/arm/silabs_exx32/efm32pg12b/Kconfig.soc
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32
soc/arm/silabs_exx32/efm32pg12b/Kconfig.soc
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@ -0,0 +1,32 @@
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# Kconfig - EFM32PG12B MCU line
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#
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# Copyright (c) 2018 Christian Taedcke
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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choice
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prompt "EFM32 Pearl Gecko MCU Selection"
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depends on SOC_SERIES_EFM32PG12B
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config SOC_EFM32PG12B
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bool "SOC_EFM32PG12B"
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select HAS_CMU
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select HAS_EMU
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endchoice
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if SOC_SERIES_EFM32PG12B
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config SOC_PART_NUMBER_EFM32PG12B500F1024GL125
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bool
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config SOC_PART_NUMBER_EXX32_EFM32PG12B
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string
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default "EFM32PG12B500F1024GL125" if SOC_PART_NUMBER_EFM32PG12B500F1024GL125
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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the default value for this string.
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endif # SOC_SERIES_EFM32PG12B
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91
soc/arm/silabs_exx32/efm32pg12b/dts_fixup.h
Normal file
91
soc/arm/silabs_exx32/efm32pg12b/dts_fixup.h
Normal file
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@ -0,0 +1,91 @@
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/*
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* Copyright (c) 2018, Christian Taedcke <hacking@taedcke.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* SoC level DTS fixup file */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
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#define DT_FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
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#define DT_USART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_USART_40010000_BASE_ADDRESS
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#define DT_USART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_USART_40010000_CURRENT_SPEED
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#define DT_USART_GECKO_0_IRQ_RX DT_SILABS_GECKO_USART_40010000_IRQ_0
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#define DT_USART_GECKO_0_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY
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#define DT_USART_GECKO_0_IRQ_TX DT_SILABS_GECKO_USART_40010000_IRQ_1
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#define DT_USART_GECKO_0_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY
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#define DT_USART_GECKO_0_LABEL DT_SILABS_GECKO_USART_40010000_LABEL
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#define DT_USART_GECKO_0_LOCATION DT_SILABS_GECKO_USART_40010000_LOCATION
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#define DT_USART_GECKO_0_SIZE DT_SILABS_GECKO_USART_40010000_SIZE
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#define DT_USART_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_USART_40010400_BASE_ADDRESS
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#define DT_USART_GECKO_1_CURRENT_SPEED DT_SILABS_GECKO_USART_40010400_CURRENT_SPEED
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#define DT_USART_GECKO_1_IRQ_RX DT_SILABS_GECKO_USART_40010400_IRQ_0
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#define DT_USART_GECKO_1_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY
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#define DT_USART_GECKO_1_IRQ_TX DT_SILABS_GECKO_USART_40010400_IRQ_1
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#define DT_USART_GECKO_1_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY
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#define DT_USART_GECKO_1_LABEL DT_SILABS_GECKO_USART_40010400_LABEL
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#define DT_USART_GECKO_1_LOCATION DT_SILABS_GECKO_USART_40010400_LOCATION
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#define DT_USART_GECKO_1_SIZE DT_SILABS_GECKO_USART_40010400_SIZE
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#define DT_USART_GECKO_2_BASE_ADDRESS DT_SILABS_GECKO_USART_40010800_BASE_ADDRESS
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#define DT_USART_GECKO_2_CURRENT_SPEED DT_SILABS_GECKO_USART_40010800_CURRENT_SPEED
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#define DT_USART_GECKO_2_IRQ_RX DT_SILABS_GECKO_USART_40010800_IRQ_0
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#define DT_USART_GECKO_2_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010800_IRQ_0_PRIORITY
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#define DT_USART_GECKO_2_IRQ_TX DT_SILABS_GECKO_USART_40010800_IRQ_1
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#define DT_USART_GECKO_2_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010800_IRQ_1_PRIORITY
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#define DT_USART_GECKO_2_LABEL DT_SILABS_GECKO_USART_40010800_LABEL
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#define DT_USART_GECKO_2_LOCATION DT_SILABS_GECKO_USART_40010800_LOCATION
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#define DT_USART_GECKO_2_SIZE DT_SILABS_GECKO_USART_40010800_SIZE
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#define DT_USART_GECKO_3_BASE_ADDRESS DT_SILABS_GECKO_USART_40010C00_BASE_ADDRESS
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#define DT_USART_GECKO_3_CURRENT_SPEED DT_SILABS_GECKO_USART_40010C00_CURRENT_SPEED
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#define DT_USART_GECKO_3_IRQ_RX DT_SILABS_GECKO_USART_40010C00_IRQ_0
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#define DT_USART_GECKO_3_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010C00_IRQ_0_PRIORITY
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#define DT_USART_GECKO_3_IRQ_TX DT_SILABS_GECKO_USART_40010C00_IRQ_1
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#define DT_USART_GECKO_3_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010C00_IRQ_1_PRIORITY
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#define DT_USART_GECKO_3_LABEL DT_SILABS_GECKO_USART_40010C00_LABEL
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#define DT_USART_GECKO_3_LOCATION DT_SILABS_GECKO_USART_40010C00_LOCATION
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#define DT_USART_GECKO_3_SIZE DT_SILABS_GECKO_USART_40010C00_SIZE
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#define DT_LEUART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_LEUART_4004A000_BASE_ADDRESS
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#define DT_LEUART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_LEUART_4004A000_CURRENT_SPEED
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#define DT_LEUART_GECKO_0_IRQ DT_SILABS_GECKO_LEUART_4004A000_IRQ_0
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#define DT_LEUART_GECKO_0_IRQ_PRIORITY DT_SILABS_GECKO_LEUART_4004A000_IRQ_0_PRIORITY
|
||||
#define DT_LEUART_GECKO_0_LABEL DT_SILABS_GECKO_LEUART_4004A000_LABEL
|
||||
#define DT_LEUART_GECKO_0_LOCATION DT_SILABS_GECKO_LEUART_4004A000_LOCATION
|
||||
#define DT_LEUART_GECKO_0_SIZE DT_SILABS_GECKO_LEUART_4004A000_SIZE
|
||||
|
||||
#define DT_GPIO_GECKO_COMMON_NAME DT_SILABS_EFM32_GPIO_4000A400_LABEL
|
||||
#define DT_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_EVEN
|
||||
#define DT_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
|
||||
#define DT_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_ODD
|
||||
#define DT_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
|
||||
|
||||
#define DT_GPIO_GECKO_PORTA_NAME DT_SILABS_EFM32_GPIO_PORT_4000A000_LABEL
|
||||
#define DT_GPIO_GECKO_PORTB_NAME DT_SILABS_EFM32_GPIO_PORT_4000A030_LABEL
|
||||
#define DT_GPIO_GECKO_PORTC_NAME DT_SILABS_EFM32_GPIO_PORT_4000A060_LABEL
|
||||
#define DT_GPIO_GECKO_PORTD_NAME DT_SILABS_EFM32_GPIO_PORT_4000A090_LABEL
|
||||
#define DT_GPIO_GECKO_PORTE_NAME DT_SILABS_EFM32_GPIO_PORT_4000A0C0_LABEL
|
||||
#define DT_GPIO_GECKO_PORTF_NAME DT_SILABS_EFM32_GPIO_PORT_4000A0F0_LABEL
|
||||
|
||||
#define DT_I2C_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_I2C_4000C000_BASE_ADDRESS
|
||||
#define DT_I2C_GECKO_0_CLOCK_FREQUENCY DT_SILABS_GECKO_I2C_4000C000_CLOCK_FREQUENCY
|
||||
#define DT_I2C_GECKO_0_IRQ DT_SILABS_GECKO_I2C_4000C000_IRQ_0
|
||||
#define DT_I2C_GECKO_0_IRQ_PRIORITY DT_SILABS_GECKO_I2C_4000C000_IRQ_0_PRIORITY
|
||||
#define DT_I2C_GECKO_0_LABEL DT_SILABS_GECKO_I2C_4000C000_LABEL
|
||||
#define DT_I2C_GECKO_0_LOCATION DT_SILABS_GECKO_I2C_4000C000_LOCATION
|
||||
#define DT_I2C_GECKO_0_SIZE DT_SILABS_GECKO_I2C_4000C000_SIZE
|
||||
|
||||
#define DT_I2C_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_I2C_4000C400_BASE_ADDRESS
|
||||
#define DT_I2C_GECKO_1_CLOCK_FREQUENCY DT_SILABS_GECKO_I2C_4000C400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_GECKO_1_IRQ DT_SILABS_GECKO_I2C_4000C400_IRQ_0
|
||||
#define DT_I2C_GECKO_1_IRQ_PRIORITY DT_SILABS_GECKO_I2C_4000C400_IRQ_0_PRIORITY
|
||||
#define DT_I2C_GECKO_1_LABEL DT_SILABS_GECKO_I2C_4000C400_LABEL
|
||||
#define DT_I2C_GECKO_1_LOCATION DT_SILABS_GECKO_I2C_4000C400_LOCATION
|
||||
#define DT_I2C_GECKO_1_SIZE DT_SILABS_GECKO_I2C_4000C400_SIZE
|
||||
|
||||
/* End of SoC Level DTS fixup file */
|
||||
16
soc/arm/silabs_exx32/efm32pg12b/linker.ld
Normal file
16
soc/arm/silabs_exx32/efm32pg12b/linker.ld
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Christian Taedcke
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Linker command/script file
|
||||
*
|
||||
* This is the linker script for both standard images.
|
||||
*/
|
||||
|
||||
#include <autoconf.h>
|
||||
|
||||
#include <arch/arm/cortex_m/scripts/linker.ld>
|
||||
37
soc/arm/silabs_exx32/efm32pg12b/soc.h
Normal file
37
soc/arm/silabs_exx32/efm32pg12b/soc.h
Normal file
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright (c) 2017 Christian Taedcke
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Board configuration macros for the efm32pg12b soc
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SOC__H_
|
||||
#define _SOC__H_
|
||||
|
||||
#include <misc/util.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef _ASMLANGUAGE
|
||||
|
||||
#include <em_bus.h>
|
||||
#include <em_common.h>
|
||||
#include <device.h>
|
||||
|
||||
#include "soc_pinmap.h"
|
||||
#include "../common/soc_gpio.h"
|
||||
|
||||
#endif /* !_ASMLANGUAGE */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SOC__H_ */
|
||||
90
soc/arm/silabs_exx32/efm32pg12b/soc_pinmap.h
Normal file
90
soc/arm/silabs_exx32/efm32pg12b/soc_pinmap.h
Normal file
|
|
@ -0,0 +1,90 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Christian Taedcke
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/** @file
|
||||
* @brief Silabs EFM32PG12B MCU pin definitions.
|
||||
*
|
||||
* This file contains pin configuration data required by different MCU
|
||||
* modules to correctly configure GPIO controller.
|
||||
*/
|
||||
|
||||
#ifndef _SILABS_EFM32PG12B_SOC_PINMAP_H_
|
||||
#define _SILABS_EFM32PG12B_SOC_PINMAP_H_
|
||||
|
||||
#include <soc.h>
|
||||
#include <em_gpio.h>
|
||||
|
||||
#ifdef CONFIG_SOC_PART_NUMBER_EFM32PG12B500F1024GL125
|
||||
#ifdef CONFIG_USART_GECKO_0
|
||||
#if (DT_USART_GECKO_0_GPIO_LOC == 0)
|
||||
#define PIN_USART0_TXD {gpioPortA, 0, gpioModePushPull, 1}
|
||||
#define PIN_USART0_RXD {gpioPortA, 1, gpioModeInput, 1}
|
||||
#elif (DT_USART_GECKO_0_GPIO_LOC == 1)
|
||||
#define PIN_USART0_TXD {gpioPortA, 1, gpioModePushPull, 1}
|
||||
#define PIN_USART0_RXD {gpioPortA, 2, gpioModeInput, 1}
|
||||
#elif (DT_USART_GECKO_0_GPIO_LOC == 2)
|
||||
#define PIN_USART0_TXD {gpioPortA, 2, gpioModePushPull, 1}
|
||||
#define PIN_USART0_RXD {gpioPortA, 3, gpioModeInput, 1}
|
||||
#elif (DT_USART_GECKO_0_GPIO_LOC == 18)
|
||||
#define PIN_USART0_TXD {gpioPortD, 10, gpioModePushPull, 1}
|
||||
#define PIN_USART0_RXD {gpioPortD, 11, gpioModeInput, 1}
|
||||
#else
|
||||
#error ("Serial Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_USART_GECKO_0 */
|
||||
|
||||
#ifdef CONFIG_USART_GECKO_1
|
||||
#if (CONFIG_USART_GECKO_1_GPIO_LOC == 0)
|
||||
#error ("Serial Driver for Gecko MCUs not implemented for this location index")
|
||||
#elif (DT_USART_GECKO_1_GPIO_LOC == 1)
|
||||
#define PIN_USART1_TXD {gpioPortA, 1, gpioModePushPull, 1}
|
||||
#define PIN_USART1_RXD {gpioPortA, 2, gpioModeInput, 1}
|
||||
#elif (DT_USART_GECKO_1_GPIO_LOC == 2)
|
||||
#define PIN_USART1_TXD {gpioPortA, 2, gpioModePushPull, 1}
|
||||
#define PIN_USART1_RXD {gpioPortA, 3, gpioModeInput, 1}
|
||||
#elif (DT_USART_GECKO_1_GPIO_LOC == 3)
|
||||
#define PIN_USART1_TXD {gpioPortA, 3, gpioModePushPull, 1}
|
||||
#define PIN_USART1_RXD {gpioPortA, 4, gpioModeInput, 1}
|
||||
#else
|
||||
#error ("Serial Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_USART_GECKO_1 */
|
||||
|
||||
#ifdef CONFIG_LEUART_GECKO
|
||||
#ifdef CONFIG_LEUART_GECKO_0
|
||||
#if (DT_LEUART_GECKO_0_LOCATION == 18)
|
||||
#define PIN_LEUART0_TXD {gpioPortD, 10, gpioModePushPull, 1}
|
||||
#define PIN_LEUART0_RXD {gpioPortD, 11, gpioModeInput, 1}
|
||||
#else
|
||||
#error ("Serial Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_LEUART_GECKO_0 */
|
||||
#endif /* CONFIG_LEUART_GECKO */
|
||||
|
||||
#ifdef CONFIG_I2C_GECKO
|
||||
#ifdef CONFIG_I2C_0
|
||||
#if (DT_I2C_GECKO_0_LOCATION == 15)
|
||||
#define PIN_I2C0_SDA {gpioPortC, 10, gpioModeWiredAnd, 1}
|
||||
#define PIN_I2C0_SCL {gpioPortC, 11, gpioModeWiredAnd, 1}
|
||||
#else
|
||||
#error ("I2C Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_I2C_0 */
|
||||
|
||||
#ifdef CONFIG_I2C_1
|
||||
#if (DT_I2C_GECKO_1_LOCATION == 6)
|
||||
#define PIN_I2C1_SDA {gpioPortB, 6, gpioModeWiredAnd, 1}
|
||||
#define PIN_I2C1_SCL {gpioPortB, 7, gpioModeWiredAnd, 1}
|
||||
#else
|
||||
#error ("I2C Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_I2C_1 */
|
||||
#endif /* CONFIG_I2C_GECKO */
|
||||
|
||||
#else
|
||||
#error ("Pinmap not available for this for Pearl Gecko MCU")
|
||||
#endif /* SOC_PART_NUMBER_EFM32PG12B500F1024GL125*/
|
||||
|
||||
#endif /* _SILABS_EFM32PG12B_SOC_PINMAP_H_ */
|
||||
Loading…
Add table
Add a link
Reference in a new issue