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dts: nordic: move flash/sram under SoC Node

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Move flash-controller and SRAM node definitions under SoC node.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Kumar Gala 2019-02-13 10:24:23 -06:00 • committed by Kumar Gala
commit 233149eec5
7 changed files with 123 additions and 118 deletions
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45
dts/arm/nordic/nrf51822.dtsi
View file

@ -17,28 +17,6 @@
};
};
flash-controller@4001E000 {
compatible = "nordic,nrf51-flash-controller";
reg = <0x4001E000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = <1024>;
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
i2c-0 = &i2c0;
i2c-1 = &i2c1;
@ -58,6 +36,29 @@
};
soc {
flash-controller@4001e000 {
compatible = "nordic,nrf51-flash-controller";
reg = <0x4001e000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = <1024>;
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
adc: adc@40007000 {
compatible = "nordic,nrf-adc";
reg = <0x40007000 0x1000>;

43
dts/arm/nordic/nrf52810.dtsi
View file

@ -17,27 +17,6 @@
};
};
flash-controller@4001E000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001E000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
i2c-0 = &i2c0;
spi-0 = &spi0;
@ -56,6 +35,28 @@
};
soc {
flash-controller@4001e000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001e000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
adc: adc@40007000 {
compatible = "nordic,nrf-saadc";
reg = <0x40007000 0x1000>;

43
dts/arm/nordic/nrf52811.dtsi
View file

@ -20,27 +20,6 @@
};
};
flash-controller@4001E000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001E000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
i2c-0 = &i2c0;
spi-0 = &spi0;
@ -60,6 +39,28 @@
};
soc {
flash-controller@4001e000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001e000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
adc: adc@40007000 {
compatible = "nordic,nrf-saadc";
reg = <0x40007000 0x1000>;

45
dts/arm/nordic/nrf52832.dtsi
View file

@ -17,28 +17,6 @@
};
};
flash-controller@4001E000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001E000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = <4096>;
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
i2c-0 = &i2c0;
i2c-1 = &i2c1;
@ -65,6 +43,29 @@
};
soc {
flash-controller@4001e000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001e000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = <4096>;
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
adc: adc@40007000 {
compatible = "nordic,nrf-saadc";
reg = <0x40007000 0x1000>;

45
dts/arm/nordic/nrf52840.dtsi
View file

@ -17,28 +17,6 @@
};
};
flash-controller@4001E000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001E000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = <4096>;
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
i2c-0 = &i2c0;
i2c-1 = &i2c1;
@ -72,6 +50,29 @@
};
soc {
flash-controller@4001e000 {
compatible = "nordic,nrf52-flash-controller";
reg = <0x4001e000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
label="NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = <4096>;
write-block-size = <4>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
adc: adc@40007000 {
compatible = "nordic,nrf-saadc";
reg = <0x40007000 0x1000>;

10
dts/arm/nordic/nrf9160.dtsi
View file

@ -20,11 +20,6 @@
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
flash-controller = &flash_controller;
ficr = &ficr;
@ -60,6 +55,11 @@
};
soc {
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
peripheral@50000000 {
#address-cells = <1>;
#size-cells = <1>;

10
dts/arm/nordic/nrf9160ns.dtsi
View file

@ -20,11 +20,6 @@
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
aliases {
flash-controller = &flash_controller;
rtc-0 = &rtc0;
@ -58,6 +53,11 @@
};
soc {
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
peripheral@40000000 {
#address-cells = <1>;
#size-cells = <1>;