drivers: flash_gecko: Add flash driver for SiLabs Gecko SoCs
Tested with SLWSTK6061A / BRD4250B wireless starter kit. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit is contained in:
parent
3a1f4650f1
commit
d9e2171aa9
26 changed files with 378 additions and 36 deletions
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@ -52,6 +52,8 @@ The efm32hg_slstk3400 board configuration supports the following hardware featur
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | flash memory |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| USART | on-chip | serial port-polling; |
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@ -50,6 +50,8 @@ The efm32wg_stk3800oard configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | flash memory |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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@ -60,6 +60,8 @@ The efr32_slwstk6061a board configuration supports the following hardware featur
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | flash memory |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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@ -63,6 +63,8 @@ The efr32mg_sltb004a board configuration supports the following hardware feature
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | flash memory |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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@ -8,6 +8,7 @@ zephyr_library_sources_ifdef(CONFIG_FLASH_PAGE_LAYOUT flash_page_layout.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE flash_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_SAM0 flash_sam0.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_NIOS2_QSPI soc_flash_nios2_qspi.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_GECKO flash_gecko.c)
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if(CONFIG_SOC_SERIES_STM32F0X)
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zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_STM32
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@ -85,6 +85,8 @@ config SOC_FLASH_NIOS2_QSPI_DEV_NAME
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help
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Specify the device name for the QSPI flash driver.
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source "drivers/flash/Kconfig.gecko"
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source "drivers/flash/Kconfig.qmsi"
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source "drivers/flash/Kconfig.stm32"
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16
drivers/flash/Kconfig.gecko
Normal file
16
drivers/flash/Kconfig.gecko
Normal file
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@ -0,0 +1,16 @@
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# Kconfig - Silicon Labs Gecko flash driver config
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#
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# Copyright (c) 2018, Piotr Mienkowski
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#
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FLASH_GECKO
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bool "Silicon Labs Gecko flash driver"
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depends on FLASH && SOC_FAMILY_EXX32
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select FLASH_HAS_DRIVER_ENABLED
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help
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Enable Silicon Labs Gecko series internal flash driver.
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if SOC_FLASH_GECKO
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endif # SOC_FLASH_GECKO
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194
drivers/flash/flash_gecko.c
Normal file
194
drivers/flash/flash_gecko.c
Normal file
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@ -0,0 +1,194 @@
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/*
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* Copyright (c) 2018, Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <string.h>
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#include <errno.h>
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#include <kernel.h>
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#include <device.h>
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#include <em_msc.h>
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#include <flash.h>
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#include <soc.h>
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#define LOG_LEVEL CONFIG_FLASH_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(flash_gecko);
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struct flash_gecko_data {
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struct k_sem mutex;
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};
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#define DEV_NAME(dev) ((dev)->config->name)
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#define DEV_DATA(dev) \
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((struct flash_gecko_data *const)(dev)->driver_data)
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static bool write_range_is_valid(off_t offset, u32_t size);
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static bool read_range_is_valid(off_t offset, u32_t size);
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static int erase_flash_block(off_t offset, size_t size);
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static int flash_gecko_read(struct device *dev, off_t offset, void *data,
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size_t size)
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{
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if (!read_range_is_valid(offset, size)) {
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return -EINVAL;
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}
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if (!size) {
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return 0;
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}
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memcpy(data, (u8_t *)CONFIG_FLASH_BASE_ADDRESS + offset, size);
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return 0;
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}
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static int flash_gecko_write(struct device *dev, off_t offset,
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const void *data, size_t size)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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MSC_Status_TypeDef msc_ret;
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void *address;
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int ret = 0;
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if (!write_range_is_valid(offset, size)) {
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return -EINVAL;
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}
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if (!size) {
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return 0;
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}
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k_sem_take(&dev_data->mutex, K_FOREVER);
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address = (u8_t *)CONFIG_FLASH_BASE_ADDRESS + offset;
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msc_ret = MSC_WriteWord(address, data, size);
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if (msc_ret < 0) {
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ret = -EIO;
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}
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k_sem_give(&dev_data->mutex);
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return ret;
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}
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static int flash_gecko_erase(struct device *dev, off_t offset, size_t size)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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int ret;
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if (!read_range_is_valid(offset, size)) {
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return -EINVAL;
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}
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if ((offset % FLASH_PAGE_SIZE) != 0) {
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LOG_ERR("offset %x: not on a page boundary", offset);
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return -EINVAL;
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}
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if ((size % FLASH_PAGE_SIZE) != 0) {
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LOG_ERR("size %x: not multiple of a page size", size);
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return -EINVAL;
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}
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if (!size) {
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return 0;
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}
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k_sem_take(&dev_data->mutex, K_FOREVER);
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ret = erase_flash_block(offset, size);
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k_sem_give(&dev_data->mutex);
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return ret;
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}
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static int flash_gecko_write_protection(struct device *dev, bool enable)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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int ret = 0;
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k_sem_take(&dev_data->mutex, K_FOREVER);
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if (enable) {
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/* Lock the MSC module. */
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MSC->LOCK = 0;
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} else {
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/* Unlock the MSC module. */
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MSC->LOCK = MSC_UNLOCK_CODE;
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}
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k_sem_give(&dev_data->mutex);
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return ret;
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}
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/* Note:
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* - A flash address to write to must be aligned to words.
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* - Number of bytes to write must be divisible by 4.
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*/
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static bool write_range_is_valid(off_t offset, u32_t size)
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{
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return read_range_is_valid(offset, size)
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&& (offset % sizeof(u32_t) == 0)
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&& (size % 4 == 0);
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}
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static bool read_range_is_valid(off_t offset, u32_t size)
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{
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return (offset + size) <= (CONFIG_FLASH_SIZE * 1024);
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}
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static int erase_flash_block(off_t offset, size_t size)
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{
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MSC_Status_TypeDef msc_ret;
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void *address;
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int ret = 0;
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for (off_t tmp = offset; tmp < offset + size; tmp += FLASH_PAGE_SIZE) {
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address = (u8_t *)CONFIG_FLASH_BASE_ADDRESS + tmp;
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msc_ret = MSC_ErasePage(address);
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if (msc_ret < 0) {
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ret = -EIO;
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break;
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}
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}
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return ret;
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}
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static int flash_gecko_init(struct device *dev)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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k_sem_init(&dev_data->mutex, 1, 1);
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MSC_Init();
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/* Lock the MSC module. */
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MSC->LOCK = 0;
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LOG_INF("Device %s initialized", DEV_NAME(dev));
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return 0;
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}
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static const struct flash_driver_api flash_gecko_driver_api = {
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.read = flash_gecko_read,
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.write = flash_gecko_write,
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.erase = flash_gecko_erase,
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.write_protection = flash_gecko_write_protection,
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/* FLASH_WRITE_BLOCK_SIZE is extracted from device tree as flash node
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* property 'write-block-size'.
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*/
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.write_block_size = FLASH_WRITE_BLOCK_SIZE,
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};
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static struct flash_gecko_data flash_gecko_0_data;
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DEVICE_AND_API_INIT(flash_gecko_0, FLASH_DEV_NAME,
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flash_gecko_init, &flash_gecko_0_data, NULL, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &flash_gecko_driver_api);
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@ -12,17 +12,28 @@
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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flash-controller@400c0000 {
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compatible = "silabs,gecko-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x400c0000 0x5c>;
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interrupts = <15 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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write-block-size = <4>;
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};
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};
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usart0: usart@4000c000 { /* USART0 */
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compatible = "silabs,gecko-usart";
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reg = <0x4000c000 0x400>;
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@ -8,11 +8,15 @@
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#include <silabs/efm32hg.dtsi>
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/ {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(64)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(8)>;
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};
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soc {
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flash-controller@400c0000 {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(64)>;
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};
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};
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};
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};
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@ -12,17 +12,28 @@
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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flash-controller@400c0000 {
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compatible = "silabs,gecko-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x400c0000 0x78>;
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interrupts = <35 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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write-block-size = <4>;
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};
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};
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usart0: usart@4000c000 { /* USART0 */
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compatible = "silabs,gecko-usart";
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reg = <0x4000c000 0x400>;
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@ -8,11 +8,15 @@
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#include <silabs/efm32wg.dtsi>
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/ {
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flash@0 {
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reg = <0 DT_SIZE_K(256)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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soc {
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flash-controller@400c0000 {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(256)>;
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};
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};
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};
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};
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@ -12,17 +12,28 @@
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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flash-controller@400e0000 {
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compatible = "silabs,gecko-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x400e0000 0x78>;
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interrupts = <24 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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write-block-size = <4>;
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};
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};
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usart0: usart@40010000 { /* USART0 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010000 0x400>;
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@ -8,11 +8,15 @@
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#include <silabs/efr32fg1p.dtsi>
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/ {
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flash@0 {
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reg = <0 DT_SIZE_K(256)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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soc {
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flash-controller@400e0000 {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(256)>;
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};
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};
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};
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};
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@ -13,17 +13,28 @@
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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flash-controller@400e0000 {
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compatible = "silabs,gecko-flash-controller";
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label = "FLASH_CTRL";
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reg = <0x400e0000 0x104>;
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interrupts = <25 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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write-block-size = <4>;
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};
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};
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usart0: usart@40010000 { /* USART0 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010000 0x400>;
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@ -8,11 +8,15 @@
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#include <silabs/efr32mg.dtsi>
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/ {
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flash@0 {
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reg = <0 DT_SIZE_K(1024)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(256)>;
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};
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soc {
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flash-controller@400e0000 {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(1024)>;
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};
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};
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};
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};
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@ -0,0 +1,20 @@
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#
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# Copyright (c) 2018, Piotr Mienkowski
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: Silicon Labs Gecko Flash Controller
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version: 0.1
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description: >
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This binding gives a base representation of the Silicon Labs Gecko Flash Controller
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inherits:
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!include flash-controller.yaml
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properties:
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compatible:
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constraint: "silabs,gecko-flash-controller"
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...
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@ -29,6 +29,7 @@ zephyr_sources_ifdef(CONFIG_GPIO_GECKO emlib/src/em_gpio.c)
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|||
zephyr_sources_ifdef(CONFIG_UART_GECKO emlib/src/em_usart.c)
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||||
zephyr_sources_ifdef(CONFIG_LEUART_GECKO emlib/src/em_leuart.c)
|
||||
zephyr_sources_ifdef(CONFIG_I2C_GECKO emlib/src/em_i2c.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_FLASH_GECKO emlib/src/em_msc.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFM32WG Device/SiliconLabs/EFM32WG/Source/system_efm32wg.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFR32FG1P Device/SiliconLabs/EFR32FG1P/Source/system_efr32fg1p.c)
|
||||
zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFM32HG Device/SiliconLabs/EFM32HG/Source/system_efm32hg.c)
|
||||
|
|
|
@ -29,4 +29,11 @@ config UART_GECKO
|
|||
|
||||
endif # SERIAL
|
||||
|
||||
if FLASH
|
||||
|
||||
config SOC_FLASH_GECKO
|
||||
def_bool y
|
||||
|
||||
endif # FLASH
|
||||
|
||||
endif # SOC_EFM32HG
|
||||
|
|
|
@ -8,6 +8,9 @@
|
|||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400C0000_BASE_ADDRESS
|
||||
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400C0000_LABEL
|
||||
|
||||
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_4000C000_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_4000C000_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_4000C000_IRQ_0
|
||||
|
|
|
@ -29,4 +29,11 @@ config UART_GECKO
|
|||
|
||||
endif # SERIAL
|
||||
|
||||
if FLASH
|
||||
|
||||
config SOC_FLASH_GECKO
|
||||
def_bool y
|
||||
|
||||
endif # FLASH
|
||||
|
||||
endif # SOC_EFM32
|
||||
|
|
|
@ -8,6 +8,9 @@
|
|||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400C0000_BASE_ADDRESS
|
||||
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400C0000_LABEL
|
||||
|
||||
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_4000C000_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_4000C000_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_4000C000_IRQ_0
|
||||
|
|
|
@ -29,4 +29,11 @@ config UART_GECKO
|
|||
|
||||
endif # SERIAL
|
||||
|
||||
if FLASH
|
||||
|
||||
config SOC_FLASH_GECKO
|
||||
def_bool y
|
||||
|
||||
endif # FLASH
|
||||
|
||||
endif # SOC_EFR32FG1P
|
||||
|
|
|
@ -8,6 +8,9 @@
|
|||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
|
||||
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
|
||||
|
||||
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_40010000_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_40010000_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_40010000_IRQ_0
|
||||
|
|
|
@ -39,4 +39,11 @@ config I2C_GECKO
|
|||
|
||||
endif # I2C
|
||||
|
||||
if FLASH
|
||||
|
||||
config SOC_FLASH_GECKO
|
||||
def_bool y
|
||||
|
||||
endif # FLASH
|
||||
|
||||
endif # SOC_EFR32MG12P
|
||||
|
|
|
@ -8,6 +8,9 @@
|
|||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
|
||||
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
|
||||
|
||||
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_40010000_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_40010000_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_40010000_IRQ_0
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue