drivers: boards: Merge HAS_DTS_SPI_PINS with HAS_DTS_SPI
Every board that uses dts-enabled spi drivers has a board-level dts, so there is no need to have separate configs HAS_DTS_SPI_PINS and HAS_DTS_SPI. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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9 changed files with 5 additions and 28 deletions
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@ -8,4 +8,3 @@
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config BOARD_96B_CARBON
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bool "96Boards Carbon (STM32F401)"
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depends on SOC_STM32F401XE
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select HAS_DTS_SPI_PINS
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@ -8,4 +8,3 @@
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config BOARD_DISCO_L475_IOT1
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bool "Discovery IoT L475 Development Board"
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depends on SOC_STM32L475XG
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select HAS_DTS_SPI_PINS
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@ -3,4 +3,3 @@ config BOARD_FRDM_K64F
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bool "Freescale FRDM-K64F"
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depends on SOC_SERIES_KINETIS_K6X
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select SOC_PART_NUMBER_MK64FN1M0VLL12
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select HAS_DTS_SPI_PINS
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@ -9,4 +9,3 @@ config BOARD_USB_KW24D512
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bool "NXP USB-KW24D512"
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depends on SOC_SERIES_KINETIS_KWX
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select SOC_PART_NUMBER_MKW24D512VHA5
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select HAS_DTS_SPI_PINS
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@ -97,7 +97,7 @@ config BT_SPI_BLUENRG
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Enable support for devices compatible with the BlueNRG Bluetooth
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Stack. Current driver supports: ST BLUENRG-MS.
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if !HAS_DTS_SPI_PINS
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if !HAS_DTS_SPI
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config BT_SPI_CHIP_SELECT_DEV_NAME
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string "Chip Select (CS) line driver name"
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@ -135,7 +135,7 @@ config BT_SPI_RESET_PIN
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help
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This option specifies the Reset line number on the SPI device
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endif # !HAS_DTS_SPI_PINS
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endif # !HAS_DTS_SPI
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config BT_SPI_MAX_CLK_FREQ
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int "Maximum clock frequency for the HCI SPI interface"
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@ -42,16 +42,12 @@ config IEEE802154_MCR20A_SPI_SLAVE
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This option sets the SPI slave number SPI controller has to switch
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to when dealing with MCR20A chip.
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endif # !HAS_DTS_SPI
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config IEEE802154_MCR20A_GPIO_SPI_CS
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bool "Manage SPI CS through a GPIO pin"
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help
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This option is useful if one needs to manage SPI CS through a GPIO
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pin to by-pass the SPI controller's CS logic.
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if !HAS_DTS_SPI_PINS
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config IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME
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string "GPIO driver's name to use to drive SPI CS through"
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depends on IEEE802154_MCR20A_GPIO_SPI_CS
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@ -67,7 +63,7 @@ config IEEE802154_MCR20A_GPIO_SPI_CS_PIN
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This option is mandatory to set which GPIO pin to use in order
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to actually emulate the SPI CS.
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endif # !HAS_DTS_SPI_PINS
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endif # !HAS_DTS_SPI
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if !HAS_DTS_GPIO
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@ -93,10 +93,6 @@ config ADXL372_SPI_BUS_FREQ
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This is the maximum supported SPI bus frequency. The chip supports a
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frequency up to 10MHz.
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endif # !HAS_DTS_SPI
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if !HAS_DTS_SPI_PINS
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config ADXL372_SPI_GPIO_CS_DRV_NAME
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string "GPIO driver's name to use to drive SPI CS through"
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default "GPIO_0"
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@ -113,7 +109,7 @@ config ADXL372_SPI_GPIO_CS_PIN
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This option is mandatory to set which GPIO pin to use in order
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to actually emulate the SPI CS.
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endif # !HAS_DTS_SPI_PINS
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endif # !HAS_DTS_SPI
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choice
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prompt "Operating mode"
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@ -83,8 +83,6 @@ config LSM6DSL_SPI_MASTER_DEV_NAME
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Specify the device name of the spi master device to which LSM6DSL is
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connected.
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endif #HAS_DTS_SPI
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config LSM6DSL_SPI_GPIO_CS
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bool "LSM6DSL SPI CS through a GPIO pin"
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depends on LSM6DSL_SPI
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@ -92,8 +90,6 @@ config LSM6DSL_SPI_GPIO_CS
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This option is useful if one needs to manage SPI CS through a GPIO
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pin to by-pass the SPI controller's CS logic.
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if !HAS_DTS_SPI_PINS
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config LSM6DSL_SPI_GPIO_CS_DRV_NAME
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string "GPIO driver's name to use to drive SPI CS through"
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default ""
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@ -110,7 +106,7 @@ config LSM6DSL_SPI_GPIO_CS_PIN
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This option is mandatory to set which GPIO pin to use in order
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to actually emulate the SPI CS.
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endif # !HAS_DTS_SPI_PINS
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endif # !HAS_DTS_SPI
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choice LSM6DSL_TRIGGER_MODE
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prompt "Trigger mode"
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@ -32,13 +32,6 @@ config HAS_DTS_SPI
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This option specifies that the target platform supports device tree
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configuration for SPI.
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config HAS_DTS_SPI_PINS
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bool
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help
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This option specifies that the target platform supports device tree
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configuration for pin definition of spi devices, like sensors or
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RF modules.
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config HAS_DTS_USB
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bool
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depends on HAS_DTS
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