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drivers: gpio: Add STM32L1X GPIO support

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Add GPIO driver support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit is contained in:
Manivannan Sadhasivam 2019-02-01 11:30:21 +05:30 • committed by Kumar Gala
commit 1eb6177e9b
6 changed files with 137 additions and 0 deletions
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1
drivers/gpio/gpio_stm32.c
View file

@ -193,6 +193,7 @@ const int gpio_stm32_enable_int(int port, int pin)
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_SOC_SERIES_STM32F7X) || \
defined(CONFIG_SOC_SERIES_STM32L1X) || \
defined(CONFIG_SOC_SERIES_STM32L4X)
struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
struct stm32_pclken pclken = {

10
drivers/gpio/gpio_stm32.h
View file

@ -91,6 +91,16 @@
#define STM32_PERIPH_GPIOD LL_IOP_GRP1_PERIPH_GPIOD
#define STM32_PERIPH_GPIOE LL_IOP_GRP1_PERIPH_GPIOE
#define STM32_PERIPH_GPIOH LL_IOP_GRP1_PERIPH_GPIOH
#elif CONFIG_SOC_SERIES_STM32L1X
#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1
#define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA
#define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB
#define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC
#define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD
#define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE
#define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF
#define STM32_PERIPH_GPIOG LL_AHB1_GRP1_PERIPH_GPIOG
#define STM32_PERIPH_GPIOH LL_AHB1_GRP1_PERIPH_GPIOH
#elif CONFIG_SOC_SERIES_STM32L4X
#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2
#define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA

55
dts/arm/st/l1/stm32l1.dtsi
View file

@ -7,6 +7,7 @@
#include <st/l1/stm32l1-pinctrl.dtsi>
#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
@ -58,6 +59,60 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40020000 0x2000>;
gpioa: gpio@40020000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000001>;
label = "GPIOA";
};
gpiob: gpio@40020400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000002>;
label = "GPIOB";
};
gpioc: gpio@40020800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000004>;
label = "GPIOC";
};
gpiod: gpio@40020c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000008>;
label = "GPIOD";
};
gpioe: gpio@40021000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000010>;
label = "GPIOE";
};
gpioh: gpio@40021400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
label = "GPIOH";
};
};
rcc: rcc@40023800 {

13
soc/arm/st_stm32/stm32l1/Kconfig.defconfig.stm32l151xb
View file

@ -15,4 +15,17 @@ config NUM_IRQS
int
default 45
if GPIO_STM32
config GPIO_STM32_PORTD
default y
config GPIO_STM32_PORTE
default y
config GPIO_STM32_PORTH
default y
endif # GPIO_STM32
endif # SOC_STM32L151XB

54
soc/arm/st_stm32/stm32l1/dts_fixup.h
View file

@ -8,6 +8,60 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_40020000_BASE_ADDRESS
#define DT_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BITS_0
#define DT_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BUS_0
#define DT_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020000_CLOCK_CONTROLLER
#define DT_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_40020000_LABEL
#define DT_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_40020000_SIZE
#define DT_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_40020000_CLOCK_BITS
#define DT_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_40020000_CLOCK_BUS
#define DT_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_40020400_BASE_ADDRESS
#define DT_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BITS_0
#define DT_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BUS_0
#define DT_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020400_CLOCK_CONTROLLER
#define DT_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_40020400_LABEL
#define DT_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_40020400_SIZE
#define DT_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_40020400_CLOCK_BITS
#define DT_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_40020400_CLOCK_BUS
#define DT_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_40020800_BASE_ADDRESS
#define DT_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BITS_0
#define DT_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BUS_0
#define DT_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020800_CLOCK_CONTROLLER
#define DT_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_40020800_LABEL
#define DT_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_40020800_SIZE
#define DT_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_40020800_CLOCK_BITS
#define DT_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_40020800_CLOCK_BUS
#define DT_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_40020C00_BASE_ADDRESS
#define DT_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BITS_0
#define DT_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BUS_0
#define DT_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER
#define DT_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_40020C00_LABEL
#define DT_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_40020C00_SIZE
#define DT_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_40020C00_CLOCK_BITS
#define DT_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_40020C00_CLOCK_BUS
#define DT_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_40021000_BASE_ADDRESS
#define DT_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BITS_0
#define DT_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BUS_0
#define DT_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021000_CLOCK_CONTROLLER
#define DT_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_40021000_LABEL
#define DT_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_40021000_SIZE
#define DT_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_40021000_CLOCK_BITS
#define DT_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_40021000_CLOCK_BUS
#define DT_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_40021400_BASE_ADDRESS
#define DT_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BITS_0
#define DT_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BUS_0
#define DT_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021400_CLOCK_CONTROLLER
#define DT_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_40021400_LABEL
#define DT_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_40021400_SIZE
#define DT_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_40021400_CLOCK_BITS
#define DT_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_40021400_CLOCK_BUS
#define DT_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40013800_BASE_ADDRESS
#define DT_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40013800_CURRENT_SPEED
#define DT_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY

4
soc/arm/st_stm32/stm32l1/soc.h
View file

@ -39,6 +39,10 @@
#include <stm32l1xx_ll_usart.h>
#endif
#ifdef CONFIG_GPIO_STM32
#include <stm32l1xx_ll_gpio.h>
#endif
#endif /* !_ASMLANGUAGE */
#endif /* _STM32L1_SOC_H_ */