michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: arm: add ARM MPU node info and fixup for ARMv8-M SoCs

Browse source 
This commit adds a DTS node for the ARM MPU peripheral in the
device tree of ARMv8-M SoCs (for the secure and the non-secure
DTS descriptions) and updates the fixup files. SoCs:
- nrf9160
- musca_a
- musca_b1

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2018-12-18 19:26:24 +01:00 • committed by Kumar Gala
commit 4b15873c13
9 changed files with 54 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

8
boards/arm/v2m_musca/v2m_musca.dts
View file

@ -28,6 +28,14 @@
device_type = "cpu";
compatible = "arm,cortex-m33";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

8
boards/arm/v2m_musca/v2m_musca_nonsecure.dts
View file

@ -28,6 +28,14 @@
device_type = "cpu";
compatible = "arm,cortex-m33";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

8
boards/arm/v2m_musca_b1/v2m_musca_b1.dts
View file

@ -28,6 +28,14 @@
device_type = "cpu";
compatible = "arm,cortex-m33";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

8
boards/arm/v2m_musca_b1/v2m_musca_b1_nonsecure.dts
View file

@ -28,6 +28,14 @@
device_type = "cpu";
compatible = "arm,cortex-m33";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

8
dts/arm/nordic/nrf9160.dtsi
View file

@ -17,6 +17,14 @@
device_type = "cpu";
compatible = "arm,cortex-m33f";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

8
dts/arm/nordic/nrf9160ns.dtsi
View file

@ -17,6 +17,14 @@
device_type = "cpu";
compatible = "arm,cortex-m33f";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

2
soc/arm/arm/musca_a/dts_fixup.h
View file

@ -8,6 +8,8 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
#if defined (CONFIG_ARM_NONSECURE_FIRMWARE)
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */

2
soc/arm/arm/musca_b1/dts_fixup.h
View file

@ -8,6 +8,8 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
#if defined (CONFIG_ARM_NONSECURE_FIRMWARE)
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */

2
soc/arm/nordic_nrf/nrf91/dts_fixup.h
View file

@ -8,6 +8,8 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
#define DT_ADC_0_NAME DT_NORDIC_NRF_SAADC_ADC_0_LABEL
#define DT_UART_0_NAME DT_NORDIC_NRF_UARTE_UART_0_LABEL