soc: arm: add ARM MPU node info and fixup for ARMv8-M SoCs
This commit adds a DTS node for the ARM MPU peripheral in the device tree of ARMv8-M SoCs (for the secure and the non-secure DTS descriptions) and updates the fixup files. SoCs: - nrf9160 - musca_a - musca_b1 Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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9 changed files with 54 additions and 0 deletions
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@ -28,6 +28,14 @@
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device_type = "cpu";
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compatible = "arm,cortex-m33";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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@ -28,6 +28,14 @@
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device_type = "cpu";
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compatible = "arm,cortex-m33";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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@ -28,6 +28,14 @@
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device_type = "cpu";
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compatible = "arm,cortex-m33";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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@ -28,6 +28,14 @@
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device_type = "cpu";
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compatible = "arm,cortex-m33";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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@ -17,6 +17,14 @@
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device_type = "cpu";
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compatible = "arm,cortex-m33f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <16>;
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};
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};
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};
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@ -17,6 +17,14 @@
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device_type = "cpu";
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compatible = "arm,cortex-m33f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <16>;
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};
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};
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};
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@ -8,6 +8,8 @@
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
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#if defined (CONFIG_ARM_NONSECURE_FIRMWARE)
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/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
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@ -8,6 +8,8 @@
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
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#if defined (CONFIG_ARM_NONSECURE_FIRMWARE)
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/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
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#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
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#define DT_ADC_0_NAME DT_NORDIC_NRF_SAADC_ADC_0_LABEL
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#define DT_UART_0_NAME DT_NORDIC_NRF_UARTE_UART_0_LABEL
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