soc: arm: exx32: Add Silabs EFR32MG12P soc files
The Silicon Labs EFR32MG12P Mighty Gecko MCU includes: * Cortex-M4F core at 40MHz * up to 1024KB of flash and 256KB of RAM * integrated Sub-GHz and/or 2.4GHz radio * multiple low power peripherals Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com> Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
This commit is contained in:
Diego Sueiro
Kumar Gala
parent
04c015b8df
commit
537798db0d
16 changed files with 645 additions and 8 deletions
157
dts/arm/silabs/efr32mg.dtsi
Normal file
157
dts/arm/silabs/efr32mg.dtsi
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@ -0,0 +1,157 @@
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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usart0: usart@40010000 { /* USART0 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010000 0x400>;
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interrupts = <12 0>, <13 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_0";
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};
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usart1: usart@40010400 { /* USART1 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010400 0x400>;
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interrupts = <20 0>, <21 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_1";
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};
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usart2: usart@40010800 { /* USART2 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010800 0x400>;
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interrupts = <40 0>, <41 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_2";
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};
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usart3: usart@40010C00 { /* USART3 */
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compatible = "silabs,gecko-usart";
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reg = <0x40010C00 0x400>;
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interrupts = <43 0>, <44 0>;
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interrupt-names = "rx", "tx";
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status = "disabled";
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label = "USART_3";
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};
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leuart0: leuart@4004A000 { /* LEUART0 */
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compatible = "silabs,gecko-leuart";
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reg = <0x4004A000 0x400>;
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interrupts = <22 0>;
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status = "disabled";
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label = "LEUART_0";
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};
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i2c0: i2c@4000C000 {
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compatible = "silabs,gecko-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4000C000 0x400>;
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interrupts = <17 0>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@4000C400 {
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compatible = "silabs,gecko-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4000C400 0x400>;
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interrupts = <42 0>;
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label = "I2C_1";
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status = "disabled";
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};
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gpio@4000a400 {
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compatible = "silabs,efr32mg-gpio";
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reg = <0x4000a400 0xc00>;
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interrupts = <9 2 17 2>;
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interrupt-names = "GPIO_EVEN", "GPIO_ODD";
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label = "GPIO";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioa: gpio@4000a000 {
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compatible = "silabs,efr32mg-gpio-port";
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reg = <0x4000a000 0x30>;
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label = "GPIO_A";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@4000a030 {
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compatible = "silabs,efr32mg-gpio-port";
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reg = <0x4000a030 0x30>;
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label = "GPIO_B";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@4000a060 {
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compatible = "silabs,efr32mg-gpio-port";
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reg = <0x4000a060 0x30>;
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label = "GPIO_C";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@4000a090 {
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compatible = "silabs,efr32mg-gpio-port";
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reg = <0x4000a090 0x30>;
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label = "GPIO_D";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@4000a0c0 {
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compatible = "silabs,efr32mg-gpio-port";
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reg = <0x4000a0c0 0x30>;
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label = "GPIO_E";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiof: gpio@4000a0f0 {
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compatible = "silabs,efr32mg-gpio-port";
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reg = <0x4000af0 0x30>;
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label = "GPIO_F";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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18
dts/arm/silabs/efr32mg12p332f1024gl125.dtsi
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18
dts/arm/silabs/efr32mg12p332f1024gl125.dtsi
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@ -0,0 +1,18 @@
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/*
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* Copyright (c) 2018 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/efr32mg.dtsi>
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/ {
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flash@0 {
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reg = <0 DT_SIZE_K(1024)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(256)>;
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};
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};
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31
dts/bindings/gpio/silabs,efr32mg12-gpio-port.yaml
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31
dts/bindings/gpio/silabs,efr32mg12-gpio-port.yaml
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@ -0,0 +1,31 @@
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---
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title: EFR32MG GPIO
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version: 0.1
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description: >
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This is a representation of the EFR32MG GPIO Port nodes
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,efr32mg-gpio-port"
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generation: define
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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"#cells":
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- pin
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- flags
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...
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34
dts/bindings/gpio/silabs,efr32mg12-gpio.yaml
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34
dts/bindings/gpio/silabs,efr32mg12-gpio.yaml
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@ -0,0 +1,34 @@
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---
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title: EFR32MG GPIO
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version: 0.1
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description: >
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This is a representation of the EFR32MG GPIO nodes
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,efr32mg-gpio"
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generation: define
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: compound
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category: required
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description: required interrupts
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generation: define
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label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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...
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40
dts/bindings/i2c/silabs,gecko-i2c.yaml
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40
dts/bindings/i2c/silabs,gecko-i2c.yaml
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#
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# Copyright (c) 2018 Diego Sueiro <diego.sueiro@gmail.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: Silabs Gecko I2C Controller
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version: 0.1
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description: >
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This is a representation of the Silabs Gecko I2C nodes
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inherits:
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!include i2c.yaml
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,gecko-i2c"
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: compound
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category: required
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description: required interrupts
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generation: define
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location:
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type: int
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category: required
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description: PIN location
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generation: define
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...
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35
dts/bindings/serial/silabs,gecko-leuart.yaml
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35
dts/bindings/serial/silabs,gecko-leuart.yaml
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---
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title: GECKO LEUART
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version: 0.1
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description: >
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This binding gives a base representation of the Gecko LEUART
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inherits:
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!include uart.yaml
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,gecko-leuart"
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reg:
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type: array
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: array
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category: required
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description: required interrupts
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generation: define
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location:
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type: int
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category: required
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description: PIN location
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generation: define
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...
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@ -22,11 +22,12 @@ zephyr_compile_definitions(
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${SILABS_GECKO_PART_NUMBER}
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)
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zephyr_sources( emlib/src/em_system.c)
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zephyr_sources_ifdef(CONFIG_HAS_CMU emlib/src/em_cmu.c)
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zephyr_sources_ifdef(CONFIG_GPIO_GECKO emlib/src/em_gpio.c)
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zephyr_sources_ifdef(CONFIG_UART_GECKO emlib/src/em_usart.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFM32WG Device/SiliconLabs/EFM32WG/Source/system_efm32wg.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFR32FG1P Device/SiliconLabs/EFR32FG1P/Source/system_efr32fg1p.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFM32HG Device/SiliconLabs/EFM32HG/Source/system_efm32hg.c)
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zephyr_sources( emlib/src/em_system.c)
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zephyr_sources_ifdef(CONFIG_HAS_CMU emlib/src/em_cmu.c)
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zephyr_sources_ifdef(CONFIG_HAS_EMU emlib/src/em_emu.c)
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zephyr_sources_ifdef(CONFIG_GPIO_GECKO emlib/src/em_gpio.c)
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zephyr_sources_ifdef(CONFIG_UART_GECKO emlib/src/em_usart.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFM32WG Device/SiliconLabs/EFM32WG/Source/system_efm32wg.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFR32FG1P Device/SiliconLabs/EFR32FG1P/Source/system_efr32fg1p.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFM32HG Device/SiliconLabs/EFM32HG/Source/system_efm32hg.c)
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zephyr_sources_ifdef(CONFIG_SOC_SERIES_EFR32MG12P Device/SiliconLabs/EFR32MG12P/Source/system_efr32mg12p.c)
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@ -17,14 +17,20 @@ source "soc/arm/silabs_exx32/*/Kconfig.soc"
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config SOC_PART_NUMBER
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string
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default SOC_PART_NUMBER_EXX32_EFM32WG if SOC_SERIES_EFM32WG
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default SOC_PART_NUMBER_EXX32_EFM32WG if SOC_SERIES_EFM32WG
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default SOC_PART_NUMBER_EXX32_EFR32FG1P if SOC_SERIES_EFR32FG1P
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default SOC_PART_NUMBER_EXX32_EFM32HG if SOC_SERIES_EFM32HG
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default SOC_PART_NUMBER_EXX32_EFR32MG12P if SOC_SERIES_EFR32MG12P
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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the default value for this string.
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config HAS_EMU
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bool
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help
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Set if the energy management unit (EMU) is present in the SoC.
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config HAS_CMU
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bool
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help
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42
soc/arm/silabs_exx32/efr32mg12p/Kconfig.defconfig.efr32mg12p
Normal file
42
soc/arm/silabs_exx32/efr32mg12p/Kconfig.defconfig.efr32mg12p
Normal file
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# Kconfig - Silicon Labs EFR32MG12P platform configuration options
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#
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# Copyright (c) 2018 Diego Sueiro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_EFR32MG12P
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config SOC
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string
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default "efr32mg12p"
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config GPIO
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def_bool y
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if GPIO
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config GPIO_GECKO
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def_bool y
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endif # GPIO
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if SERIAL
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config UART_GECKO
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def_bool y
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config LEUART_GECKO
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def_bool y
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endif # SERIAL
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if I2C
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config I2C_GECKO
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def_bool y
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endif # I2C
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endif # SOC_EFR32MG12P
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21
soc/arm/silabs_exx32/efr32mg12p/Kconfig.defconfig.series
Normal file
21
soc/arm/silabs_exx32/efr32mg12p/Kconfig.defconfig.series
Normal file
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# Kconfig - EFM32WG series configuration options
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#
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# Copyright (c) 2018 Diego Sueiro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_SERIES_EFR32MG12P
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config SOC_SERIES
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default "efr32mg12p"
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config NUM_IRQS
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int
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# must be >= the highest interrupt number used
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default 49
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gsource "soc/arm/silabs_exx32/efr32mg12p/Kconfig.defconfig.e*"
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endif # SOC_SERIES_EFR32MG12P
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16
soc/arm/silabs_exx32/efr32mg12p/Kconfig.series
Normal file
16
soc/arm/silabs_exx32/efr32mg12p/Kconfig.series
Normal file
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# Kconfig - EFR32MG12P MCU line
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#
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# Copyright (c) 2018 Diego Sueiro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_SERIES_EFR32MG12P
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bool "EFR32MG12P Series MCU"
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select CPU_CORTEX_M4
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select CPU_HAS_FPU
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select SOC_FAMILY_EXX32
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select CPU_HAS_SYSTICK
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help
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Enable support for EFR32 Mighty Gecko MCU series
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33
soc/arm/silabs_exx32/efr32mg12p/Kconfig.soc
Normal file
33
soc/arm/silabs_exx32/efr32mg12p/Kconfig.soc
Normal file
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# Kconfig - EFR32MG12P MCU line
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#
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# Copyright (c) 2018 Diego Sueiro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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choice
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prompt "EFR32 Mighty Gecko MCU Selection"
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depends on SOC_SERIES_EFR32MG12P
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config SOC_EFR32MG12P
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bool "SOC_EFR32MG12P"
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select HAS_SILABS_GECKO
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select HAS_CMU
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select HAS_EMU
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endchoice
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if SOC_SERIES_EFR32MG12P
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config SOC_PART_NUMBER_EFR32MG12P332F1024GL125
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bool
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||||
config SOC_PART_NUMBER_EXX32_EFR32MG12P
|
||||
string
|
||||
default "EFR32MG12P332F1024GL125" if SOC_PART_NUMBER_EFR32MG12P332F1024GL125
|
||||
help
|
||||
This string holds the full part number of the SoC. It is a hidden option
|
||||
that you should not set directly. The part number selection choice defines
|
||||
the default value for this string.
|
||||
|
||||
endif # SOC_SERIES_EFR32MG12P
|
||||
88
soc/arm/silabs_exx32/efr32mg12p/dts_fixup.h
Normal file
88
soc/arm/silabs_exx32/efr32mg12p/dts_fixup.h
Normal file
|
|
@ -0,0 +1,88 @@
|
|||
/* This file is a temporary workaround for mapping of the generated information
|
||||
* to the current driver definitions. This will be removed when the drivers
|
||||
* are modified to handle the generated information, or the mapping of
|
||||
* generated data matches the driver definitions.
|
||||
*/
|
||||
|
||||
/* SoC level DTS fixup file */
|
||||
|
||||
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
||||
|
||||
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_40010000_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_40010000_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_40010000_IRQ_0
|
||||
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY
|
||||
#define CONFIG_USART_GECKO_0_IRQ_TX SILABS_GECKO_USART_40010000_IRQ_1
|
||||
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY
|
||||
#define CONFIG_USART_GECKO_0_LABEL SILABS_GECKO_USART_40010000_LABEL
|
||||
#define CONFIG_USART_GECKO_0_LOCATION SILABS_GECKO_USART_40010000_LOCATION
|
||||
#define CONFIG_USART_GECKO_0_SIZE SILABS_GECKO_USART_40010000_SIZE
|
||||
|
||||
#define CONFIG_USART_GECKO_1_BASE_ADDRESS SILABS_GECKO_USART_40010400_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_1_CURRENT_SPEED SILABS_GECKO_USART_40010400_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_1_IRQ_RX SILABS_GECKO_USART_40010400_IRQ_0
|
||||
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY
|
||||
#define CONFIG_USART_GECKO_1_IRQ_TX SILABS_GECKO_USART_40010400_IRQ_1
|
||||
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY
|
||||
#define CONFIG_USART_GECKO_1_LABEL SILABS_GECKO_USART_40010400_LABEL
|
||||
#define CONFIG_USART_GECKO_1_LOCATION SILABS_GECKO_USART_40010400_LOCATION
|
||||
#define CONFIG_USART_GECKO_1_SIZE SILABS_GECKO_USART_40010400_SIZE
|
||||
|
||||
#define CONFIG_USART_GECKO_2_BASE_ADDRESS SILABS_GECKO_USART_40010800_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_2_CURRENT_SPEED SILABS_GECKO_USART_40010800_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_2_IRQ_RX SILABS_GECKO_USART_40010800_IRQ_0
|
||||
#define CONFIG_USART_GECKO_2_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010800_IRQ_0_PRIORITY
|
||||
#define CONFIG_USART_GECKO_2_IRQ_TX SILABS_GECKO_USART_40010800_IRQ_1
|
||||
#define CONFIG_USART_GECKO_2_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010800_IRQ_1_PRIORITY
|
||||
#define CONFIG_USART_GECKO_2_LABEL SILABS_GECKO_USART_40010800_LABEL
|
||||
#define CONFIG_USART_GECKO_2_LOCATION SILABS_GECKO_USART_40010800_LOCATION
|
||||
#define CONFIG_USART_GECKO_2_SIZE SILABS_GECKO_USART_40010800_SIZE
|
||||
|
||||
#define CONFIG_USART_GECKO_3_BASE_ADDRESS SILABS_GECKO_USART_40010C00_BASE_ADDRESS
|
||||
#define CONFIG_USART_GECKO_3_CURRENT_SPEED SILABS_GECKO_USART_40010C00_CURRENT_SPEED
|
||||
#define CONFIG_USART_GECKO_3_IRQ_RX SILABS_GECKO_USART_40010C00_IRQ_0
|
||||
#define CONFIG_USART_GECKO_3_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010C00_IRQ_0_PRIORITY
|
||||
#define CONFIG_USART_GECKO_3_IRQ_TX SILABS_GECKO_USART_40010C00_IRQ_1
|
||||
#define CONFIG_USART_GECKO_3_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010C00_IRQ_1_PRIORITY
|
||||
#define CONFIG_USART_GECKO_3_LABEL SILABS_GECKO_USART_40010C00_LABEL
|
||||
#define CONFIG_USART_GECKO_3_LOCATION SILABS_GECKO_USART_40010C00_LOCATION
|
||||
#define CONFIG_USART_GECKO_3_SIZE SILABS_GECKO_USART_40010C00_SIZE
|
||||
|
||||
#define CONFIG_LEUART_GECKO_0_BASE_ADDRESS SILABS_GECKO_LEUART_4004A000_BASE_ADDRESS
|
||||
#define CONFIG_LEUART_GECKO_0_CURRENT_SPEED SILABS_GECKO_LEUART_4004A000_CURRENT_SPEED
|
||||
#define CONFIG_LEUART_GECKO_0_IRQ SILABS_GECKO_LEUART_4004A000_IRQ_0
|
||||
#define CONFIG_LEUART_GECKO_0_IRQ_PRIORITY SILABS_GECKO_LEUART_4004A000_IRQ_0_PRIORITY
|
||||
#define CONFIG_LEUART_GECKO_0_LABEL SILABS_GECKO_LEUART_4004A000_LABEL
|
||||
#define CONFIG_LEUART_GECKO_0_LOCATION SILABS_GECKO_LEUART_4004A000_LOCATION
|
||||
#define CONFIG_LEUART_GECKO_0_SIZE SILABS_GECKO_LEUART_4004A000_SIZE
|
||||
|
||||
#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFR32MG_GPIO_4000A400_LABEL
|
||||
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN
|
||||
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
|
||||
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD
|
||||
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
|
||||
|
||||
#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFR32MG_GPIO_PORT_4000A000_LABEL
|
||||
#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFR32MG_GPIO_PORT_4000A030_LABEL
|
||||
#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFR32MG_GPIO_PORT_4000A060_LABEL
|
||||
#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFR32MG_GPIO_PORT_4000A090_LABEL
|
||||
#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFR32MG_GPIO_PORT_4000A0C0_LABEL
|
||||
#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFR32MG_GPIO_PORT_4000A0F0_LABEL
|
||||
|
||||
#define CONFIG_I2C_GECKO_0_BASE_ADDRESS SILABS_GECKO_I2C_4000C000_BASE_ADDRESS
|
||||
#define CONFIG_I2C_GECKO_0_CLOCK_FREQUENCY SILABS_GECKO_I2C_4000C000_CLOCK_FREQUENCY
|
||||
#define CONFIG_I2C_GECKO_0_IRQ SILABS_GECKO_I2C_4000C000_IRQ_0
|
||||
#define CONFIG_I2C_GECKO_0_IRQ_PRIORITY SILABS_GECKO_I2C_4000C000_IRQ_0_PRIORITY
|
||||
#define CONFIG_I2C_GECKO_0_LABEL SILABS_GECKO_I2C_4000C000_LABEL
|
||||
#define CONFIG_I2C_GECKO_0_LOCATION SILABS_GECKO_I2C_4000C000_LOCATION
|
||||
#define CONFIG_I2C_GECKO_0_SIZE SILABS_GECKO_I2C_4000C000_SIZE
|
||||
|
||||
#define CONFIG_I2C_GECKO_1_BASE_ADDRESS SILABS_GECKO_I2C_4000C400_BASE_ADDRESS
|
||||
#define CONFIG_I2C_GECKO_1_CLOCK_FREQUENCY SILABS_GECKO_I2C_4000C400_CLOCK_FREQUENCY
|
||||
#define CONFIG_I2C_GECKO_1_IRQ SILABS_GECKO_I2C_4000C400_IRQ_0
|
||||
#define CONFIG_I2C_GECKO_1_IRQ_PRIORITY SILABS_GECKO_I2C_4000C400_IRQ_0_PRIORITY
|
||||
#define CONFIG_I2C_GECKO_1_LABEL SILABS_GECKO_I2C_4000C400_LABEL
|
||||
#define CONFIG_I2C_GECKO_1_LOCATION SILABS_GECKO_I2C_4000C400_LOCATION
|
||||
#define CONFIG_I2C_GECKO_1_SIZE SILABS_GECKO_I2C_4000C400_SIZE
|
||||
|
||||
/* End of SoC Level DTS fixup file */
|
||||
16
soc/arm/silabs_exx32/efr32mg12p/linker.ld
Normal file
16
soc/arm/silabs_exx32/efr32mg12p/linker.ld
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Diego Sueiro
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Linker command/script file
|
||||
*
|
||||
* This is the linker script for both standard images.
|
||||
*/
|
||||
|
||||
#include <autoconf.h>
|
||||
|
||||
#include <arch/arm/cortex_m/scripts/linker.ld>
|
||||
36
soc/arm/silabs_exx32/efr32mg12p/soc.h
Normal file
36
soc/arm/silabs_exx32/efr32mg12p/soc.h
Normal file
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Christian Taedcke, Diego Sueiro
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Board configuration macros for the efm32wg soc
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SOC__H_
|
||||
#define _SOC__H_
|
||||
|
||||
#include <misc/util.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef _ASMLANGUAGE
|
||||
|
||||
#include <em_common.h>
|
||||
#include <device.h>
|
||||
|
||||
#include "soc_pinmap.h"
|
||||
#include "../common/soc_gpio.h"
|
||||
|
||||
#endif /* !_ASMLANGUAGE */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SOC__H_ */
|
||||
63
soc/arm/silabs_exx32/efr32mg12p/soc_pinmap.h
Normal file
63
soc/arm/silabs_exx32/efr32mg12p/soc_pinmap.h
Normal file
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Christian Taedcke, Diego Sueiro
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/** @file
|
||||
* @brief Silabs EFR32MG MCU pin definitions.
|
||||
*
|
||||
* This file contains pin configuration data required by different MCU
|
||||
* modules to correctly configure GPIO controller.
|
||||
*/
|
||||
|
||||
#ifndef _SOC_PINMAP_H_
|
||||
#define _SOC_PINMAP_H_
|
||||
|
||||
#include <em_gpio.h>
|
||||
|
||||
#ifdef CONFIG_UART_GECKO
|
||||
#ifdef CONFIG_USART_GECKO_0
|
||||
#if (CONFIG_USART_GECKO_0_LOCATION == 0)
|
||||
#define PIN_USART0_TXD {gpioPortA, 0, gpioModePushPull, 1}
|
||||
#define PIN_USART0_RXD {gpioPortA, 1, gpioModeInput, 0}
|
||||
#else
|
||||
#error ("Serial Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_USART_GECKO_0 */
|
||||
#endif /* CONFIG_UART_GECKO */
|
||||
|
||||
#ifdef CONFIG_LEUART_GECKO
|
||||
#ifdef CONFIG_LEUART_GECKO_0
|
||||
#if (CONFIG_LEUART_GECKO_0_LOCATION == 27)
|
||||
#define PIN_LEUART0_TXD {gpioPortF, 3, gpioModePushPull, 1}
|
||||
#define PIN_LEUART0_RXD {gpioPortF, 4, gpioModeInput, 1}
|
||||
#else
|
||||
#error ("Serial Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_LEUART_GECKO_0 */
|
||||
#endif /* CONFIG_LEUART_GECKO */
|
||||
|
||||
#ifdef CONFIG_I2C_GECKO
|
||||
#ifdef CONFIG_I2C_0
|
||||
#if (CONFIG_I2C_GECKO_0_LOCATION == 15)
|
||||
#define PIN_I2C0_SDA {gpioPortC, 10, gpioModeWiredAnd, 1}
|
||||
#define PIN_I2C0_SCL {gpioPortC, 11, gpioModeWiredAnd, 1}
|
||||
#else
|
||||
#error ("I2C Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_I2C_0 */
|
||||
|
||||
#ifdef CONFIG_I2C_1
|
||||
#if (CONFIG_I2C_GECKO_1_LOCATION == 17)
|
||||
#define PIN_I2C1_SDA {gpioPortC, 4, gpioModeWiredAnd, 1}
|
||||
#define PIN_I2C1_SCL {gpioPortC, 5, gpioModeWiredAnd, 1}
|
||||
#else
|
||||
#error ("I2C Driver for Gecko MCUs not implemented for this location index")
|
||||
#endif
|
||||
#endif /* CONFIG_I2C_1 */
|
||||
#endif /* CONFIG_I2C_GECKO */
|
||||
|
||||
#else
|
||||
#error ("Pinmap not available for this Mighty Gecko MCU")
|
||||
|
||||
#endif /* _SOC_PINMAP_H_ */
|
||||
Loading…
Add table
Add a link
Reference in a new issue