arm: exx32: Add Silabs EFM32HG soc files
The Silicon Labs EFM32 Happy Gecko MCU includes: * Cortex-M0+ core at 24MHz * Up to 64KB of flash and 8KB of RAM * Full speed (12 MHz) USB 2.0 Device * Multiple low power peripherals Signed-off-by: Marcio Montenegro <mtuxpe@gmail.com> Signed-off-by: Christian Taedcke <hacking@taedcke.com>
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106
dts/arm/silabs/efm32hg.dtsi
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106
dts/arm/silabs/efm32hg.dtsi
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@ -0,0 +1,106 @@
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#include <arm/armv6-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-m0+";
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reg = <0>;
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};
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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};
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soc {
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uart0: uart@4000c000 { /* USART0 */
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compatible = "silabs,efm32-usart";
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reg = <0x4000c000 0x400>;
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interrupts = <17 0 18 0>;
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status = "disabled";
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label = "UART_0";
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};
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uart1: uart@4000c400 { /* USART1 */
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compatible = "silabs,efm32-usart";
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reg = <0x4000c400 0x400>;
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interrupts = <8 0 9 0>;
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status = "disabled";
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label = "UART_1";
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};
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gpio@40006100 {
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compatible = "silabs,efm32-gpio";
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reg = <0x40006100 0xf00>;
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interrupts = <1 0 6 0>;
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interrupt-names = "GPIO_EVEN", "GPIO_ODD";
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label = "GPIO";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioa: gpio@40006000 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006000 0x24>;
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label = "GPIO_A";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@40006024 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006024 0x24>;
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label = "GPIO_B";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@40006048 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006048 0x24>;
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label = "GPIO_C";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@4000606c {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000606c 0x24>;
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label = "GPIO_D";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@40006090 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006090 0x24>;
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label = "GPIO_E";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiof: gpio@400060b4 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x400060b4 0x24>;
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label = "GPIO_F";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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18
dts/arm/silabs/efm32hg322f64.dtsi
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18
dts/arm/silabs/efm32hg322f64.dtsi
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/*
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* Copyright (c) 2018 Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/efm32hg.dtsi>
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/ {
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flash0: flash@0 {
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reg = <0 DT_SIZE_K(64)>;
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(8)>;
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};
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};
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@ -19,6 +19,7 @@ config SOC_PART_NUMBER
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string
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default SOC_PART_NUMBER_EXX32_EFM32WG if SOC_SERIES_EFM32WG
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default SOC_PART_NUMBER_EXX32_EFR32FG1P if SOC_SERIES_EFR32FG1P
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default SOC_PART_NUMBER_EXX32_EFM32HG if SOC_SERIES_EFM32HG
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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32
soc/arm/silabs_exx32/efm32hg/Kconfig.defconfig.efm32hg
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32
soc/arm/silabs_exx32/efm32hg/Kconfig.defconfig.efm32hg
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# Kconfig - Silicon Labs EFM32HG-SLSTK3400A platform configuration options
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#
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# Copyright (c) 2018 Marcio Montenegro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_EFM32HG
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config SOC
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string
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default "efm32hg"
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config GPIO
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def_bool y
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if GPIO
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config GPIO_GECKO
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def_bool y
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endif # GPIO
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if SERIAL
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config UART_GECKO
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def_bool y
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endif # SERIAL
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endif # SOC_EFM32HG
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21
soc/arm/silabs_exx32/efm32hg/Kconfig.defconfig.series
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21
soc/arm/silabs_exx32/efm32hg/Kconfig.defconfig.series
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# Kconfig - EFM32HG series configuration options
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#
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# Copyright (c) 2018 Christian Taedcke
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# Copyright (c) 2018 Marcio Montenegro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if SOC_SERIES_EFM32HG
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config SOC_SERIES
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default "efm32hg"
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config NUM_IRQS
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int
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# must be >= the highest interrupt number used
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default 20
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source "soc/arm/silabs_exx32/efm32hg/Kconfig.defconfig.e*"
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endif # SOC_SERIES_EFM32HG
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16
soc/arm/silabs_exx32/efm32hg/Kconfig.series
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soc/arm/silabs_exx32/efm32hg/Kconfig.series
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# Kconfig - EFM32HG MCU line
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#
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# Copyright (c) 2018 Marcio Montenegro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config SOC_SERIES_EFM32HG
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bool "EFM32HG Series MCU"
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select CPU_CORTEX_M
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select CPU_CORTEX_M0PLUS
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select SOC_FAMILY_EXX32
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select SYS_POWER_LOW_POWER_STATE_SUPPORTED
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select CPU_HAS_SYSTICK
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help
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Enable support for EFM32 Happy Gecko MCU series
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32
soc/arm/silabs_exx32/efm32hg/Kconfig.soc
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32
soc/arm/silabs_exx32/efm32hg/Kconfig.soc
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# Kconfig - EFM32HG MCU line
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#
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# Copyright (c) 2018 Marcio Montenegro
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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choice
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prompt "EFM32 Happy Gecko MCU Selection"
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depends on SOC_SERIES_EFM32HG
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config SOC_EFM32HG
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bool "SOC_EFM32HG"
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select HAS_SILABS_GECKO
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select HAS_CMU
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endchoice
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if SOC_SERIES_EFM32HG
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config SOC_PART_NUMBER_EFM32HG322F64
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bool
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config SOC_PART_NUMBER_EXX32_EFM32HG
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string
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default "EFM32HG322F64" if SOC_PART_NUMBER_EFM32HG322F64
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help
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This string holds the full part number of the SoC. It is a hidden option
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that you should not set directly. The part number selection choice defines
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the default value for this string.
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endif # SOC_SERIES_EFM32HG
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28
soc/arm/silabs_exx32/efm32hg/dts_fixup.h
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28
soc/arm/silabs_exx32/efm32hg/dts_fixup.h
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/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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/* SoC level DTS fixup file */
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_GECKO_0_NAME SILABS_EFM32_USART_4000C000_LABEL
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#define CONFIG_UART_GECKO_0_BAUD_RATE SILABS_EFM32_USART_4000C000_CURRENT_SPEED
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#define CONFIG_UART_GECKO_0_IRQ_PRI SILABS_EFM32_USART_4000C000_IRQ_0_PRIORITY
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#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFM32_GPIO_40006100_LABEL
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#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN
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#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN_PRIORITY
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#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD
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#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD_PRIORITY
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#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFM32_GPIO_PORT_40006000_LABEL
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#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFM32_GPIO_PORT_40006024_LABEL
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#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFM32_GPIO_PORT_40006048_LABEL
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#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFM32_GPIO_PORT_4000606C_LABEL
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#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFM32_GPIO_PORT_40006090_LABEL
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#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFM32_GPIO_PORT_400060B4_LABEL
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/* End of SoC Level DTS fixup file */
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16
soc/arm/silabs_exx32/efm32hg/linker.ld
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soc/arm/silabs_exx32/efm32hg/linker.ld
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/*
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* Copyright (c) 2018 Marcio Montenegro
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* This is the linker script for both standard images.
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*/
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#include <autoconf.h>
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#include <arch/arm/cortex_m/scripts/linker.ld>
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36
soc/arm/silabs_exx32/efm32hg/soc.h
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36
soc/arm/silabs_exx32/efm32hg/soc.h
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/*
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* Copyright (c) 2017 Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Board configuration macros for the efm32hg soc
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*
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*/
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#ifndef _SOC__H_
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#define _SOC__H_
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#include <misc/util.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _ASMLANGUAGE
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#include <em_common.h>
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#include <device.h>
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#include "soc_pinmap.h"
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#include "../common/soc_gpio.h"
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#endif /* !_ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC__H_ */
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61
soc/arm/silabs_exx32/efm32hg/soc_pinmap.h
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61
soc/arm/silabs_exx32/efm32hg/soc_pinmap.h
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/*
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* Copyright (c) 2018 Marcio Montenegro
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief Silabs EFM32HG MCU pin definitions.
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*
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* This file contains pin configuration data required by different MCU
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* modules to correctly configure GPIO controller.
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*/
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#ifndef _SILABS_EFM32HG_SOC_PINMAP_H_
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#define _SILABS_EFM32HG_SOC_PINMAP_H_
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#include <soc.h>
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#include <em_gpio.h>
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#ifdef CONFIG_SOC_PART_NUMBER_EFM32HG322F64
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#ifdef CONFIG_USART_GECKO_0
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#if (CONFIG_USART_GECKO_0_GPIO_LOC == 0)
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#define PIN_USART0_TXD {gpioPortE, 10, gpioModePushPull, 1}
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#define PIN_USART0_RXD {gpioPortE, 11, gpioModeInput, 1}
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#elif (CONFIG_USART_GECKO_0_GPIO_LOC == 3)
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#define PIN_USART0_TXD {gpioPortE, 13, gpioModePushPull, 1}
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#define PIN_USART0_RXD {gpioPortE, 12, gpioModeInput, 1}
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#elif (CONFIG_USART_GECKO_0_GPIO_LOC == 4)
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#define PIN_USART0_TXD {gpioPortB, 7, gpioModePushPull, 1}
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#define PIN_USART0_RXD {gpioPortB, 8, gpioModeInput, 1}
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#elif (CONFIG_USART_GECKO_0_GPIO_LOC == 5) || \
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(CONFIG_USART_GECKO_0_GPIO_LOC == 6)
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#define PIN_USART0_TXD {gpioPortC, 0, gpioModePushPull, 1}
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#define PIN_USART0_RXD {gpioPortC, 1, gpioModeInput, 1}
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#else
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#error ("Serial Driver for Gecko MCUs not implemented for this location index")
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#endif
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#endif /* CONFIG_USART_GECKO_0 */
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#ifdef CONFIG_USART_GECKO_1
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#if (CONFIG_USART_GECKO_1_GPIO_LOC == 0)
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#define PIN_USART1_TXD {gpioPortC, 0, gpioModePushPull, 1}
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#define PIN_USART1_RXD {gpioPortC, 1, gpioModeInput, 1}
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#elif (CONFIG_USART_GECKO_1_GPIO_LOC == 2) || \
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(CONFIG_USART_GECKO_1_GPIO_LOC == 3)
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#define PIN_USART1_TXD {gpioPortD, 7, gpioModePushPull, 1}
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#define PIN_USART1_RXD {gpioPortD, 6, gpioModeInput, 1}
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#elif (CONFIG_USART_GECKO_1_GPIO_LOC == 4)
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#define PIN_USART1_TXD {gpioPortF, 2, gpioModePushPull, 1}
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#define PIN_USART1_RXD {gpioPortA, 0, gpioModeInput, 1}
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#elif (CONFIG_USART_GECKO_1_GPIO_LOC == 5)
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#define PIN_USART1_TXD {gpioPortC, 1, gpioModePushPull, 1}
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#define PIN_USART1_RXD {gpioPortC, 2, gpioModeInput, 1}
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#else
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#error ("Serial Driver for Gecko MCUs not implemented for this location index")
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#endif
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#endif /* CONFIG_USART_GECKO_1 */
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#else
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#error ("Pinmap not available for this for Happy Gecko MCU")
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#endif /* SOC_PART_NUMBER_EFM32HG322F64*/
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#endif /* _SILABS_EFM32HG_SOC_PINMAP_H_ */
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