gpio: silabs gecko: Add device tree support for GPIO
Convert gpio_gecko driver over to using device tree. Added binding files, updates to dts for various SoCs that use gpio_gecko. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
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52b729a6a4
commit
c3076d6eb2
10 changed files with 285 additions and 40 deletions
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@ -8,81 +8,44 @@
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menuconfig GPIO_GECKO
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bool "Gecko GPIO driver"
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depends on GPIO && HAS_SILABS_GECKO
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select HAS_DTS_GPIO
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help
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Enable the Gecko gpio driver.
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if GPIO_GECKO
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config GPIO_GECKO_COMMON_NAME
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string "Common driver name"
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default "GPIO_COMMON"
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config GPIO_GECKO_COMMON_INIT_PRIORITY
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int "Common initialization priority"
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default 39
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config GPIO_GECKO_COMMON_PRI
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int "Interrupt priority"
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default 2
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config GPIO_GECKO_PORTA
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bool "Port A"
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help
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Enable Port A.
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config GPIO_GECKO_PORTA_NAME
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string "Port A driver name"
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depends on GPIO_GECKO_PORTA
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default "GPIO_0"
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config GPIO_GECKO_PORTB
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bool "Port B"
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help
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Enable Port B.
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config GPIO_GECKO_PORTB_NAME
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string "Port B driver name"
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depends on GPIO_GECKO_PORTB
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default "GPIO_1"
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config GPIO_GECKO_PORTC
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bool "Port C"
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help
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Enable Port C.
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config GPIO_GECKO_PORTC_NAME
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string "Port C driver name"
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depends on GPIO_GECKO_PORTC
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default "GPIO_2"
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config GPIO_GECKO_PORTD
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bool "Port D"
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help
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Enable Port D.
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config GPIO_GECKO_PORTD_NAME
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string "Port D driver name"
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depends on GPIO_GECKO_PORTD
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default "GPIO_3"
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config GPIO_GECKO_PORTE
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bool "Port E"
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help
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Enable Port E.
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config GPIO_GECKO_PORTE_NAME
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string "Port E driver name"
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depends on GPIO_GECKO_PORTE
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default "GPIO_4"
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config GPIO_GECKO_PORTF
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bool "Port F"
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help
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Enable Port F.
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config GPIO_GECKO_PORTF_NAME
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string "Port F driver name"
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depends on GPIO_GECKO_PORTF
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default "GPIO_5"
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endif # GPIO_GECKO
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@ -294,10 +294,10 @@ DEVICE_AND_API_INIT(gpio_gecko_common, CONFIG_GPIO_GECKO_COMMON_NAME,
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static int gpio_gecko_common_init(struct device *dev)
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{
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gpio_gecko_common_data.count = 0;
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IRQ_CONNECT(GPIO_EVEN_IRQn, CONFIG_GPIO_GECKO_COMMON_PRI,
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IRQ_CONNECT(GPIO_EVEN_IRQn, CONFIG_GPIO_GECKO_COMMON_EVEN_PRI,
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gpio_gecko_common_isr, DEVICE_GET(gpio_gecko_common), 0);
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IRQ_CONNECT(GPIO_ODD_IRQn, CONFIG_GPIO_GECKO_COMMON_PRI,
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IRQ_CONNECT(GPIO_ODD_IRQn, CONFIG_GPIO_GECKO_COMMON_ODD_PRI,
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gpio_gecko_common_isr, DEVICE_GET(gpio_gecko_common), 0);
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irq_enable(GPIO_EVEN_IRQn);
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@ -1,4 +1,5 @@
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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@ -61,6 +62,66 @@
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status = "disabled";
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label = "UART_4";
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};
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gpio@40006100 {
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compatible = "silabs,efm32-gpio";
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reg = <0x40006100 0xf00>;
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interrupts = <1 2 11 2>;
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interrupt-names = "GPIO_EVEN", "GPIO_ODD";
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label = "GPIO";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioa: gpio@40006000 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006000 0x24>;
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label = "GPIO_A";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@40006024 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006024 0x24>;
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label = "GPIO_B";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@40006048 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006048 0x24>;
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label = "GPIO_C";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@4000606c {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x4000606c 0x24>;
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label = "GPIO_D";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@40006090 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x40006090 0x24>;
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label = "GPIO_E";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiof: gpio@400060b4 {
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compatible = "silabs,efm32-gpio-port";
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reg = <0x400060b4 0x24>;
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label = "GPIO_F";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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};
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@ -1,4 +1,5 @@
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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@ -37,6 +38,66 @@
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status = "disabled";
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label = "UART_1";
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};
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gpio@4000a400 {
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compatible = "silabs,efr32xg1-gpio";
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reg = <0x4000a400 0xc00>;
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interrupts = <9 2 17 2>;
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interrupt-names = "GPIO_EVEN", "GPIO_ODD";
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label = "GPIO";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioa: gpio@4000a000 {
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compatible = "silabs,efr32xg1-gpio-port";
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reg = <0x4000a000 0x30>;
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label = "GPIO_A";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@4000a030 {
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compatible = "silabs,efr32xg1-gpio-port";
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reg = <0x4000a030 0x30>;
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label = "GPIO_B";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@4000a060 {
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compatible = "silabs,efr32xg1-gpio-port";
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reg = <0x4000a060 0x30>;
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label = "GPIO_C";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@4000a090 {
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compatible = "silabs,efr32xg1-gpio-port";
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reg = <0x4000a090 0x30>;
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label = "GPIO_D";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@4000a0c0 {
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compatible = "silabs,efr32xg1-gpio-port";
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reg = <0x4000a0c0 0x30>;
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label = "GPIO_E";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiof: gpio@4000a0f0 {
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compatible = "silabs,efr32xg1-gpio-port";
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reg = <0x4000af0 0x30>;
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label = "GPIO_F";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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};
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32
dts/bindings/gpio/silabs,efm32-gpio-port.yaml
Normal file
32
dts/bindings/gpio/silabs,efm32-gpio-port.yaml
Normal file
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@ -0,0 +1,32 @@
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---
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title: EFM32 GPIO
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id: silabs,efm32-gpio-port
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version: 0.1
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description: >
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This is a representation of the EFM32 GPIO Port nodes
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,efm32-gpio-port"
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generation: define
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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"#cells":
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- pin
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- flags
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...
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35
dts/bindings/gpio/silabs,efm32-gpio.yaml
Normal file
35
dts/bindings/gpio/silabs,efm32-gpio.yaml
Normal file
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---
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title: EFM32 GPIO
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id: silabs,efm32-gpio
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version: 0.1
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description: >
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This is a representation of the EFM32 GPIO nodes
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,efm32-gpio"
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generation: define
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: compound
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category: required
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description: required interrupts
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generation: define
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label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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...
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32
dts/bindings/gpio/silabs,efr32xg1-gpio-port.yaml
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32
dts/bindings/gpio/silabs,efr32xg1-gpio-port.yaml
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---
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title: EFR32XG1 GPIO
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id: silabs,efr32xg1-gpio-port
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version: 0.1
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description: >
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This is a representation of the EFR32XG1 GPIO Port nodes
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,efr32xg1-gpio-port"
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generation: define
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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"#cells":
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- pin
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- flags
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...
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35
dts/bindings/gpio/silabs,efr32xg1-gpio.yaml
Normal file
35
dts/bindings/gpio/silabs,efr32xg1-gpio.yaml
Normal file
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---
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title: EFR32XG1 GPIO
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id: silabs,efr32xg1-gpio
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version: 0.1
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description: >
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This is a representation of the EFR32XG1 GPIO nodes
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properties:
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compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "silabs,efr32xg1-gpio"
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generation: define
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reg:
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type: int
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: compound
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category: required
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description: required interrupts
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generation: define
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label:
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type: string
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category: required
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description: Human readable string describing the device (used by Zephyr for API name)
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generation: define
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...
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#define CONFIG_UART_GECKO_0_BAUD_RATE SILABS_EFM32_USART_4000C000_CURRENT_SPEED
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#define CONFIG_UART_GECKO_0_IRQ_PRI SILABS_EFM32_USART_4000C000_IRQ_0_PRIORITY
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#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFM32_GPIO_40006100_LABEL
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#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN
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#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN_PRIORITY
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#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD
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#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD_PRIORITY
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#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFM32_GPIO_PORT_40006000_LABEL
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#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFM32_GPIO_PORT_40006024_LABEL
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#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFM32_GPIO_PORT_40006048_LABEL
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#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFM32_GPIO_PORT_4000606C_LABEL
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#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFM32_GPIO_PORT_40006090_LABEL
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#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFM32_GPIO_PORT_400060B4_LABEL
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/* End of SoC Level DTS fixup file */
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#define CONFIG_USART_GECKO_0_BAUD_RATE SILABS_EFM32_USART_40010000_CURRENT_SPEED
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#define CONFIG_USART_GECKO_0_IRQ_PRI SILABS_EFM32_USART_40010000_IRQ_0_PRIORITY
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#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFR32XG1_GPIO_4000A400_LABEL
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#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN
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#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
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#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD
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#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
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#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFR32XG1_GPIO_PORT_4000A000_LABEL
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#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFR32XG1_GPIO_PORT_4000A030_LABEL
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#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFR32XG1_GPIO_PORT_4000A060_LABEL
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#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFR32XG1_GPIO_PORT_4000A090_LABEL
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#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFR32XG1_GPIO_PORT_4000A0C0_LABEL
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#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFR32XG1_GPIO_PORT_4000A0F0_LABEL
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/* End of SoC Level DTS fixup file */
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