dts-binding: modem: wnc-14a2a: remove base_label to fix build errors
When the WNC-14A2A modem binding was originally introduced, I thought the base_label would shorten the define keeping the result short and easily portable. Turns out with the latest changes, it has a side effect of removing the "DT_*" prefix which is breaking the build. Let's remove "base_label" from the modem binding and adjust all of the dts_fixups referring to the WNC14A2A defines. NOTE: This commit moves the left-over WNC14A2A dts_fixup defines from the nRF52 soc into samples/net/lwm2m_client as the new values. They will stay there until the modem can be re-configured as a shield. Signed-off-by: Michael Scott <mike@foundries.io>
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3 changed files with 32 additions and 32 deletions
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@ -50,6 +50,4 @@ properties:
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category: optional
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description: UART RTS pin if no HW flow control (set to always enabled)
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generation: define, use-prop-name
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base_label: WNCM14A2A
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...
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@ -5,19 +5,37 @@
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*/
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#ifdef CONFIG_BOARD_FRDM_K64F
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#define DT_WNCM14A2A_UART_DRV_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_BUS_NAME
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
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#ifdef DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_UART_DRV_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_BUS_NAME
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
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#ifdef DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#endif
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#endif
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#if defined(CONFIG_BOARD_NRF52840_PCA10056) || defined(CONFIG_BOARD_NRF52840_MDK)
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#define DT_WNCM14A2A_UART_DRV_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_BUS_NAME
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
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#ifdef DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#endif
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#endif
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@ -148,20 +148,4 @@
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#define DT_CC310_IRQ_PRI DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY
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#endif
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#define DT_WNCM14A2A_UART_DRV_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_BUS_NAME
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
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#ifdef DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#endif
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/* End of SoC Level DTS fixup file */
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