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soc: xtensa: intel_s1000: Encode IRQ in dts

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Move IRQ number encoding out of dts_fixup.h and into the dtsi files.
For now just change devices on the dw_intc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-01-29 16:05:40 -06:00 • committed by Kumar Gala
commit d3623a2fba
2 changed files with 9 additions and 18 deletions
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10
dts/xtensa/intel_s1000.dtsi
View file

@ -2,6 +2,8 @@
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#define IRQ_DW(x) ((x) << 16 | (7) << 8 | (6))
/ {
cpus {
#address-cells = <1>;
@ -90,7 +92,7 @@
reg = <0x00080c00 0x400>;
bits = <32>;
label = "GPIO";
interrupts = <4 1 0>;
interrupts = <IRQ_DW(4) 1 0>;
interrupt-parent = <&dw_intc>;
gpio-controller;
@ -107,7 +109,7 @@
reg = <0x80800 0x400>;
label = "UART_0";
clock-frequency = <38400000>;
interrupts = <3 0 0>;
interrupts = <IRQ_DW(3) 0 0>;
interrupt-parent = <&dw_intc>;
@ -120,7 +122,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x80400 0x400>;
interrupts = <2 0 0>;
interrupts = <IRQ_DW(2) 0 0>;
interrupt-parent = <&dw_intc>;
label = "I2C_0";
@ -132,7 +134,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0000E000 0x400>;
interrupts = <7 0 0>;
interrupts = <IRQ_DW(7) 0 0>;
interrupt-parent = <&dw_intc>;
label = "SPI_0";
};

17
soc/xtensa/intel_s1000/dts_fixup.h
View file

@ -3,10 +3,7 @@
#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_80800_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_80800_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_80800_LABEL
#define DT_UART_NS16550_PORT_0_IRQ ((DT_NS16550_80800_IRQ_0 << 16) | \
(DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0 << 8) | \
(DT_INTEL_CAVS_INTC_78800_IRQ_0 << 0))
#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_80800_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_80800_IRQ_0_PRIORITY
#define DT_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_80800_IRQ_0_SENSE
#define DT_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_80800_CLOCK_FREQUENCY
@ -40,21 +37,13 @@
#define DT_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_80400_BASE_ADDRESS
#define DT_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_80400_CLOCK_FREQUENCY
#define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_80400_LABEL
#define DT_I2C_0_IRQ ((DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0 << 16) | \
(DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0 << 8) | \
(DT_INTEL_CAVS_INTC_78800_IRQ_0 << 0))
#define DT_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0
#define DT_I2C_0_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0_SENSE
#define DT_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_80400_IRQ_0_PRIORITY
#define DT_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_E000_BASE_ADDRESS
#define DT_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_E000_LABEL
#define DT_SPI_0_IRQ ((DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0 << 16) | \
(DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0 << 8) | \
(DT_INTEL_CAVS_INTC_78800_IRQ_0 << 0))
#define DT_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0
#define DT_SPI_DW_IRQ_FLAGS DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_SENSE
#define DT_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_PRIORITY