imx: Add EPIT peripheral support for i.MX6SoloX soc
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support for i.MX6SoloX soc. Origin: Original Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
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5 changed files with 72 additions and 1 deletions
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@ -251,6 +251,32 @@
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label = "MU_B";
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status = "disabled";
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};
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epit1:epit@420d0000 {
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compatible = "nxp,imx-epit";
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reg = <0x420d0000 0x4000>;
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interrupts = <56 0>;
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prescaler = <0>;
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rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "EPIT_1";
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status = "disabled";
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};
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epit2:epit@420d4000 {
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compatible = "nxp,imx-epit";
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reg = <0x420d4000 0x4000>;
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interrupts = <57 0>;
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prescaler = <0>;
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rdc = <(RDC_DOMAIN_PERM(A9_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW)|\
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RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
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RDC_DOMAIN_PERM_RW))>;
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label = "EPIT_2";
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status = "disabled";
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};
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};
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};
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@ -39,4 +39,11 @@ config IPM_IMX
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endif # IPM
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if COUNTER
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config COUNTER_IMX_EPIT
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default y
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endif # COUNTER
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endif # SOC_MCIMX6X_M4
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@ -13,6 +13,7 @@ config SOC_MCIMX6X_M4
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bool "SOC_MCIMX6X_M4"
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select HAS_IMX_HAL
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select HAS_IMX_GPIO
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select HAS_IMX_EPIT
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endchoice
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@ -101,3 +101,15 @@
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#define DT_IPM_IMX_MU_B_IRQ DT_NXP_IMX_MU_4229C000_IRQ_0
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#define DT_IPM_IMX_MU_B_IRQ_PRI DT_NXP_IMX_MU_4229C000_IRQ_0_PRIORITY
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#define DT_IPM_IMX_MU_B_NAME DT_NXP_IMX_MU_4229C000_LABEL
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#define DT_COUNTER_IMX_EPIT_1_BASE_ADDRESS DT_NXP_IMX_EPIT_420D0000_BASE_ADDRESS
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#define DT_COUNTER_IMX_EPIT_1_IRQ DT_NXP_IMX_EPIT_420D0000_IRQ_0
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#define DT_COUNTER_IMX_EPIT_1_IRQ_PRI DT_NXP_IMX_EPIT_420D0000_IRQ_0_PRIORITY
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#define DT_COUNTER_IMX_EPIT_1_LABEL DT_NXP_IMX_EPIT_420D0000_LABEL
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#define DT_COUNTER_IMX_EPIT_1_PRESCALER DT_NXP_IMX_EPIT_420D0000_PRESCALER
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#define DT_COUNTER_IMX_EPIT_2_BASE_ADDRESS DT_NXP_IMX_EPIT_420D4000_BASE_ADDRESS
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#define DT_COUNTER_IMX_EPIT_2_IRQ DT_NXP_IMX_EPIT_420D4000_IRQ_0
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#define DT_COUNTER_IMX_EPIT_2_IRQ_PRI DT_NXP_IMX_EPIT_420D4000_IRQ_0_PRIORITY
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#define DT_COUNTER_IMX_EPIT_2_LABEL DT_NXP_IMX_EPIT_420D4000_LABEL
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#define DT_COUNTER_IMX_EPIT_2_PRESCALER DT_NXP_IMX_EPIT_420D4000_PRESCALER
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@ -78,6 +78,15 @@ static void SOC_RdcInit(void)
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/* Set access to MU B for M4 core */
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RDC_SetPdapAccess(RDC, rdcPdapMuB, MU_B_RDC, false, false);
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#endif /* CONFIG_IPM_IMX */
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#ifdef CONFIG_COUNTER_IMX_EPIT_1
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/* Set access to EPIT_1 for M4 core */
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RDC_SetPdapAccess(RDC, rdcPdapEpit1, EPIT_1_RDC, false, false);
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#endif /* CONFIG_COUNTER_IMX_EPIT_1 */
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#ifdef CONFIG_COUNTER_IMX_EPIT_2
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/* Set access to EPIT_2 for M4 core */
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RDC_SetPdapAccess(RDC, rdcPdapEpit2, EPIT_2_RDC, false, false);
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#endif /* CONFIG_COUNTER_IMX_EPIT_2 */
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}
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/* Initialize cache. */
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@ -133,6 +142,22 @@ static void SOC_ClockInit(void)
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CCM_ControlGate(CCM, ccmCcgrGateUartClk, ccmClockNeededAll);
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CCM_ControlGate(CCM, ccmCcgrGateUartSerialClk, ccmClockNeededAll);
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#endif /* CONFIG_UART_IMX */
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#ifdef CONFIG_COUNTER_IMX_EPIT
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/* Select EPIT clock is derived from OSC (24M) */
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CCM_SetRootMux(CCM, ccmRootPerclkClkSel, ccmRootmuxPerclkClkOsc24m);
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/* Configure EPIT divider */
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CCM_SetRootDivider(CCM, ccmRootPerclkPodf, 0);
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/* Enable EPIT clocks */
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#ifdef CONFIG_COUNTER_IMX_EPIT_1
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CCM_ControlGate(CCM, ccmCcgrGateEpit1Clk, ccmClockNeededAll);
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#endif /* CONFIG_COUNTER_IMX_EPIT_1 */
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#ifdef CONFIG_COUNTER_IMX_EPIT_2
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CCM_ControlGate(CCM, ccmCcgrGateEpit2Clk, ccmClockNeededAll);
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#endif /* CONFIG_COUNTER_IMX_EPIT_2 */
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#endif /* CONFIG_COUNTER_IMX_EPIT */
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}
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/**
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@ -140,7 +165,7 @@ static void SOC_ClockInit(void)
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* @brief Perform basic hardware initialization
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*
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* Initialize the interrupt controller device drivers.
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* Also initialize the timer device driver, if required.
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* Also initialize the counter device driver, if required.
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*
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* @return 0
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*/
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