This commit converts the existing hcm5883l 3-axis magnetometer
driver to use device tree for the I2C and GPIO selection.
It also adds a basic sample application for this sensor, using the
frdm-k64f development board to demonstrate how the interrupt
GPIO pin and I2C bus can be selected.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
This patch introduces the support of the Low Power Timer
for the STM32L4xx from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The Generic FSK controller enables radio operation
using a custom GFSK/GMSK or MSK modulation format
achieved by programming a set of PHY variables such
as BT product, modulation index and modulation filter
co-efficients (such that max frequency deviation
<= 500kHz). Generic FSK mode also offers a highly
configurable packet structure, variable bit rate
transmission and reception, some limited packet
(header) processing, and interface to a RAM-based
Packet Buffer.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
The Generic FSK controller enables radio operation
using a custom GFSK/GMSK or MSK modulation format
achieved by programming a set of PHY variables such
as BT product
This binding describes the devices and its associated properties.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Convert bmg160 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert bmm150 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert max44009 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert mcp9808 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert sx9500 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert tmp112 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert th02 sensor driver and sample app to utilize device tree.
Introduce a dts board overlay on the frdm_k64f board to ensure we at
least have a single platform in which the sample gets built.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds supoprt for the Atmel SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Introduce a standard watchdog alias 'watchdog0' that can be utilized
by sample/test code in the future. This helps remove the need for
CONFIG_WDT_0_NAME in dts_fixup.h files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
dts pinctrl definitions were pushed in tree without the code
available to deal with it. They have been kept waiting for the
code, but this is taking much more time than initially thought.
So in current zephyr tree, for all STM32 boards, we have pinmux.c
file which is used to configure pins and these files that are
basically no-op. This situation is creating a lot of confusion
especially to new comers, and create useless maintenance effort.
Remove these files for now.
When zephyr will ready to use them, this commit could be reverted.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update lis3mdl-magn dts binding to include GPIO interrupt pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit moves DMA parameters previously hard coded in the driver
to the dts.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a yaml file for help describing generic dma controllers.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update ccs811 dts binding to include GPIO pins for wakeup, reset, and
interrupt and change driver code to get the GPIO pin and controller
info from DT instead of Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update vl53l0x dts binding to include GPIO XSHUT pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no APB2 bus on stm32f0 series.
What could be found as APB2 in CMSIS files is actually
second group of APB (A.K.A APB1_2).
Fix nodes that are using this wrong reference accorss the series.
Fixes#20310
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update the binding for nordic,nrf-temp to require the label property and
use the generated define (DT_INST_0_NORDIC_NRF_TEMP_LABEL) instead of
Kconfig symbol (CONFIG_TEMP_NRF5_NAME).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Some chips supported by lis2dh driver (such as LIS2DH12 and LIS3DH)
contain CTRL_REG0 (1Eh) register to control internal pull-up on SDO/SA0
line (enabled by default). Add disconnect-sdo-sa0-pull-up boolean
device-tree property to allow disconnecting pull-up during driver
initialization. This allows to save around 180uA at 3.6V in
accelerometer power-down mode.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Create a common binding file that will be included by all bindings
handled by lis2dh.c driver. For now this includes optional irq-gpios
property.
Use introduced st,lis2dh-common.yaml in st,lsm303dlhc-accel.yaml in
order to support defining irq-gpios.
Also improve description of st,lis2dh-i2c.yaml to better match what can
be found in st,lis2dh-spi.yaml.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Explain how 'include:' works in some more detail and mention base.yaml,
along with an example of how it can be used.
This was adapted from
https://github.com/zephyrproject-rtos/zephyr/pull/19846.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC.
Based heavily on the existing mcux LPSPI driver.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
- Add WDT(0,1) to esp32.dtsi
- Extend the module to be able to use WDT(0,1)
- Some minor refactoring due to usage of device tree
Tests:
- samples/drivers/watchdog
- tests/drivers/watchdog/wdt_basic_api
Note:
- timer module interrupt registers shall be removed when
timer driver implemented.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Unlike most other GPIO controllers which support 32 pins this device
only supports 16. (There is an SX1508B that has 8 pins, but the
driver doesn't support it.)
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
All 96Boards complying to the IE spec exposes either 40pin or 30pin
standard low speed connectors for peripheral connectivity. These
connectors are well defined and available in the IE spec. So, lets
create a devicetree binding for the 40pin header for the 1.8v IE
96Boards. This binding will be utilized by the 96Boards
for exposing the GPIO pins as nexus node as per the devicetree spec.
This will allow the shields and applications to use board independent
GPIO mapping.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
All 96Boards complying to the IE spec exposes either 40pin or 30pin
standard low speed connectors for peripheral connectivity. These
connectors are well defined and available in the IE spec. So, lets
create a devicetree binding for the most commonly used 30pin header
for the 3.3v IE 96Boards. This binding will be utilized by the 96Boards
for exposing the GPIO pins as nexus node as per the devicetree spec.
This will allow the shields and applications to use board independent
GPIO mapping.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Do
description: |
instead of
description: >
in the example, to preserve internal newlines in the string. Also link
to https://yaml-multiline.info/, which is handy.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The int, array, string, and string-array property types were not
documented together with the other types, for whatever reason (might've
been too focused on the more complex types and overlooked it). Add
documentation for them.
Also do some minor cleanup on the descriptions, e.g. to make them more
consistent.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
With https://github.com/zephyrproject-rtos/zephyr/pull/20185, multi-line
descriptions will be formatted nicely, but using '>' breaks it, because
it removes internal newlines (including between paragraphs).
See https://yaml-multiline.info/.
Replace 'description: >' with 'description: |' to encourage '|'. That'll
prevent '>' from getting copied around and messing up long descriptions.
This will lead to some extra newlines in the output, but it's fine.
Line-wrapping messes up any manual formatting.
The replacement was done with
$ git ls-files 'dts/bindings/*.yaml' | \
xargs sed -i 's/description:\s*>/description: |/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add bindings for Nordic nRF family peripherals:
- IPC (Interprocessor Communication)
- RNG (Random Number Generator)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
MT9M114 is a CMOS digital image sensor.
Implement video interface.
Only VGA (640x480) supported for now.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The Thingy:52 has a LIS2DH12 low-power accelerometer on the external
I2C bus. Add the necessary description to devicetree.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Make the clkout properties of the NXP Kinetis SIM module device tree
bindings optional since not all boards rely on this clock signal for
clocking external peripherals.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the common.dts file which has been used for a year.
common.dts at one point allowed us to conditionally add an MCUBoot
overlay based on Kconfig.
but since DT lost access to Kconfig options it has been unused.
The overridable variable DTS_COMMON_OVERLAYS, which by default points
to common.dts, is also unused in-tree, and any out-of-tree usage can
be ported over to use DTC_OVERLAY_FILE instead, so we remove the
variable as well.
This simplifies the configuration system.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Add binding for arm,mps2-fpgaio-gpio and update device tree and change
FPGA GPIO init code to utilize device tree defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the selection of the IP clock source for the modules in the NXP
Kinetis KE1xF SoCs from being hardcoded in soc.c to being specified in
the device tree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds LiteX SPI drivers and its bindings.
Signed-off-by: Daniel Craviee <dcraviee@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
STM32L151XB-A SoC is almost similar to the STM32L151XB SoC except that
it has more RAM (32KiB). Hence add devicetree and Kconfig support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Indtroduction of generic device tree bindings for keyboard scan devices.
In addition, device tree node entries and dt specific bindings where
also implemented for Microchip MEC1501
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
STM32L1 uses the same spi controller as STM32F1 so we can just set the
right addresses and enable them. We also need to add the fixup names and
to correctly include the header for ST LL HAL.
Signed-off-by: Karl Palsson <karlp@etactica.com>
1. Replace the non-existent CPU device binding ("Cortex-R") specified
by the CPU node with a proper one.
2. Relocate CPU node declaration to SoC dtsi:
The CPU node should be declared in the SoC dtsi because the core
type is SoC-dependent. In fact, this is exactly how it is done in
the Cortex-M port.
3. Remove core_intc (supposedly Cortex-R VIC):
Unlike the NVIC of Cortex-M, the VIC of Cortex-R is not a true
interrupt controller in the conventional sense and merely acts as
a CPU input port for aggregated interrupt request and vector index
signals. For this reason, there is no point in declaring it in the
device tree and specifying it as an interrupt parent. All SoCs
incorporating Cortex-R implement a separate true interrupt
controller (for instance, GIC for Zynq MPSoC and VIM for Hercules).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds device bindings for Cortex-R4(F) and Cortex-R5(F).
These were supposed to be added during the initial development of
Cortex-R port, but it was not due to an incorrect device tree
specification.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Implemented latest extensions to the counter API related to
detection of alarms being set too late and short relative alarms.
Implementation could not be realized on nrfx_rtc driver thus
driver has been reimplemented based on nrf_rtc hal.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The patch adds initial support for STM32F030X4 SoC.
STM32F0 Cube package advises to use 'stm32f030x6' code
for both STM32F030x4 and STM32F030x6 SoC variants.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
Add #pwm-cells property in bindings for Nordic PWMs and add this
property with a suitable value assigned to all PWM nodes in dts
files for Nordic SoCs.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Looking at the code, this flag was probably made 'required: true' by
mistake. Combining 'type: boolean' with 'required: true' for 'ppi-wrap'
means that all nodes that use this binding are required to have a
'ppi-wrap;' property.
The mistake was hidden by a bug in edtlib (failing to flag missing
'required: true' booleans).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Implement a nice generalization suggested by Bobby Noelte.
Instead of having a generic #cells key in bindings, have source-specific
*-cells keys. Some examples:
interrupt-cells:
- irq
- priority
- flags
gpio-cells:
- pin
- flags
pwm-cells:
- channel
- period
This makes bindings a bit easier to read, and allows a node to be a
controller for many different 'phandle-array' properties.
The prefix before *-cells is derived from the property name, meaning
there's no fixed set of *-cells keys. This is possible because of the
earlier 'phandle-array' generalization.
The older #cells key is supported for backwards compatibility, but
generates a deprecation warning.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Generating generic information for 'type: phandle-array' properties in
edtlib was difficult due to defining phandle-array as just a list of
phandles and numbers. To make sense of a phandle-array property like
'pwms', you have to know that #pwm-cells is expected to appear on
each referenced controller, and that the binding for the controller has
a #cells.
Because of this, handling of various 'type: phandle-array' properties
was previously hardcoded in edtlib and exposed through properties like
Node.pwms, instead of through the generic Node.props (though with a lot
of shared code).
In practice, it turns out that all 'type: phandle-array' properties in
Zephyr work exactly the same way: They all have names that end in -s,
the 's' is removed to derive the name of related properties, and they
all look up #cells in the binding for the controller, which gives names
to the data values.
Strengthen the definition of 'type: phandle-array' to mean a property
that works exactly like the existing phandle-array properties (which
also means requiring that the name ends in -s). This removes a ton of
hardcoding from edtlib and allows new 'type: phandle-array' properties
to be added without making any code changes.
If we ever need a property type that's a list of phandles and numbers
but that doesn't follow this scheme, then we could add a separate type
for it. We should check if the standard scheme is fine first though.
The only property type for which no information is generated is now
'compound'.
There's some inconsistency in how we generate identifiers for clocks
compared to other 'type: phandle-array' properties, so keep
special-casing them for now in gen_defines.py (see the comment in
write_clocks()).
This change also enabled a bunch of other simplifications, like reusing
the ControllerAndData class for interrupts.
Piggyback generalization of *-map properties so that they work for any
phandle-array properties. It's now possible to have things like
'io-channel-map', if you need to.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit introduces separate "compatible" strings for DTS nodes
representing different types of Nordic SPI peripherals. Previously
"nordic,nrf-spi" was used for both SPI and SPIM. SPIS was already
handled separately.
Quite a few files need to be touched by this commit but the changes can
be divided into groups of related or very similar ones, distinguishable
by the initial part of the path to the modified file:
* dts/bindings/spi/
new binding for "nordic,nrf-spim" is added and common fields for all
3 types of Nordic SPI peripherals are extracted to a shared file
* dts/arm/nordic/
"compatible" properties in spiX nodes are updated (when there is no
choice as only one type of SPI peripheral is available) or replaced
with a comment pointing out that the proper type of peripheral needs
to be picked at some upper layer
* drivers/spi/
spi_nrfx_spim driver is updated with the new form of macros generated
from dts
* boards/
all spiX nodes in dts files for boards equipped with an nRF chip are
updated with the proper "compatible" property, according to the type
of SPI peripheral that is currently selected for the board by the
corresponding Kconfig choice option (SPI_x_NRF_SPI*)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit introduces separate "compatible" strings for dts nodes
representing different types of Nordic TWI peripherals. Previously
"nordic,nrf-i2c" was used for both TWI and TWIM, and TWIS was not
supported.
Quite a few files need to be touched by this commit but the changes can
be divided into groups of related or very similar ones, distinguishable
by the initial part of the path to the modified file:
* dts/bindings/i2c/
new bindings for "nordic,nrf-twim" and "nordic,nrf-twis" are added
and the one for "nordic,nrf-i2s" is renamed to "nordic,nrf-twi",
common fields for all these bindings are extracted to a shared file
* dts/arm/nordic/
"compatible" properties in i2cX nodes are updated (when there is no
choice as only one type of TWI peripheral is available) or replaced
with a comment pointing out that the proper type of peripheral needs
to be picked at some upper layer
* drivers/i2c/
both flavors of i2c_nrfx drivers are updated with the new names of
macros generated from dts
* boards/
all i2cX nodes in dts files for boards equipped with an nRF chip are
updated with the proper "compatible" property, according to the type
of TWI peripheral that is currently selected for the board by the
corresponding Kconfig choice option (I2C_x_NRF_TWI*)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the new 'compatible:' and 'include:' syntaxes, and clean it up like
for other bindings.
Shorten the description, because it appears in the output as a comment
above the generated macros, and it looks neater. I asked Mateusz what
kind of device it is.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Use the new 'compatible:', 'include:', and 'required:' keys, and clean
it up like other bindings.
Shorten the 'description:' text, because it appears in the output as a
comment above the generated macros, and it looks neater.
Fixes: #19385
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add support for up-and-down counter mode, which aligns the center of
each channel's pulses instead of their initial edges. This is enabled
on a PWM periphral by adding the "center-aligned" property to the
device tree, e.g.:
&pwm0 {
status = "okay";
center-aligned;
ch0-pin = <15>;
ch1-pin = <17>;
ch1-inverted;
};
Signed-off-by: Jim Paris <jim@jtan.com>
Use the device tree to assign the correct peripheral clock to each
UART/USART/LEUART. Previously, the clock identifier was determined
through the sequence number of the instantiated UART. This meant
configuring all UARTs when only one of the later UARTs was required.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
This adds support for Kinestis K22
Co-authored-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Co-authored-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
Co-authored-by: Tom Burdick <thomas.burdick@gmail.com>
Signed-off-by: Tom Burdick <thomas.burdick@gmail.com>
This commit adds driver supporting reading DNA ID value for LiteX SoC
builder.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Enable LiteX DNA ID driver in litex_vexriscv board.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add RTC timer driver for CC13X2/CC26X2, and use it instead of systick
as system clock. It is necessary to use this timer for power
management support, so that the system can exit from deep sleep upon
expiry of timeouts.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Deprecate 'sub-node:' and add a more general 'child-binding:' mechanism
to bindings. Keep supporting 'sub-node:', but print a deprecation
warning when it's used.
Like 'sub-node:', 'child-binding:' gives a binding to child nodes, but
the binding is required to be a complete binding, and is treated (and
checked) like a normal binding.
'child-binding:' can in turn contain another 'child-binding:', up to any
number of levels. This is automatic from treating it like a normal
binding, and from the code initializing parent Devices before child
Devices.
This lets nodes give bindings to grandchildren.
For example, take this devicetree fragment:
parent {
compatible = "foo";
child-1 {
grandchild-1 {
...
};
grandchild-2 {
...
};
};
child-2 {
grandchild-3 {
...
};
};
};
The binding for 'foo' could provide bindings for grandchild-1/2/3 like
this:
compatible: "foo"
# Binding for children
child-binding:
title: ...
description: ...
...
# Binding for grandchildren
child-binding:
title: ...
description: ...
properties:
...
Due to implementation issues with the old devicetree scripts, only two
levels of 'child-binding:' is supported for now. This limitation will go
away in Zephyr 2.2.
Piggyback shortening 'description:' and 'title:' in some bindings that
provide child bindings. This makes the generated header a bit neater.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The arc_iot.dtsi used "intel,qmsi-ss-gpio" and "intel,qmsi-ss-i2c"
compatiables, however we have no drivers for these and it seems wrong
that the ARC platform would utilize such compatiables. Remove the
compatiable fields for now (proper one's can be added when there are I2C
and GPIO drivers for this platform).
Also remove the binding files associated with "intel,qmsi-ss-gpio" and
"intel,qmsi-ss-i2c" as nothing in tree utilizes them.
Fixes: 19227
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Instead of
child:
bus: foo
parent:
bus: bar
, have
child-bus: foo
parent-bus: bar
'bus' is the only key that ever appears under 'child' and 'parent'.
Support the old keys for backwards compatibility, with a deprecation
warning if they're used.
Also add 'child/parent-bus' tests to the edtlib test suite. It was
untested before.
I also considered putting more stuff under 'child' and 'parent', but
there's not much point when there's just a few keys I think. Top-level
stuff is cleaner and easier to read.
I'm planning to add a 'child-binding' key a bit later (like 'sub-node',
but more flexible), and child-* is consistent with that.
Also add an unrelated test-bindings/grandchild-3.yaml that was
accidentally left out earlier.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.
Fixes: #18657
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add support to STM IIS3DHHC the ultra-low noise, high-stability
three-axis linear accelerometer.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
4 are found: 2 with a counter of 16bits and 2 with a counter of 32 bits.
However, first 32bits instance will not be exposed as it will be used by
rtos timer driver directly to implement k_busy_wait()
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32wb SoC. Enable the independent watchdog
for the stm32wb series for use with this driver.
Signed-off-by: Robert Weber <robertweber95@gmail.com>
The LIS2MDL is not a combo device, but pure magnotemeter.
Hence, '-magn' extension is not adding information and can
be removed from dts compatible name as well as binding filename.
Instead specify '-i2c' or '-spi' to distinguish between the names.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
XIP support in x86 was something of a mess. This
patch does the following:
- Generic ia32 SOC no longer defines a "flash" region
as generic X86 devices don't have a microcontroller-
like concept of flash. The same has been done for apollo_lake.
- Generic ia32 and apollo_lake SOCs starts memory at 1MB.
- Generic ia32 SOC may optionally have CONFIG_XIP enabled.
The board definition must provide a flash region definition
that gets exposed as DT_PHYS_LOAD_ADDR.
- Fixed definitions for RAM/ROM source addresses in ia32's
linker.ld when XIP is turned off.
- Support for enabling XIP on apollo_lake SOC removed, there's
no use-case.
- acrn and gpmrb boards have flash and XIP related definitions
removed.
- qemu_x86 has a fake flash region added, immediately after system
RAM, for use when XIP is enabled. This used to be in the ia32 SOC.
However, the default for qemu_x86 is to now have XIP disabled.
- Fixed tests/kernel/xip to run by default on boards that enable
XIP by default, plus an additional test to exercise XIP on
qemu_x86 (which supports it but has XIP switched off by default)
The overall effect of this patch is to:
- Remove XIP configuration for SOC/boards where it does not make
any sense to have it
- Support testing XIP on qemu_x86 via tests/kernel/xip, but leave
it off by default for other tests, to ensure it doesn't bit-rot
and that the system works in both scenarios.
- XIP remains an available feature for boards that need it.
Fixes: #18956
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The KE1xF SoC family SIM unit differs from the other Kinetis family
SoCs. Add a unique compatiable and binding for it.
Fixes#18160
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When foo.yaml set some property 'required: true' and bar.yaml set the
same property 'required: false', the check for changing
'required: false' to 'required: true' would raise an error for
include: [bar.yaml, foo.yaml]
(with that particular order due to implementation details).
The order files are included in shouldn't matter. To fix it, change the
logic so that 'required' values are ORed together between included files
(so that 'required: true' is always respected), and remove the
'required' true-to-false check when merging included files.
Keep the true-to-false check when merging the (merged) included files
into the main binding (the binding with the 'include:' in it). This
might give a good organization, and the old scripts do it too.
Piggyback two fixes/cleanups:
- 'compatible' should be allowed to appear in included files
- No need to allow an 'inherits' key in _check_binding(), because
it has been removed before then, when merging bindings
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
- hw-flow-control added to uart.yaml as it is a common feature
- cleanup other related yaml files
- change property 'category' to 'rquired' in yaml files
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Fixes#3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig
Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts
- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs
- Old Silicon rev is not supported
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
For quite a few peripherals that are currently supported by nrfx HALs
or drivers there are no definitions of corresponding CMSIS-Core
peripheral accessing symbols that would provide their base addresses
in the proper domain (secure or non-secure), accordingly to the build
target. This commits adds devicetree nodes for these peripherals so
that their base addresses can be used in definitions of the accessing
symbols mentioned above.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The 'irq-gpios' property is optional as the drivers work fine if this
property isn't set. The property is only required if "TRIGGER" mode is
enabled in the drivers.
As such mark 'irq-gpios' as 'required:false`.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the handcoded multi-level IRQ values in device tree. We now are
able to generate the encoded multi-level IRQ value.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the handcoded multi-level IRQ values in device tree. We now are
able to generate the encoded multi-level IRQ value.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Pull out the LPO fixed-clock that is part of the PMC hardware block as
its own child node of the PMC block. This is because the PMC could have
its own driver associated with it that is seperate from the LPO clk.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
With the change to "compatible", and deprecation of "inherit"
and "category: required", there are multiple warnings when
running cmake. So fix those by updating the DTS YAML file.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Each intmux block acts like 8 interrupt controllers in which we can
have multiple device interrupts on a single channel and that channel
than interrupt than chained to another interrupt controller (in the
case of the RISC-V cores, it is the event unit).
So to describe things better to properly be able to walk the interrupt
chain in the device tree we treat each channel in the interrupt mux as
an interrupt controller rather than the intmux as a single interrupt
controller.
In the future this will allow the device tree generation code to walk
the interrupt chain from the device and up through any interrupt
controllers to generate the IRQ value that Zephyr expects (rather than
us hard coding this into the DTS).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
It's a bit subtle in that it's the only type where a property can
generate output even if it doesn't exist.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
For missing optional properties, it can be handy to generate a default
value instead of no value, to cut down on #ifdefs.
Allow a default value to be specified in the binding, via a new
'default: <default value>' setting for properties in bindings.
Defaults are supported for both scalar and array types. YAML arrays are
used to specify the value for array types.
'default:' also appears in json-schema, with the same meaning.
Include misc. sanity checks, like the 'default' value matching 'type'.
The documentation changes in binding-template.yaml explain the syntax.
Suggested by Peter A. Bigot in
https://github.com/zephyrproject-rtos/zephyr/issues/17829.
Fixes: #17829
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Instead of
properties:
compatible:
constraint: "foo"
, just have
compatible: "foo"
at the top level of the binding.
For backwards compatibility, the old 'properties: compatible: ...' form
is still accepted for now, and is treated the same as a single-element
'compatible:'.
The old syntax was inspired by dt-schema (though it isn't
dt-schema-compatible), which is in turn a thin wrapper around
json-schema (the idea is to transform .dts files into YAML and then
verify them).
Maybe the idea was to gradually switch the syntax over to dt-schema and
then be able to use unmodified dt-schema bindings, but dt-schema is
really a different kind of tool (a completely standalone linter), and
works very differently from our stuff (see schemas/dt-core.yaml in the
dt-schema repo to get an idea of just how differently).
Better to keep it simple.
This commit also piggybacks some clarifications to the binding template
re. '#cells:'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fixes an upcoming error:
device tree error: 'hw-flow-control' appears in /soc/uart@40028000
in nrf52840_pca10056.dts.pre.tmp, but is not declared in
'properties:' in .../dts/bindings/serial/nordic,nrf-uarte.yaml
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Have
include: foo.dts
include: [foo.dts, bar.dts]
instead of
inherits:
!include foo.dts
inherits:
!include [foo.dts, bar.dts]
This is a nicer and shorter and less cryptic syntax, and will make it
possible to get rid of the custom PyYAML constructor for '!include'
later.
'inherits: !include ...' is still supported for backwards compatibility
for now. Later on, I'm planning to mass-replace it, add a deprecation
warning if it's used, and document 'include:'. Then the '!include'
implementation can be removed a bit later.
'!include' has caused issues in the past (see the comment above the
add_constructor() call), gets iffy with multiple EDT instances, and
makes the code harder to follow.
I'm guessing '!include' might've been intended to be useful outside of
'inherits:' originally, but that's the only place where it's used. It's
undocumented that it's possible to put it elsewhere.
To implement the backwards compatibility, the code just transforms
inherits:
!include foo.dts
into
inherits:
- foo.dts
and treats 'inherits:' similarly to 'include:'. Previously, !include
inserted the contents of the included file instead.
Some more sanity checks for 'include:'/'inherits:' are included as well.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The 'category: required/optional' setting for properties is just a
yes/no thing. Using a boolean makes it clearer, so have
'required: true/false' instead.
Print a clear error when 'category:' is used:
edtlib.EDTError: please put 'required: true' instead of 'category:
required' in 'properties: foo: ...' in
test-bindings/sub-node-parent.yaml - 'category' has been removed
The old scripts in scripts/dts/ ignore this setting, and only print a
warning if 'category: required' in an inherited binding is changed to
'category: optional'. Remove that code, since the new scripts already
have the same check.
The replacement was done with
git ls-files 'dts/bindings/*.yaml' | xargs sed -i \
-e 's/category:\s*required/required: true/' \
-e 's/category:\s*optional/required: false/'
dts/binding-template.yaml is updated as well.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Update the ADC bindings to include #io-channel-cells and update the
related dts files to set #io-channel-cells.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Renaming bindings to consistently be called foo-controller.yaml for
controllers and foo-device.yaml for devices (last one mostly makes sense
for devices on buses and the like).
I was thinking of having a plain foo.yaml be the controller as well, but
!include interrupt.yaml
reads much worse than
!include interrupt-controller.yaml
Another advantage of this approach is that no binding changes meaning
(which could be risky). It's just adding suffixes to filenames.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Sanity-checking each !included file separately was inherited from the
old scripts. It makes it messy to check that combinations of fields make
sense, e.g. to check 'const:' or 'default:' against 'type:', since those
fields might come from different files (this is handy, since it makes
sense to just add/change a 'const:' value, for example).
Drop the requirement that each !included file is a complete binding in
itself, and treat them as binding fragments instead. Only check the
final merged binding.
This also means that !included files no longer need to have a
'description:' or 'title:' (those have always been unused for !included
files), so remove those, and add comments that explain what the
fragments are for instead. That should demystify bindings a bit.
Also fix the descriptions of i2c.yaml, i2s.yaml, spi.yaml, and
uart.yaml. They're for controllers, not devices. These are copy-paste
error from the corresponding device .yaml files.
Piggyback some indentation consistency nits in binding-template.yaml.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Convert type from compound to phandle-array for various bindings that
have properties like like <FOO>-gpios, pwms, clocks,
interrupt-extended, etc. that are phandle-array's.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add two new type-checked property types 'phandles' and 'phandle-array'
to edtlib.
'phandles' is for pure lists of phandles, with no other data, like
foo = < &bar &baz ... >
'phandle-array' is for lists of phandles and (possibly) numbers, like
foo = < &bar 1 2 &baz 3 4 ... >
dt-schema also has the 'phandle-array' type.
Property.val (in edtlib) is set to an array of Device objects for the
'phandles' type.
For the 'phandle-array' type, no Property object is created. This type
is only used for type checking.
Also refactor how types that do not create a Property object
('phandle-array' and 'compound') are handled. Have _prop_val() return
None for them.
The new types are implemented with two new TYPE_PHANDLES and
TYPE_PHANDLES_AND_NUMS types at the dtlib level. There is also a new
Property.to_nodes() functions for fetching the Nodes for an array of
phandles, with type checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
* Add "#address-cells" and "#size-cells" to base.yaml as properties
that can exist on any node. Cleanup other bindings that inherit
from the base.yaml.
* Add "status" property with an enum of valid options.
* Add "interrupt-parent" to base.yaml. It's a phandle to the node
which is the interrupt controller for the interrupt.
* Add "interrupt-extended" to base.yaml. Provides a way to specify
an interrupt-parent and specifier in a single property. Useful if
a device has multiple interrupts in which different interrupts go
to different interrult controllers.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In most cases #<FOO>-cells should be a constant. For example in spi
controller #address-cells should be 1, and #size-cells should be 0.
Use the const attribute to specify such single known values. Add const
value to missing bindings which have cells.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a 'const' property to bindings for any properties that are expected
to have a specifi known value. For example, #address-cells for an I2C
bus should always be '1'. So we can do something like the following in
the I2C bus binding:
"#address-cells":
type: int
category: required
const: 1
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Change binding for ST sensors property 'irq-gpios' to optional for the
cases of in which its obvious from the driver that the property is
optional (there's an ifdef based on the #define
DT_INST_0_ST_LIS2DH_IRQ_GPIOS_*).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The file contained an invalid license which came from a Nordic custom
repository. Switch it to Apache 2.0.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
'child: bus:' should be in the binding for the bus node, and
'parent: bus:' in the binding for devices that appear on the bus.
The description accidentally swapped them. Fix it.
Fixes: #18821
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Adding required fields to the devicetree overlay of the CAN sample as
this is often used as a reference. Also use these fields instead of the
KConfig entries.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
'interrupt-parent' should contain just the phandle of the node
interrupts are sent to.
This node (gic: interrupt-controller@f9010000) doesn't generate any
interrupts, so the 'interrupt-parent' value is never used (this is why
it wasn't caught). It'll give an error later with 'interrupt-parent'
declared as 'type: phandle' in bindings though.
Don't know what was intended. Just remove the 0.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Mark the 'reset-gpios' property as optional. It was incorrectly set
as required and its not required for the driver to function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Property type-checking has been pretty rudimentary until now, only
checking things like the length being divisible by 4 for 'type: array',
and strings being null-terminated. In particular, no checking was done
for 'type: uint8-array', letting
jedec-id = < 0xc8 0x28 0x17 >;
slip through when
jedec-id = [ 0xc8 0x28 0x17 ];
was intended.
Fix it by adding a syntax-based type checker:
1. Add Property.type, which gives a high-level type for the property,
derived from the markers added in the previous commit.
This includes types like TYPE_EMPTY ('foo;'),
TYPE_NUM ('foo = < 3 >;'), TYPE_BYTES ('foo = [ 01 02 ];'),
TYPE_STRINGS ('foo = "bar", "baz"'),
TYPE_PHANDLE ('foo = < &bar >;'), and TYPE_COMPOUND (everything not
recognized).
See the Property.type docstring in dtlib for more info.
2. Use the high-level type in
Property.to_num()/to_string()/to_node()/etc. to verify that the
property was assigned in an expected way for the type.
If the assignment looks bad, give a helpful error:
expected property 'nums' on /foo/bar in some.dts to be assigned
with 'nums = < (number) (number) ... >', not 'nums = "oops";'
Some other related changes are included as well:
- There's a new Property.to_bytes() function that works like accessing
Property.bytes, except with an added check for the value being
assigned like 'foo = [ ... ]'.
This function solves problems like the jedec-id one.
- There's a new Property.to_path() function for fetching the
referenced node for assignments like 'foo = &node;', with type
checking. (Strings are accepted too, as long as they give the path
to an existing node.)
This function is used for /chosen and /aliases.
- A new 'type: phandle' type can now be given in bindings, for
properties that are assigned like 'foo = < &node >;'.
- Property.__str__() now displays phandles and path references as they
were written (e.g. '< &foo >' instead of '< 0x1 >', if the
allocated phandle happened to be 1).
- Property.to_num() and Property.to_nums() no longer take a 'length'
parameter, because it makes no sense with the type checking.
- The global dtlib.to_string() and dtlib.to_strings() functions were
removed, because they're not that useful.
- More tests were added, along with misc. minor cleanup in various
places.
- Probably other stuff I forgot.
The more strict type checking in dtlib indirectly makes some parts of
edtlib more strict as well (wherever Property.to_*() is used).
Fixes: #18131
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
the microchip,mcp2515 and microchip,enc28j60 bindings would hit the
following build error:
device tree error: dts/bindings/can/microchip,mcp2515.yaml (in 'reg'):
'category' from !included file overwritten
('required' replaced with 'optional')
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
SPI3 clock info were missing and following macros were
not generated:
- DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BITS
- DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BUS
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit includes the initial support of ARC HS Development Kit:
* hsdk soc support
* hsdk board support
* no mmu support, so no userspace
* smp support
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This adds support for SARA-U2 modems. They have different timings on
the PWR_ON pin, don't support AT+CESQ and require a manual GPRS
connection setup.
The VINT pin is used as a more reliable and faster way to power on the
modem.
Based on work by Göran Weinholt <goran.weinholt@endian.se>
Signed-off-by: Michael Scott <mike@foundries.io>
This commit adds support for the Zynq UltraScale+ MPSoC as a qemu based
platform for Cortex-R based testing. This SoC only supports an
interrupt controller and serial port for limited testing.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
The GIC400 is a common interrupt controller that can be used with the
Cortex A and R series processors. This patch adds basic interrupt
handling for the GIC, but does not handle multiple routing or
priorities.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
Remove unused "system-clock-frequency" property, we don't have this
defined in various bindings and thus aren't using it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add "#address-cells" and "#size-cells" to the fixed-partition binding as
these are properties that may existing in the fixed-partition node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* Change pwm device bindings to include both base and pwm.yaml. This
allow for flexibility for any nodes that might not need/utilize the
base binding.
* Added pwm.yaml to a few device bindings that were missing it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a clock.yaml that clock controller bindings should inherit
from. clock.yaml defines the properties "#clock-cells" which all
clock controllers should have.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a gpio.yaml that GPIO controller bindings should inherit
from. gpio.yaml defines the properties "gpio-controller" and
"#gpio-cells" which all gpio controllers should have.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a intc.yaml that interrupt controller bindings should inherit
from. intc.yaml defines the properties "interrupt-controller" and
"#interrupt-cells" which all interrupt controllers should have.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is to support e.g. "<&adc 3>" in the device tree to create e.g.
DT_FOO_IO_CHANNELS_CONTROLLER = "ADC_0"
DT_FOO_IO_CHANNELS_INPUT = 3
Signed-off-by: Jim Paris <jim@jtan.com>
The nxp,kinetis-sim is shared by 2 SoC familes and on one of them
its not used for clocks. As such that SoC will not have a #clock-cells
property so mark it optional.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The binding for st,stm32-timers specifies #address-cells and #size-cells
as required but no dts files that have st,stm32-timers specify these
properties. Remove them from the binding.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Use clock specified in the device tree for obtaining the source clock
frequency for the pwm_mcux_ftm driver instead of relying on having an
NXP Kinetis MCG clock available in all SoCs supporting FlexTimer (FTM)
modules.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds a driver for st7789v lcd controller, and TL019FQV01 lcd.
The bulk of the driver is based on the existing ili9340 driver.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
NRF_UICR needs to be defined for nRF9160 SoC in
nrfx_config_nrf9160.h, because it is not defined
in nrfx/hal/mdk/nrf9160.h (as it is a Secure-only
peripheral).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
- update doc for different core configuration.
- fix some bugs in dts related files.
- add dts config and defconfig for different core configuration.
- end files with a newline in boards/arc/emsdp/board.dtsi
- remove unused head in boards/arc/emsdp/doc/index.rst
- ARC_MPU_VER in different core is fixed. so remove some useless code
for ARC_MPU_VER judgements in Kconfig.defconfig.* files for emsdp
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
The snps,designware-intc.yaml and xtensa,intc.yaml define a required
property snps,num-irq-priority-bits that isn't defined in any .dts
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
After witnessing some strange errors with memory not being
what it should be, lifiting everything above 1MB has solved
it. The Zephyr binary was being loaded into memory containing
reserved regions, resulting in data corruption.
We still simulate XIP for testing purposes by setting up the
memory map as follows:
0x000000 - 0x0FFFFF : Non-present
0x100000 - 0x4FFFFF : "Flash" ROM region
0x500000 - 0x8FFFFF : "SRAM" RAM region
For a total of 9 megabytes of physical RAM used.
Fixes problems observed in some large tests when code coverage
is enabled (which increases the amount of RAM used even more).
Fixes: #17782
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
With the new DT checks the dts bindings for "nxp,flexpwm" and
"nxp,imx-pwm" had old conventions that we now treat as build errors.
Additionally fix the number of #pwm-cells for "nxp,imx-pwm" to be 1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
i.MX RT10XX processors have four eFlexPWM modules, each containing
four 2-channels PWM submodules.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The "{d,i}ccm" nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are {d,i}ccm.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This dts binding file remained out from 0ec0c84808 commit, because
it was still in the pre-merging status.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add a new sifive,plic-1.0.0 binding that inherits from the riscv,plic0
binding. The new binding adds a required riscv,ndev property, which
gives the number of external interrupts supported.
Use the new binding for microsemi-miv.dtsi (with a value of 31 for
riscv,ndev, from http://www.actel.com/ipdocs/MiV_RV32IMAF_L1_AHB_HB.pdf)
and riscv32-fe310.dtsi (which already assigns riscv,ndev).
Also remove a spurious riscv,ndev assignment from
riscv32-litex-vexriscv.dtsi.
Also make edtlib and the old scripts/dts/ scripts replace '.' in
compatible strings with '_' when generating identifiers.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These are not declared in dts/bindings/arm/nxp,kinetis-sim.yaml and do
not generate any output.
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
A minor spelling fix in an inline comment in
both nRF9160 Secure and Non-Secure .dtsi headers.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
These are not declared in any binding and do not generate any output.
Trying to get rid of properties that appear on device tree nodes but
aren't declared in bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fix the following dtc warning:
mimxrt1064_evk.dts.pre.tmp:78.31-85.5: Warning (spi_bus_bridge):
/soc/flexspi1@402a4000: node name for SPI buses should be 'spi'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Several aliases were added to nrf9160[ns].dtsi files solely for
the purpose of getting base addresses of certain hardware modules
via DT_ macros generated for these aliases.
Since for one-instance modules the same can be now achieved with
standard DT_INST_0_* macros, there is no need to keep these aliases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
pinmux: Add the relevant definition of the spi3 pin
dts: Fix a bug, spi3 does not have a label
soc: Supplement spi3 related definition
Signed-off-by: Findlay Feng <i@fengch.me>
Add some information that would've saved me a lot of time:
- Give an overview of how device tree nodes and bindings fit together,
with examples. Assume people might be coming at it without knowing
anything about device tree.
- Explain how 'inherits' works in more detail
- Explain what 'parent/child: bus: ...' does more concretely, and what
problem it solves
- Add more examples to show what things look like in the .dts file
- Clean up the language a bit and make things more consistent
Also fix some errors, like 'properties: compatible: ...' being wrong
(missing 'constraint:' and compatible strings in the wrong place).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
stm32f429.dtsi wrongly introduced i2s nodes 4, 5 and 6.
Remove them as actually only i2s nodes 2 and 3 are supported on
these socs.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a kernel timer driver for the MEC1501 32KHz RTOS timer.
This timer is a count down 32-bit counter clocked at a fixed
32768 Hz. It features one-shot, auto-reload, and halt count down
while the Cortex-M is halted by JTAG/SWD. This driver is based
on the new Intel local APIC driver. The driver was tuned for
accuracy at small sleep values. Added a work-around for RTOS
timer restart issue. RTOS timer driver requires board ticks per
second to be 32768 if tickless operation is configured.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This was always intended to be a bytestring rather than an array, but
full support was missing. Since that has been addressed switch it to
the preferred format.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The JEDEC API defines the hardware page, sector, and block sizes.
Deprecate the Kconfig settings, remove the `erase-size-block` property,
and add `has-be32k` to indicate that 32K-byte erase is supported.
Rework the driver to use the constants instead of configured values.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Liteeth exposes two memory regions:
* set of rx/tx buffers (aka slots) to exchange packets,
* control and status registers.
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Same deal as in commit eba81c6e54 ("yaml: Remove redundant document
separators"), for some newly added stuff.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
No binding has anything but 'version: 0.1', and the code in scripts/dts/
never does anything with it except print a warning if it isn't there.
It's undocumented what it means.
I suspect it's overkill if it's meant to be the binding format version.
If we'd need to tell different versions from each other, we could change
some other minor thing in the format, and it probably won't be needed.
Remove the 'version' fields from the bindings and the warning from the
scripts/dts/ scripts.
The new device tree script will give an error when unknown fields appear
in bindings.
The deletion was done with
git ls-files 'dts/bindings/*.yaml' | xargs sed -i '/^\s*version: /d'
Some blank lines at the beginning of bindings were removed as well.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Commit 948ef47cf4 ("dts: riscv32: Add rv32m1 zero-riscy core") put
common ri5cy and zero_riscy DT parts in rv32m1.dtsi, with two separate
rv32m1_ri5cy.dtsi rv32m1_zero_riscy.dtsi files that #include it.
The two interrupt multiplexers are defined in the common rv32m1.dtsi
file, but rv32m1_ri5cy.dtsi rv32m1_zero_riscy.dtsi each only specify
'interrupts' for one of them. Since 'interrupts' is 'category: required'
in openisa,rv32m1-intmux.yaml, this leads to warnings (or errors with
the new DT parser).
Disable (status = "disabled") the two interrupt multiplexers in the
common rv32m1.dtsi file and enable them in the board-specific files to
fix it. Required props. are only checked for enabled nodes.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The property is required on all SPI clients, but was missing from
several devicetree nodes. Set it, using the capitalized version of the
node alias when present, with "jedec,spi-nor#0" as the fallback.
Closes#17662
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
In most of the cases the fixed-clock node is not referenced by the
Zephyr code, making the label property just a burden.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Have the SoC dtsi files for microchip mark the devices (uart & i2c) as
disabled by default and let the board dts files enable which one's they
need/use (which is what's happening already).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
I'm guessing STM32 GPIO nodes don't generate interrupts, because I can't
find any device tree nodes with 'compatible = "st,stm32-gpio"' and an
'interrupts' property.
Remove the required 'interrupts' property from the binding. This fixes a
bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
spi-max-frequency is marked as required in
dts/bindings/mtd/jedec,spi-nor.yaml.
I took the value from the datasheets (133 MHz for all), and guessed that
a dummy entry is fine for QEMU.
Fixes some errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The port_sel property had the category set to 'define' which isn't a
valid option. Change it to be 'required'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit makes the clock property optional (through base.yaml),
as clock reference is not used in the code.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds a DTCM (Device Tightly Coupled Memory) section for
Cortex F7 MCUs. The Address and length is defined in the corresponding
device tree file.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Since the nxp,imx-gpio binding is shared between i.MX and i.MX-RT SoC
the 'rdc' property needs to be optional (as it doesn't make sense on the
RT SoCs).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There doesn't seem to be any use of the virtualcom device in the code,
so lets remove it from the dts as it describes itself as a usb device
controller which it is not.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We've removed the need for the 'generation:' property in the binding
files. Remove use in st,stm32-usb.yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A number of dts bindings mark 'interrupts' as a required property when
in fact they are not for those devices. Remove the 'required' setting
and just have 'interrupts' as 'optional'.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The dts that have intel,qmsi-watchdog don't sent a clock property so its
not required. Change it from being required to optional.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:
- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
in order to configure USB clock source.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
These bindings override the 'category: optional' for 'clocks' from
uart.yaml with 'category: required', but none of the nodes that use the
bindings set 'clocks'.
Maybe it's a copy-paste error. Remove the 'clock' overrides.
Fixes some errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These bindings !include adc.yaml, but their device tree nodes never set
'clocks':
dts/bindings/iio/adc/atmel,sam-afec.yaml
dts/bindings/iio/adc/atmel,sam0-adc.yaml
dts/bindings/iio/adc/nordic,nrf-adc.yaml
dts/bindings/iio/adc/nordic,nrf-saadc.yaml
The nodes for these bindings do set it (think it's consistent for
st,stm32-adc.yaml):
dts/bindings/iio/adc/nxp,kinetis-adc12.yaml
dts/bindings/iio/adc/st,stm32-adc.yaml
Make 'clocks' optional in adc.yaml. Maybe it should be changed to
required on some platforms (!including bindings can change 'optional' to
'required').
Fixes a bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Setting it seems rare. Maybe it could be changed to required on just
some platforms (!including bindings can change 'optional' to
'required').
Fixes a bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
None of the interrupt controller nodes that use this binding in the
device tree files set 'reg' (or have a unit address).
Fixes a bunch of errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch populates "clocks" property in stm32 usb nodes
for clock related usb configuration code of each dtsi files
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The st,stm32-can binding specified several required properties that were
never set in actual .dts files and not used by the code. Remove them at
this time since they aren't being used.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We removed support for cell_string some time ago, so we have some stale
references in a number of bindings that we can remove.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Note that these appear as
properties: {erase,write}-block-size: label: ...
rather than as
properties: label: ...
I can't see anything looking at 'label' for individual properties in
bindings, so it's probably dead code. Labels are fetched from the device
tree in extract/flash.py.
Piggyback removal of some 'generation: define's and a redundant pair of
YAML document separators.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The spi-nor flash nodes require a jedec-id property as per the binding.
We add the jedec-id's as best we can determine based on the data sheets
for the various flash modules on these boards.
However these id's should be validated by actually reading the value to
ensure they are correct.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We define "arc,num-irq-priority-bits" and "intel,num-irq-priority-bits"
as required properties in the bindings for the interrupt controllers
however we never specify these properties in any .dts files or use them
in any code.
Remove them as stale properties in the binding files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix USB phy node for stm32l432 and stm32l452, which contain
a USB controller and not a OTG FS controller.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Now that the generation script doesn't look at the "generation" in the
YAML, we can remove it from the binding files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
uint8-array is the name for what the devicetree specification calls a
bytestring.
The original parsing code treated square brackets as equivalent to
quotes or angle brackets, failing to interpret elements as hex-encoded.
This was a bug, corrected in this patch by processing content as a
sequence of hex-encoded bytes with arbitrary whitespace.
The original generating code emitted the property as individual
elements. Replace that with generation of a single structure
initializer, which is more useful in cases where the length of a
property value may vary between nodes.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
1) dts/bindings/mmc/mmc.yaml: specifies common mmc.
2) dts/bindings/mmc/nxp,imx-usdhc.yaml: specifies
nxp usdhc module which inherits mmc.
3) dts/arm/nxp/nxp_rt.dtsi: usdhc support on RT chip.
4) boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts:
usdhc slot support on mimxrt1050_evk board.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
A number of minor issues with the 'fixed-clock' support:
* Fix the #clock-cells to be 0
* Fix nxp_ke1xf.dtsi to set #clock-cells 0 and the clock reference to
only be a phandle.
* Fix the generation script to only generate what it should for a
'fixed-clock'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A few clock bindings only have a single clock cell defined, but the
binding described more than one cell.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add clock support for STM32G0X SoC series.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add flash support for STM32G0X SoC series.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch adds support for the STM32G071xx
from STMicroelectronics.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support to STM LSM6DSO 6-axis IMU sensor driver.
This driver supports communication with device though both
I2C and SPI bus and both polling and drdy trigger mode.
This driver supports also the sensorhub mode with the possibility
to connect a maximum of two external devices, typically a
magnetometer and an environmental sensor, currently selected among
following devices: lis2mdl magnetometer, lps22hh or lps22hb
pressure and temperature sensors, HTS221 humidity sensor.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add support to STM LPS22HH pressure and temperature sensor.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit adds binding for clock provider with fixed frequency.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Removed Quark D2000 SoC files and first-order related DT bindings.
A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Several bindings have an expectation of sub-nodes that describe the
actual infomation. The sub-nodes don't have any compatiable so we can't
key on that.
So we can add the concept of a sub-node to the YAML to handle cases like
'gpio-keys', 'gpio-leds', 'pwm-leds', etc..
The sub-node in the YAML is effective the "binding" params that describe
what properties should exist in the sub-node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The binding specified 2 cells for an interrupt, but in reality we only
have an IRQ number. Remove the 'pri' cell from the binding to match
what the dts files are doing.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The pinctrl property in the bindings is meaningless, lets remove it and
add a proper pinctrl property when we are ready.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
YAML document separators are needed e.g. when doing
$ cat doc1.yaml doc2.yaml | <parser>
For the bindings, we never parse concatenated documents. Assume we don't
for any other .yaml files either.
Having document separators in e.g. base.yaml makes !include a bit
confusing, since the !included files are merged and not separate
documents (the merging is done in Python code though, so it makes no
difference for behavior).
The replacement was done with
$ git ls-files '*.yaml' | \
xargs sed -i -e '${/\s*\.\.\.\s*/d;}' -e 's/^\s*---\s*$//'
First pattern removes ... at the end of files, second pattern clears a
line with a lone --- on it.
Some redundant blank lines at the end of files were cleared with
$ git ls-files '*.yaml' | xargs sed -i '${/^\s*$/d}'
This is more about making sure people can understand why every part of a
binding is there than about removing some text.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Added support for the STM32L496XE series with 512KB internal flash and
256KB SRAM of contiguous addresses.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
* Fix white space in phy.yaml
* Fix property name in st,stm32-usbphyc.yaml and usb-nop-xceiv.yaml to
use "#phy-cells" and not "phy-cells"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce uint8-array type for local-mac-address as we need to
distinguish it from 'array' meaning a uint32 array.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DT spec. only has "okay" and not "ok". The Linux kernel has around
12k "okay"s and 300 "ok"s.
The scripts/dts scripts only check for "disabled", so should be safe re.
those at least.
The replacement was done with
git ls-files | xargs sed -i 's/status\s*=\s*"ok"/status = "okay"/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
* Rename stringlist to string-array to be closer inline with upstream
dtschema definitions.
* Add string-array to the device_node.yaml.template
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
TI_HDC Driver now also supports waiting for conversion to finish instead
of waiting for GPIO interrupt.
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
Hdc1008 driver is renamed into ti_hdc to prepare it to support all
available Texas Instruments HDC sensors (e.g. hdc1080, hdc2080).
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
This commit adds counter driver based on RTCC module for SiLabs Gecko
SoCs.
Tested with SLWSTK6061A / BRD4250B wireless starter kit.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Move common properties like 'compatible', 'reg', 'reg-names',
'interrupts', 'interrupt-names', and 'label' into one common base.yaml
that all the other yaml's can inherit from. This removes both
duplication and inconsistent definition.
The device specific yamls just need to say if a property is 'required'
or not.
NOTE: due to some generation conflicts we did not covert
'soc-nv-flash.yaml' to use base.yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We've never propertly generated any pinmux info, so remove generation
from the binding yaml files for pinmux properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
sram2a and sram2b where defined in the prospect of defining
HCI shared memory sections from device tree.
Remove them, since this is not the case anymore.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Since Kconfig is responsible for enabling/disabling devices at build,
the devices in dt are defaulted to status="ok" to keep the output in
generated_dts_board.conf the same across configurations and simplify
the board-level dts files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This adds support for the async API for SAM0 SERCOM USARTs using
DMA to drive the device.
Tested on SAMD21 with a few trivial programs and with
tests/drivers/uart/uart_async_api.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the basic timer counter (TC) found on SAM0
series parts. This driver only supports running the counter
in 32 bit wide mode. Since this mode explicitly slaves the odd
counters to the even ones, only instances of the even ones are
defined.
Tested with tests/drivers/counter/counter_basic_api on SAMD21.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Add support for the Low Power Inter-Integrated Circuit (LPI2C)
controllers found in the NXP Kinetis KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The node name for device_id was device_id@0 it should be
device_id@80a00c to reflect the first register region
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
import linux-v5.1:Documentation/devicetree/bindings/vendor-prefixes.txt
Use vendor-prefixes.txt to check vendor prefixes
used in compatible strings and property names.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Previous the register size was 1M, technically the there are only a
small handful of registers defined in the IOAPIC, so shrinking the size
to 4k, so its as most one page large.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The IOAPIC node shouldn't have been in the cpu container, especially
since the cpu container does:
#address-cells = <1>;
#size-cells = <0>;
So the reg field of the IOAPIC would be treated as 2 registers instead
of a register and size. Move IOAPIC node out of the CPU node fixes this
issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Apollo Lake devicetree is augmented with its 8 I2C interfaces.
The default number of dynamic IRQ stubs is increased to deal with
these new interfaces having IRQ vector detection at runtime.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The legacy PCI support in the DesignWare I2C driver is replaced with
the new PCIe support. The Intel Quark X1000 SoC and the galileo board
configurations are updated accordingly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The SARA-R4 series modules from U-Blox are size-optimized LTE-M /
NB-IoT and EGPRS modules designed for low power consumption and
longer battery life.
The binding identifies the UART device, power GPIO and reset GPIO
lines.
Signed-off-by: Michael Scott <mike@foundries.io>
The label binding was missed during initial development of the
WNC-M14A2A modem. Let's add the binding so that during the
migration to a shield, we can update the DTS correctly.
Signed-off-by: Michael Scott <mike@foundries.io>
ARM SysTick peripheral is optional in Cortex-M0 MCUs,
so we delete the respective dts node when the peripheral
is not present.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Atmel SAM D series SoC variants (present in the tree) all have
an ARM Cortex-M0+ core, not a Cortex-M0, so we correct this in
the .dtsi header.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Unlike Cortex-M3 and Cortex-M4, in Cortex-M7 the number of
MPU regions may vary based on the implementation. This commit
adds a DTS node for the ARM MPU peripheral in the device tree
of Cortex-M7 SoCs and updates the fixup files, so we may extract
the number of MPU regions at build time. SoCs:
- nxp_rt
- same70
- stm32f7
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds a DTS node for the ARM MPU peripheral in the
device tree of ARMv8-M SoCs (for the secure and the non-secure
DTS descriptions) and updates the fixup files. SoCs:
- nrf9160
- musca_a
- musca_b1
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add DTS binding files for the ARM MPU, for both ARM
MPU architecture variants, ARMv7-M and ARMv8-M.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add enum to list what values of maximum-speed are exceptable since
enum's get represented as strings in DT. This also allows us to
generate a code enum to correspond to the string.
We also introduce include/dt-bindings/usb/usb.h which is a hand coded
definition of the enum. We don't have a great way to generate this
right now, however it would be better if we did.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
MHU (Message Handling Unit) enables software to raise interrupts to
the processor cores. It is enabled in SSE 200 subsystems.
This patch aims to implement inter processor communication.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Add LiteX with softcore CPU VexRiscV SoC definitions and default
configurations.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add LiteX interrupt controller driver and bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add LiteX timer driver with bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add LiteX UART driver with bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Adding missing erase-block-size entries for the flash-controller
nodes in the nrf52810 and nrf52811 .dtsi files.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Move flash-controller and SRAM node definitions under SoC node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Reduced Kconfig for counter with nRF TIMER and RTC. Added overlays
for TIMER and RTC configuration in the counter test.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add support for CLKOUT source selection and divider as found on the
NXP Kinetis KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a new clock control driver for NXP Kinetis SoCs that have the
Peripheral Clock Controller module (PCC).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds basic support for nrf52811 in the arch SoC, dts
and nrfx folders.
The nRF52811 is a Bluetooth 5.1 Direction Finding SoC with comprehensive
protocol support.
The nRF52811 SoC is capable of the latest features of Bluetooth 5.1,
the most prominent being Direction Finding.
The radio in the nRF52811 SoC has comprehensive protocol capabilities,
including Bluetooth 5.1 Directing Finding, all Bluetooth 5 features,
802.15.4, Thread, Zigbee, ANT and 2.4 GHz proprietary.
It has 4 dBm TX power and has been optimized to offer the best RX
sensitivity of all SoCs in the nRF52 series.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Add flash and SRAM to the Microsemi MiV device tree.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Add bindings for SiFive Data Tightly-Integrated Memory.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
add usbd1 definition to rt dts file,
set EHCI controller config default value in rt1050 default config file,
add EHCI controller driver MACROs to dts_fixup.h,
initialize EHCI clock in rt soc.c
add HAS_MCUX_USB_EHCI for supported soc in Kconfig.soc
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Dts Nodes for all the GPIO portswere defined. In addition,
a new binding file was created for the gpio driver.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Expose MEC1501 5 I2C/SMB controllers
Add Microchip specific I2C device tree properties
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
All series of stm32 have at least one ADC instance and this commit adds
one ADC node to the root dts file of each soc, and also adds fixing up
mappings to them.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
The HT16K33 is a memory mapping, multifunction LED controller
driver. The controller supports up to 128 LEDs (up to 16 rows and 8
commons) and matrix key scan circuit of up to 13x3 keys.
This commit adds support for the keyscan functionality of the HT16K33.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The HT16K33 is a memory mapping, multifunction LED controller
driver. The controller supports up to 128 LEDs (up to 16 rows and 8
commons) and matrix key scan circuit of up to 13x3 keys.
This commit add support for the LED driver functionality of the
HT16K33.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This adds interrupt support to the SAM0 GPIO driver. This is heavily
inspired by @nzmichaelh work in #5715. The primary difference
from that implementation is that here the External Interrupt
Controller (EIC) is separated out into an interrupt controller driver
that is less tightly coupled to the GPIO API. Instead it implements
more of a conversion from the EIC's own odd multiplexing to a more
traditional port and pin mask IRQ-like callback. Unfortunately,
through the EIC on the SAMD2x are relatively well behaved
in terms of pin to EIC line mappings, other chips that share the
peripheral interface are not. So the EIC driver implements a
per-line lookup to the pin and port pair using definitions extracted
from the ASF headers.
The EIC driver still makes some assumptions about how it will be used:
mostly it assumes exactly one callback per port. This should be fine
as the only intended user is the GPIO driver itself.
This has been tested with some simple programs and with
tests/drivers/gpio/gpio_basic_api on a SAMD21 breakout and an
adafruit_trinket_m0 board.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds a SERCOM I2C driver for SAM0 series chips.
Tested with a SAMD21 chip on a SSD1306 display and a MLX90393
sensor. Only compile tested for SAMD20 and SAMR21.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Moves the flash memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the sram memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors peripheral addresses, clocks, and compatibles from the ri5cy
core dtsi into a common soc dtsi, then attaches interrupts in
core-specific dtsi files.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add initial support for the TI CC13x2 / CC26x2 series with the CC2652R
and CC1352R SoCs. The UART and GPIO peripherals are supported. Drivers
use the driverlib HAL from the TI CC13x2 / CC26x2 SDK.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
Implementation of pinmux for the stm32mp157c_dk2 board.
Some UART pin mux definition has been added (mainly for
UART console and UART/SPI Arduino shield support).
This can be completed with pin mux for other stm32mp157c
UART.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move SERCOM peripherals to use the raw defines generated from DTS
parsing. This adds aliases to the DTS so that the SERCOM number
can still be used for clocking and pinmux.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the SAM0 DMA Controller (DMAC). Chained
transfer are not currently implemented.
Tested with tests/drivers/dma/loop_transfer and custom modifications
to that test using three parallel reloading channels. Also tested
with a trivial program that did memory->serial.
Signed-off-by: Michael Hope <mlhx@google.com>
[hageman@inthat.cloud: Rebased and updated commit message]
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
This adds support for the async API for SAM0 SERCOM SPI using
DMA to drive the device. This implementation does the reload
for both transmit and receive in the receive DMA handler.
Doing this simplifies the implementation but means that the
transmit drains completely, resulting in the SPI clock pausing
between buffers while both are reloaded in the receive handler.
Tested with tests/drivers/spi/spi_loopback and several simple
programs monitored with a logic analyzer.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Initial support for Microchip MEC1501 series is added to the tree.
Additional support for UART is also included. This SoC supports
two operational modes for interrupts (Direct and Aggregated). For
this commit, the direct capable interrupts are configured in
direct mode.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Adds Atmel SAMR21 soc which is based on SAMD21, but with a AT86RF233
radio connected internally via SPI.
The AT86RF233 is not yet supprted by Zephyr at this point.
This code is very much copy & paste from atmel_sam0/samd21
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
This commit adds a flash driver implementation that writes to RAM and
exports statistics through stats.h. It can be used to simulate flash
memory for testing purposes.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
The GPIO driver for the Intel Apollo Lake has so many pins it has to
export ten devices to shoehorn its one device into the GPIO API. The
current implementation uses the shared IRQ driver because these
pseudodevices all share one IRQ. However, since the GPIO driver is
aware of all the possible interrupt sources, it's smaller and faster
(and not even messy) to handle it internally, so this patch eliminates
the dependency on the shared IRQ driver.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implementation of AMS (Austria Micro Systems) ENS210 temperature and
relative humidity sensor.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Add driver support for Atmel SAM0 device ID, which is 16-bytes long.
The device ID can simply be read from memory at a known location, but
the location is only described in the data sheet, not in ASF.
For SAMD2x it's 0x0080A00C, 0x0080A040, 0x0080A044 & 0x0080A048.
For SAMD5x it's 0x008061FC, 0x00806010, 0x00806014 & 0x00806018.
This adds a new property to the device tree to define the device ID
registers for this SoC family.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Add driver and device tree binding for the Low Power Inter-Integrated
Circuit (LPI2C) controllers found in the RV32M1 RI5CY SoC.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Add support for pulsing the hardware reset pin of the FXOS8700 high
during initialization.
According to the datasheet, this is required for the I2C/SPI bus
auto-detection logic to work properly if the VDD/VDDIO power
sequencing order cannot be guaranteed.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2 identical packages were defined for stm32f412 SoC, invariant "g".
Merge them in new sinclge stm32f412Xg.dtsi.
Update matching boards accordinlgy.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Allows to enable initial RTS/CTS hardware flow control
in the dts.
Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Adjusted the MCP2515 driver to switch from KConfig SPI configuration to
DTS based configuration.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
The MCP2515 is a CAN controller that can be connected via SPI to an
host MCU. This driver adds support for the MCP2515 as a new driver in
the CAN subsystem.
As it is a SPI peripheral it uses a thread for its interrupt
handling and the received message filtering is done inside this
interrupt thread, as the MCP2515 filter capabilities are not sufficient
for the Zephyr CAN interface.
The driver was validated with an external CAN logger and the adjusted
CAN sample application.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.
The NS16550 UART driver is modified to use pcie.
pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.
This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.
Deficiencies:
64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.
The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Enable the clock for GPIO ports on the RV32M1 SoC before attempting to
access the port controller registers.
Fixes: #15339
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
SAMD20 does not have the DMA or USB peripherals and as a result
the IRQs for all subsequent lines are shifted down from SAMD21.
This splits the interrupt assignment for the SERCOMs into the
SoC specific DTS file and moves the USB definition to SAMD21 only.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.
Also fixes syntax error caused by a missing );.
Signed-off-by: Josef Gajdusek <atx@atx.name>
The erase-block-size and write-block-size are needed for the spi_nor
driver to compile.
scripts/dts/extract/flash.py automatically adds these properties if
this flash device is part of the "chosen" flash node, but they're
otherwise missing.
Signed-off-by: Jim Paris <jim@jtan.com>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Ports B and C share a common interrupt vector on kw40 and kw41z socs,
but we don't currently have a way to express this in device tree. A
check was added in commit 77cb942a97 that
correctly causes build errors on kw40/41 boards when both ports are
enabled.
Disable the port b interrupt for now until we have a better way to
handle this.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
According to nrf51 and nrf52 specifaction every peripheral is
assigned a fixed block of 0x1000 bytes. Due to that dts for
nrf51 and nrf52 chips have been updated.
The only exception is gpio for nrf52840 where gpio0 and gpio1
share the same memory regions. For this reason, the definition
of gpio for nrf52840 is different from the others.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
On various stm32 soc packages CCM is available and SRAM size
mentionned in datasheet include CCM.
Though, actual SRAM size defined in dtsi files should not
include CCM sizes.
Fix this on impacted dtsi files.
Fixes#14779
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram.
This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping
which is moved to 0x20280000 in order to guarentee global OCRAM memory
continuity regardless OCRAM1 size configuration (256KB by default).
In default configuration, this gives 768KB (512+256) on-chip ram:
0x20200000 to 0x202BFFFF.
OCRAM2: 0x20200000 - 0x2027FFFF
OCRAM1(FlexRam): 0x2028FFFF - 0x202BFFFF
Add this memory region as a single node in the rt1060 device tree.
Note: MPU expects power of two memory region, in case of 768KB, let
the MPU configure 1MB instead.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
uart4 is not available on whole stm32f4 series (not on stm32f401
for instance), remove from stm32f4.dtsi
It is actually correctly defined in f405, f413 but missing in f446,
so add it in there.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
1. SW PWM device node added to common nrf5_common.dtsi
2. SW PWM node set in all nRF5x DTSI files.
Different initial settings for nRF51 and nRF52 devices.
Status is ok by default for nRF51.
3. Added yaml binding for Nordic SW PWM node.
4. Set codeowner of nordic dts bindings to @anangl
Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
After commit 'scripts/dts: Never ignore properties in
generate_node_defines()', pointless entries for 'interrupt-names'
properties show up in generated_dts_board.conf and
generated_dts_board_fixups.h, because many bindings specify
'generate: define' for 'interrupt-names'.
If 'generation: define' is taken as "generate #define's for this
particular property", then only the 'interrupts' property ought to have
'generation: define'. Having it on both 'interrupts' and
'interrupt-names' makes you wonder what it would mean to only have it on
one of them.
Things get a bit confusing since 'interrupt-names' is still used when
determining the macro names generated for 'interrupts', but it's
probably best to have 'generation: define' work in a consistent way
still (and never be a no-op).
Remove 'generation: define' from all 'interrupt-names' bindings.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In the recent MDK brought by nrfx 1.6.2, these legacy peripherals have
been revealed as available also in nRF52810. This patch allows their
use in Zephyr drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On currently supported stm32f3 chips,
erase-block-size = 2048
write-block-size = 2
Set these property in stm32f3 series root dtsi file.
Fixes#9686
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The 'partition\d+:' definition might be a leftover from an older way of
handling partitions. There are no 'partition[0-9]' properties anywhere
in the DTS files.
The reason I want to get rid of this is that it's the only place where
you get a 'properties:' nested inside inside a 'properties:'. That's an
undocumented feature, and removing it will make generate_node_defines()
much simpler (non-recursive).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
- Regexes (e.g. 'pinctrl-.*') are supported in property names in
bindings, but it was undocumented
- Remove the mention of 'generation: structure'. The only implemented
output format is #define's.
- Clean up the language a bit and move related stuff so that it appears
together
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add nvs support to nucleo_f091rc board. This requires to
add erase-block-size property to stm32f0.dtsi.
Storage partition is set to 4kb at the end of the flash.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Initial support for Microchip MEC1701 series is incorporated to the
tree. Additional support for UART is also included. This SOC supports
two operation modes for interrupts (Direct and Aggregated). For this
commit, the interrupts are configured in direct mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Add support to STM LIS2DW12 3-axis accelerometer driver.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Co-authored-by: Mario Tesi <mario.tesi@st.com>
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We've removed all references to base_label in dts bindings and are
removing the functionality. We should depend on DT_ prefixed defines
going forward.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We aren't using the defines generated by base_label for this device and
we should use DT_ prefixed ones if/when we do.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The values for the registers like GDV, SDV and Boarder Waveform
depend on the panel and display controller. Add DT properties
and obtain such values from DT.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
The PWM driver can only control channels 1-3 of the PWM peripheral, not
channel 0. This is an artifact of the peripheral's design.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
This patch adds basic support for the PWM devices available on the Atmel
SAM family. Beside enabling the driver, everything is selected through
the device tree, including enabling the PWM0 and PWM1 devices. Thus
CONFIG_PWM_0 and CONFIG_PWM_1 are ignored.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer)
peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Adds device tree bindings and nodes for the rocktech lcd module used on
imx rt boards. The use of port, endpoint, and remote-endpoint properties
follow what is currently done in linux, but they are not yet used in
zephyr because some additional plumbing is needed in the
extract_dts_includes.py script.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds device tree bindings for the imx enhanced LCD interface (eLCDIF)
controller. The compatible is reused from linux.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Configure the SiFive Freedom SoC to bind to the I2C Peripheral.
Note: The FE310-G000 used on the HiFive 1 does not posess the I2C
peripheral. However, the FE310 platform can have an I2C device memory
mapped in the location described in riscv32-fe310.dtsi.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Driver for the I2C peripheral in the SiFive Blocks RTL
Repository (https://github.com/sifive/sifive-blocks).
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>