dts: stm32: Add WWDG in STM32 dtsi files
Added System WWDG support for STM32 devices. Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
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14 changed files with 151 additions and 0 deletions
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017 RnDity Sp. z o.o.
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -164,6 +165,15 @@
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label = "IWDG";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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timers1: timers@40012c00 {
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compatible = "st,stm32-timers";
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reg = <0x40012c00 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017 Linaro Limited
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -162,6 +163,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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timers1: timers@40012c00 {
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compatible = "st,stm32-timers";
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reg = <0x40012c00 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2018 qianfan Zhao
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -145,6 +146,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017 I-SENSE group of ICCS
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -111,6 +112,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40013800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40013800 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017 Linaro Limited
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -119,6 +120,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2018 Yurii Hamann
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -149,6 +150,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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@ -1,6 +1,7 @@
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/*
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* Copyright (c) 2019 Philippe Retornaz <philippe@shapescale.com>
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* Copyright (c) 2019 ST Microelectronics
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -104,6 +105,15 @@
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};
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40013800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40013800 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2019 Linaro Limited
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -157,6 +158,15 @@
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};
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};
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wwdg1: watchdog@50003000 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x50003000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000800>;
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interrupts = <0 7>;
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status = "disabled";
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label = "WWDG_1";
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};
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2018 Endre Karlson <endre.karlson@gmail.com>
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -110,6 +111,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40013800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40013800 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2019 Linaro Ltd.
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -141,6 +142,15 @@
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};
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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interrupts = <0 7>;
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status = "disabled";
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label = "WWDG";
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};
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rcc: rcc@40023800 {
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compatible = "st,stm32-rcc";
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#clock-cells = <2>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017 Linaro Limited
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -103,6 +104,15 @@
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status = "disabled";
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40013800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40013800 0x400>;
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/*
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* Copyright (c) 2019 STMicroelectronics
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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};
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};
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wwdg1: watchdog@4000a000 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x4000A000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG_1";
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interrupts = <0 7>;
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status = "disabled";
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};
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spi1: spi@44004000 {
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compatible = "st,stm32-spi-fifo";
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reg = <0x44004000 0x400>;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2019 Linaro Limited
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* Copyright (c) 2019 Centaur Analytics, Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -112,6 +113,15 @@
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};
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};
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wwdg: watchdog@40002c00 {
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compatible = "st,stm32-window-watchdog";
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reg = <0x40002C00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000800>;
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label = "WWDG";
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interrupts = <0 7>;
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status = "disabled";
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};
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usart1: serial@40013800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40013800 0x400>;
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21
dts/bindings/watchdog/st,stm32-window-watchdog.yaml
Normal file
21
dts/bindings/watchdog/st,stm32-window-watchdog.yaml
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# Copyright (c) 2019 Centaur Analytics, Inc
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# SPDX-License-Identifier: Apache-2.0
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title: STMicroelectronics STM32 system window watchdog driver
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description: >
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This is a representation of the STM32 system window watchdog
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compatible: "st,stm32-window-watchdog"
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include: base.yaml
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properties:
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reg:
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required: true
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label:
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required: true
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clocks:
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required: true
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