drivers: spi: Add STM32G4X SPI support
Add SPI driver support for STM32G4X SoC series. Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
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4ce35300c8
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794606f866
4 changed files with 59 additions and 1 deletions
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@ -19,7 +19,7 @@ config SPI_STM32_HAS_FIFO
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bool
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depends on (SOC_SERIES_STM32L4X || SOC_SERIES_STM32F0X || \
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SOC_SERIES_STM32F3X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32MP1X || \
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SOC_SERIES_STM32WBX)
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SOC_SERIES_STM32WBX || SOC_SERIES_STM32G4X)
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default y
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config SPI_STM32_INTERRUPT
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@ -206,6 +206,39 @@
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label= "I2C_3";
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};
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spi1: spi@40013000 {
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compatible = "st,stm32-spi-fifo";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40013000 0x400>;
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interrupts = <35 5>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
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status = "disabled";
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label = "SPI_1";
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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status = "disabled";
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label = "SPI_2";
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi-fifo";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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label = "SPI_3";
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};
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};
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};
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@ -149,4 +149,25 @@
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#define DT_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40007800_CLOCK_BITS
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#define DT_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40007800_CLOCK_BUS
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#define DT_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
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#define DT_SPI_1_IRQ_PRI DT_ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
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#define DT_SPI_1_NAME DT_ST_STM32_SPI_FIFO_40013000_LABEL
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#define DT_SPI_1_IRQ DT_ST_STM32_SPI_FIFO_40013000_IRQ_0
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#define DT_SPI_1_CLOCK_BITS DT_ST_STM32_SPI_FIFO_40013000_CLOCK_BITS
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#define DT_SPI_1_CLOCK_BUS DT_ST_STM32_SPI_FIFO_40013000_CLOCK_BUS
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#define DT_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
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#define DT_SPI_2_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
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#define DT_SPI_2_NAME DT_ST_STM32_SPI_FIFO_40003800_LABEL
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#define DT_SPI_2_IRQ DT_ST_STM32_SPI_FIFO_40003800_IRQ_0
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#define DT_SPI_2_CLOCK_BITS DT_ST_STM32_SPI_FIFO_40003800_CLOCK_BITS
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#define DT_SPI_2_CLOCK_BUS DT_ST_STM32_SPI_FIFO_40003800_CLOCK_BUS
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#define DT_SPI_3_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS
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#define DT_SPI_3_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY
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#define DT_SPI_3_NAME DT_ST_STM32_SPI_FIFO_40003C00_LABEL
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#define DT_SPI_3_IRQ DT_ST_STM32_SPI_FIFO_40003C00_IRQ_0
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#define DT_SPI_3_CLOCK_BITS DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BITS
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#define DT_SPI_3_CLOCK_BUS DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BUS
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/* End of SoC Level DTS fixup file */
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@ -48,6 +48,10 @@
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#include <stm32g4xx_ll_lpuart.h>
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#endif /* CONFIG_SERIAL_HAS_DRIVER */
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#ifdef CONFIG_SPI_STM32
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#include <stm32g4xx_ll_spi.h>
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#endif
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#ifdef CONFIG_I2C
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#include <stm32g4xx_ll_i2c.h>
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#endif /* CONFIG_I2C */
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