soc: arm: st_stm32: stm32l1: Add RTC/Counter support
Add RTC/Counter support for STM32L1 SoCs. Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
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8f7441b58d
commit
4f79e31566
4 changed files with 24 additions and 1 deletions
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@ -30,7 +30,8 @@ LOG_MODULE_REGISTER(counter_rtc_stm32, CONFIG_COUNTER_LOG_LEVEL);
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|| defined(CONFIG_SOC_SERIES_STM32F3X) \
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|| defined(CONFIG_SOC_SERIES_STM32F7X) \
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|| defined(CONFIG_SOC_SERIES_STM32WBX) \
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|| defined(CONFIG_SOC_SERIES_STM32G4X)
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|| defined(CONFIG_SOC_SERIES_STM32G4X) \
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|| defined(CONFIG_SOC_SERIES_STM32L1X)
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#define RTC_EXTI_LINE LL_EXTI_LINE_17
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#endif
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@ -28,6 +28,16 @@
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};
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soc {
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rtc: rtc@40002800 {
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compatible = "st,stm32-rtc";
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reg = <0x40002800 0x400>;
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interrupts = <41 0>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>;
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prescaler = <32768>;
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status = "disabled";
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label = "RTC_0";
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};
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usart2: serial@40004400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004400 0x400>;
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@ -130,4 +130,10 @@
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#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
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#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
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#define DT_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
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#define DT_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
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#define DT_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0
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#define DT_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
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#define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS
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#define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS
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/* End of SoC Level DTS fixup file */
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@ -51,6 +51,12 @@
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#include <stm32l1xx_ll_i2c.h>
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#endif
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#if defined(CONFIG_COUNTER_RTC_STM32)
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#include <stm32l1xx_ll_rtc.h>
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#include <stm32l1xx_ll_exti.h>
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#include <stm32l1xx_ll_pwr.h>
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#endif
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#ifdef CONFIG_SPI_STM32
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#include <stm32l1xx_ll_spi.h>
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#endif
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