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soc: arm: st_stm32: stm32l1: Add RTC/Counter support

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Add RTC/Counter support for STM32L1 SoCs.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
This commit is contained in:
Manivannan Sadhasivam 2019-09-07 14:42:02 +05:30 • committed by Maureen Helm
commit 4f79e31566
4 changed files with 24 additions and 1 deletions
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3
drivers/counter/counter_ll_stm32_rtc.c
View file

@ -30,7 +30,8 @@ LOG_MODULE_REGISTER(counter_rtc_stm32, CONFIG_COUNTER_LOG_LEVEL);
|| defined(CONFIG_SOC_SERIES_STM32F3X) \
|| defined(CONFIG_SOC_SERIES_STM32F7X) \
|| defined(CONFIG_SOC_SERIES_STM32WBX) \
|| defined(CONFIG_SOC_SERIES_STM32G4X)
|| defined(CONFIG_SOC_SERIES_STM32G4X) \
|| defined(CONFIG_SOC_SERIES_STM32L1X)
#define RTC_EXTI_LINE LL_EXTI_LINE_17
#endif

10
dts/arm/st/l1/stm32l1.dtsi
View file

@ -28,6 +28,16 @@
};
soc {
rtc: rtc@40002800 {
compatible = "st,stm32-rtc";
reg = <0x40002800 0x400>;
interrupts = <41 0>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>;
prescaler = <32768>;
status = "disabled";
label = "RTC_0";
};
usart2: serial@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;

6
soc/arm/st_stm32/stm32l1/dts_fixup.h
View file

@ -130,4 +130,10 @@
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
#define DT_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
#define DT_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0
#define DT_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS
#define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS
/* End of SoC Level DTS fixup file */

6
soc/arm/st_stm32/stm32l1/soc.h
View file

@ -51,6 +51,12 @@
#include <stm32l1xx_ll_i2c.h>
#endif
#if defined(CONFIG_COUNTER_RTC_STM32)
#include <stm32l1xx_ll_rtc.h>
#include <stm32l1xx_ll_exti.h>
#include <stm32l1xx_ll_pwr.h>
#endif
#ifdef CONFIG_SPI_STM32
#include <stm32l1xx_ll_spi.h>
#endif