Put shield configuration Kconfig flags in new Kconfig.defconfig.
This way shield BLE subsystem can now be selected by application
using NETWORKING symbol, similarly to what is done when modem is
directly present on board.
Additionally, move board Kconfig files to a similar scheme where
shields related Kconfig flags are made available under shield,
board and NETWORKING symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Put shield configuration Kconfig flags in new Kconfig.defconfig.
This way shield BLE susbystem can now be selected by application
using BT symbol, similarly to what is done when BlueNRG ship is
directly present on board.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
To make use of shields Kconfig.defconfig, parse these files
and newly created Kconfig.shield files which will define the
SHIELD_XXX Kconfig symbols that will be used for conditional
configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add Add STM32_OSPEEDR_VERY_HIGH_SPEED flag for SPI1_SCK to function
properly. This is needed for the proper communication with the LoRa
modem. Without this flag, the received data is mangled when burst
read is performed.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The CONFIG_UP_SQUARED_{ATOM,CELERON,PENTIUM} symbols are unused after
commit c5e582038c ("boards/x86/up_squared: default to new local APIC
timer").
Since these symbols are the only thing in boards/x86/up_squared/Kconfig,
which is osource'd in in board/Kconfig, just remove the entire file.
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This adds support for the EC (embedded controller) on a Google
reference board with codename "kukui". This board uses the STM32F098RC
chip. We built an application for the board and verified UART
functionality on the board.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Setup manual was modified, added detailed description how to launch
and program board, added more photos for better understanding
of the setup process.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
Edited the index.rst file to say spi functionality is included. Also
edited the .yaml file in the boards directory to support spi for sanity
tests.
Signed-off-by: Jose Manuel Pacheco Luna <manuel.pacheco@nxp.com>
Added in enablement for the SPI-0 instance pins, as found in the
board schematic files. These connect to the arduino headers on the
front of the board.
Signed-off-by: Jose Manuel Pacheco Luna <manuel.pacheco@nxp.com>
Add the green LED on the back of the reel_board to the device tree and
add PWM support for the front RGB LED.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add at86rf233 dts binding to enable IEEE 802.15.4 driver. The driver is
managed by sercom-4 at chip level.
see: SAM-R21_G.pdf section: 5.2 Internal Multiplexed Signals
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
MX25R64 supports maximum 33 MHz clock for READ operations in
high-performance mode. The previous 80 MHz speed should have been
8 MHz and was for DSPI/QSPI operations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit removes any ignored testing tags for working tests.
In the future, this ignored testing tag list will be further reduced
as critical bugs for the qemu_cortex_r5 platform are addressed
(see #20217).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds a temporary hack to support CI testing of the
qemu_cortex_r5 platform.
The Xilinx QEMU, required to run the tests for this platform, is
currently not available in the default SDK for CI (version 0.10.3) and
attempting to run any tests with the AArch64 QEMU included in this SDK
will cause failures (see #20217).
Since the latest SDK (version 0.11.0-alpha-8) has been added to the CI
image to allow initial testing, this hack automatically detects this
and uses the Xilinx QEMU for testing the qemu_cortex_r5 platform.
When the Zephyr SDK 0.11.0 is available as the default SDK for CI in
the future, this commit should be reverted.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit modifies the 'qemu_cortex_r5' board qemu emulation to use
the arm-generic-fdt machine with the Xilinx-provided zcu102 device tree
instead of the hard-coded xlnx-zcu102 machine, which is very primitive
and cannot properly emulate the Cortex-R5 RPU of ZynqMP.
The QEMU zcu102 FDT (fdt-single_arch-zcu102-arm.dtb) in this commit was
generated from the v2019.2 release of the Xilinx/qemu-devicetrees.
Zephyr SDK version 0.11 Alpha 4 or above is required to use this, as
arm-generic-fdt is supported only by the Xilinx QEMU fork which was
added to the Zephyr SDK in the version 0.11 Alpha 4.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add support for the ST STM32G0316-DISCO development board. This board
features an ST STM32G031J6 MCU on a breakable SO8 to DIL8 module, a user
LED and a button.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
SOC_FAMILY_NRF has no prompt. Assignments in configuration files have no
effect on symbols without prompts. A prompt means the symbol is
user-configurable.
SOC_FAMILY_NRF is instead enabled indirectly through being selected by
other symbols.
Detected through some work-in-progress improved error checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.
Changes:
- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test
Test: spi_loopback test passed
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Low frequency and high frequency clocks had separate devices
while they are actually handled by single peripheral with single
interrupt. The split was done probably because opaque subsys
argument in the API was used for other purposes and there was
no way to pass the information which clock should be controlled.
Implementation changes some time ago and subsys parameter was
no longer used. It now can be used to indicate which clock should
be controlled.
Change become necessary when nrf5340 is taken into account where
there are more clocks and current approach would lead to create
multiple devices - mess.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This commit targets solving issue #17731 over the LL_SW_SPLIT
arch of the BLE stack in Zephyr. This functionality is exposed
to the user as HCI Zephyr Command extensions
- BT_HCI_OP_VS_WRITE_TX_POWER_LEVEL
- BT_HCI_OP_VS_READ_TX_POWER_LEVEL
which enable Tx power read/write operations within BLE radio events
on a per role/connection basis.
The functionality is enabled upon the Kconfig advanced configuration
triggered by
- BT_CTLR_TX_PWR_DYNAMIC_CONTROL
depending on the enablement of Zephyr HCI vendor-specific command
extensions.
Necessary low-level radio HAL functionality and power definitions
are also supplied to address the high-level functionality of
controlling the Tx power.
Signed-off-by: Andrei Stoica <stoica.razvan.andrei@gmail.com>
Renames the lpc usart shim driver to more accurately reflect the
flexcomm hardware IP and to prepare for instantiating it on an SoC
outside the LPC family.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Configure as GPIOs pins that by default are not GPIOs
Enable pinmux for port F
Enable ADC, PWM drivers by default, but keep SPI disabled.
Swap I2C instances since I2C0 is multiplexed with UART2
Select VTR3 as 1.8V
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
EEPROM drivers that support STM32L1 have been tested
on 96b_wistrio boards.
EEPROM support is added to the board documentation.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fetch HW models from a new west module.
And, remove all pre-west glue which was used to:
* Fetch them in CI
* Validate their vesion
* Modify the include path and link to them
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Adds a device tree nexus node to define which gpio pins are mapped from
the soc to the arduino header.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a device tree nexus node to define which gpio pins are mapped from
the soc to the arduino header.
The frdm_kw41z board excludes the arduino A0 pin because it cannot be
muxed as a gpio on the soc.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables the high-speed spi instance 8 on the lpcxpresso55s69 board.
Configures pinmuxes and clocks, and updates board documentation
accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
64BIT has no prompt. Assignments in configuration files have no effect
on symbols without prompts. A prompt means the symbol is
user-configurable.
64BIT is instead enabled indirectly through being selected by
BOARD_QEMU_RISCV64, which is enabled in the same configuration file.
Detected through some work-in-progress improved error checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
CPU_MINUTEIA has no prompt. Assignments in configuration files have no
effect on symbols without prompts. A prompt means the symbol is
user-configurable.
CPU_MINUTEIA is instead enabled indirectly through being selected by
other symbols.
Detected through some work-in-progress improved error checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
USE_CODE_PARTITION is a bit vague as a symbol name ("use code partition
how?"). Rename it to USE_DT_CODE_PARTITION to make it clearer that it's
about devicetree.
This would break any third-party configuration files that set it, but
it'll generate an error since kconfig.py promotes warnings to errors, so
it's probably not a big deal.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In board pinmux.c ifdef of the form DT_GPIO_KEYS_SWx_GPIO_CONTROLLER
should be DT_GPIO_KEYS_SWx_GPIOS_CONTROLLER.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The original v1.3 had MMA8653+MAG3110, but v1.5 has verified LSM303AGR
and theoretical FXOS8700. Add the v1.5 variant 1 nodes in disabled
form; they can be enabled through overlays.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Created MEC1501 deep and light sleep example for MCHP MEC1501.
Modifications were made to SoC, board, timer, and hello world
sample program. Power management split into SoC power
implementing the interface and device power for device specific
logic.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Extended flash simulator for posix architecture to read/write data
from a binary file on the host file system.
Further enable the flash simulator by default on native_posix(_64)
boards and updated the documentation accordingly.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
olimexino_stm32 board doesn't have a
debugger. Now that stm32flash
runner is available, let's use it.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
SOC_FAMILY_ARM has no prompt. Assignments in configuration files have no
effect on symbols without prompts. A prompt means the symbol is
user-configurable.
SOC_FAMILY_ARM is instead enabled indirectly through being selected by
other symbols.
Detected through some work-in-progress improved error checking.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Commit ceffca2c42 added DTS support for board LEDs and buttons. Remove
redundant LED0_GPIO_PORT, SW0_GPIO_NAME, etc. defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add dts configs for bt-c2h-uart and bt-mon-uart. These are used by
the hci_uart sample and BT_DEBUG_MONITOR.
Signed-off-by: Rubin Gerritsen <Rubin.Gerritsen@nordicsemi.no>
In order to avoid a warning from Sphinx complaining that the
supported_features.rst file is not included in any ToC, rename it to
.txt so that Sphinx understands that this is only a snippet to be
included in other files.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The HiFive1 boards power up using a 32 KiHz low frequency kernel, so
have a cycle rate of 32768 Hz. The board definitions have not been
revisited since the Zephyr default for ticks-per-second increased from
100 to 10000. The timer system on the board does not operate
correctly at 4 cycles per tick, but does at 328 cycles per tick.
To support functional timers while keeping system milliseconds in sync
with clock time set ticks-per-second to 128.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
For consistency with all other boards, make the `buttons` node a child
of the root node, not the `leds` one.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On LSM6DSO sensor the INT1 pin is used for both generating the drdy
interrupt and for switching to I3C hotjoin mode just after reset if
it is at logical '1' level. If you reset the x_nucleo_shield3 board
the LSM6DSO enter in hot join, as INT1 '1' level is preserved by
the level shifter.
This commit switch to INT2 to generate DRDY interrupt, so that INT1
always remain to logical '0' level.
Fixes: #20933
Signed-off-by: Armando Visconti <armando.visconti@st.com>
mps2_an521 is the default board for ARMv8-M architecture with
support for Security Extension, and CI should test building and
running samples and tests on this board by default. As the focus
is on kernel, userspace, and arm test suites, certain tags are
set to be ignored when testing on this platform.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In Zephyr we have the rule of "do not use stdint defined types",
but unfortunately that leaves us with no properly defined
format specifiers for printing values out.
So cast to stdint types in this expression to actually be able to
do so.
Fixes Coverity CID: 205798
Fixes Coverity CID: 205825
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
When building with support for BLE stack on the nRF5340 APP CPU
(Application MCU), use RPMsg HCI driver by default.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
When building with support for BLE stack, enable the BT_ECC
for the nRF5340 NET CPU (Network MCU).
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
When building with support for BLE stack, enable the Vendor Specific
commands for the nRF5340 APP CPU (Application MCU).
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Provide the mapping from FE310-G002 GPIO pins to the Arduino Uno
headers. Note where pins have pre-assigned functions that may
interfere with use as GPIOs with the default pinmux assignments.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Adds missing items to the list of supported features for all nxp imx rt
boards. These features were already supported, just missing from the
list.
This change increases the number of samples and tests that sanitycheck
selects for these boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Sorts the list of supported features in alphabetical order for all nxp
boards. No features are added or removed.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Link to Nordic Semiconductor Infocenter, instead of DocLib
in the documentation for nRF-based Development Kits.
Change Nordic Semi to Nordic Semiconductor in the
DK figure captions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Some people are behind firewalls that prevent them
from doing ssh connections.
Change the default BabbleSim fetching instructions to
be over https which should work for everybody.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
A partition start offsets should be expressed relative to the flash
device base address. For cpunet flash partitions start offsets
were improperly expressed as absolute flash address.
This patch fixes partitions start addresses for nRF5340 cpunet.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Since the nRF5340 DK contains the required DC/DC circuitry,
enable it by default while keeping it configurable. This
reduces power consumption in application core , network
core and high voltage use.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Explicitly configures the rgb led pinmuxes as gpios. Currently the gpio
driver quietly changes the pinmux to gpio mode when configuring a gpio
pin, but this behavior is about to change.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some board description files failed to note where gpio was supported,
causing tests to be inappropriately filtered. Add the feature where
the gpio_basic_api test would use it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Name convention for nordic USB driver changed
Kconfig files for custom boards have to be udapted accordingly.
Changes affect only name convention change.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This commit adds support for nRF52833 development board.
Changes afffects:
- Introduce files related to board description.
- Add blank documentation file (for future update).
- configuration files for build process.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This commit enables CAN support for the Olimexino STM32 board.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
commit 0df4a53107 changed the behavior of
how openocd commands are passed to openocd. We used to add -c to each
command, now the commands are being added without -c causing an error.
This adds "-c" to all commands instead of just passing a list.
Also fixes#20449.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Provide information required to allow the driver to put the flash chip
into a deep power down mode. This can reduce standby current by as
much as 90%.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The SPI NOR driver requires that the size (in bits) be provided in the
devicetree node. Update the binding to make the property required,
and update all nodes based on the memory chip identified.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The races are believed to be resolved with the patch to
irq_offload(). Allow the MMU to be turned on and enable
it for qemu_x86_64.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We add the functionality that allows the nRF5340 Application
MCU to boot the Network MCU by releasing the RESET line. The
Application MCU may optionally allocate and corfigure resources
that the Network MCU is going to use (currently GPIO and secure
attribution) if running in secure mode. Non-Secure Application
MCU firmware can only issue Network MCU resets.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When building with support for BLE stack, enable
the BLE Controller module for the nRF5340 DK NRF5340
CPUNET (Network MCU).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enables the arm v7m mpu on the efr32mg soc and the board
efr32mg_sltb004a.
Tested on hardware with samples/mpu/mpu_test and
tests/kernel/mem_protect
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Specific SW defined BLE LL parameters need to be set
if the user enables it on this platform. As such, conditionally
enable them directly into the defconfig.
INTMUX CH2 and CH3 are not available to be used if BT support
is enabled on Vega, because they are used internally by the
BLE SW LL
Signed-off-by: David Leach <david.leach@nxp.com>
Since the experimental BLE software link layer is enabled on
the VEGABoard, add some information about it, as well as the
limitations.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Having a pin toggle when the code reaches a certain point
is really useful for debugging; the infrastructure is already
in place for Nordic boards, so just build upon and enable the
mechanism on the Vega board as well.
Signed-off-by: David Leach <david.leach@nxp.com>
Update the models revision used for building so that nrf52_bsim
can be used with nrfx 2.0.0.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Calls to nrfx HAL functions in various nRF platform related source
files are complemented with pointers to relevant peripherals.
Additionally, TIMER HAL functions that got renamed in nrfx 2.0.0 are
updated in the qemu_cortex_m0 board supporting code.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When calling posix_print_error_and_exit()
a return != 0 was not provided to the shell
This was due to thee way the tracing functions call back
into the main app exit function, assuming that callback
will return.
But in the SOC_INF boards, that function does
not return, and the tracing functions never have the
chance to exit(!=0)
Fix it by calling posix_exit() in the wrap function instead.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.
This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The board area was renamed from riscv32 to riscv back in July to
accommodate riscv64 support. Fix the remaining references in
documentation.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Some boards require specific sequences of commands to run which aren't
generally useful for other boards. Add a catch-all runner to handle
these cases.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.
The refactoring strategy used in this commit is detailed in the issue
This commit introduces the following major changes:
1. Establish a clear boundary between private and public headers by
removing "kernel/include" and "arch/*/include" from the global
include paths. Ideally, only kernel/ and arch/*/ source files should
reference the headers in these directories. If these headers must be
used by a component, these include paths shall be manually added to
the CMakeLists.txt file of the component. This is intended to
discourage applications from including private kernel and arch
headers either knowingly and unknowingly.
- kernel/include/ (PRIVATE)
This directory contains the private headers that provide private
kernel definitions which should not be visible outside the kernel
and arch source code. All public kernel definitions must be added
to an appropriate header located under include/.
- arch/*/include/ (PRIVATE)
This directory contains the private headers that provide private
architecture-specific definitions which should not be visible
outside the arch and kernel source code. All public architecture-
specific definitions must be added to an appropriate header located
under include/arch/*/.
- include/ AND include/sys/ (PUBLIC)
This directory contains the public headers that provide public
kernel definitions which can be referenced by both kernel and
application code.
- include/arch/*/ (PUBLIC)
This directory contains the public headers that provide public
architecture-specific definitions which can be referenced by both
kernel and application code.
2. Split arch_interface.h into "kernel-to-arch interface" and "public
arch interface" divisions.
- kernel/include/kernel_arch_interface.h
* provides private "kernel-to-arch interface" definition.
* includes arch/*/include/kernel_arch_func.h to ensure that the
interface function implementations are always available.
* includes sys/arch_interface.h so that public arch interface
definitions are automatically included when including this file.
- arch/*/include/kernel_arch_func.h
* provides architecture-specific "kernel-to-arch interface"
implementation.
* only the functions that will be used in kernel and arch source
files are defined here.
- include/sys/arch_interface.h
* provides "public arch interface" definition.
* includes include/arch/arch_inlines.h to ensure that the
architecture-specific public inline interface function
implementations are always available.
- include/arch/arch_inlines.h
* includes architecture-specific arch_inlines.h in
include/arch/*/arch_inline.h.
- include/arch/*/arch_inline.h
* provides architecture-specific "public arch interface" inline
function implementation.
* supersedes include/sys/arch_inline.h.
3. Refactor kernel and the existing architecture implementations.
- Remove circular dependency of kernel and arch headers. The
following general rules should be observed:
* Never include any private headers from public headers
* Never include kernel_internal.h in kernel_arch_data.h
* Always include kernel_arch_data.h from kernel_arch_func.h
* Never include kernel.h from kernel_struct.h either directly or
indirectly. Only add the kernel structures that must be referenced
from public arch headers in this file.
- Relocate syscall_handler.h to include/ so it can be used in the
public code. This is necessary because many user-mode public codes
reference the functions defined in this header.
- Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
necessary to provide architecture-specific thread definition for
'struct k_thread' in kernel.h.
- Remove any private header dependencies from public headers using
the following methods:
* If dependency is not required, simply omit
* If dependency is required,
- Relocate a portion of the required dependencies from the
private header to an appropriate public header OR
- Relocate the required private header to make it public.
This commit supersedes #20047, addresses #19666, and fixes#3056.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This support is Zephyr RTOS aware, so you can debug threads as well.
Add a CMake fragment which adds openocd support for nrf5 boards which
can also be flashed via JLink. This ought to work for nRF51 and nRF52
based boards at time of writing with openocd 0.10.0 or later (zephyr
SDK 0.10.3 also worked when I tried for nrf52840_pca10056).
Use it from the nRF DKs from Nordic which have interface MCUs with
Segger compatible firmware. I'm also including Thingy:52, even though
it doesn't, to make it easier when connecting to it via a standalone
JLink dongle. The board has a nice connector for that.
I'm leaving non-Nordic boards alone for now because I don't know them.
It's just one line of CMake to add it for other boards, which should
be easy for their maintainers to do.
Suggested-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Introduce a standard watchdog alias 'watchdog0' that can be utilized
by sample/test code in the future. This helps remove the need for
CONFIG_WDT_0_NAME in dts_fixup.h files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_0_ARM_CMSDK_WATCHDOG_LABEL instead of
CONFIG_WDT_0_NAME. This requires we introduce a "label" property in all
the related dts files. Also introduce a standard watchdog alias
('watchdog0') that can be utilized by sample/test code in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
dts pinctrl definitions were pushed in tree without the code
available to deal with it. They have been kept waiting for the
code, but this is taking much more time than initially thought.
So in current zephyr tree, for all STM32 boards, we have pinmux.c
file which is used to configure pins and these files that are
basically no-op. This situation is creating a lot of confusion
especially to new comers, and create useless maintenance effort.
Remove these files for now.
When zephyr will ready to use them, this commit could be reverted.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update shield description and sample to allow testing of LIS3MDL
sensor IRQ pin.
Update sample yaml file to state dependency on arduino_gpio.
Additionally, fix redundant line in sample yaml
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
DMA is now selected by Kconfig symbols in I2S, and DMA_STM32
is selected by DMA in
soc/arm/st_stm32/common/Kconfig.defconfig.series. So remove the
DMA selecting operation here.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Previous defconfig for dma is DMA_STM32F4X in this board, while the new
generic driver uses DMA_STM32 to enable DMA support, and also dma driver
of stm32 now needs HEAP_MEM_POOL_SIZE to be big enough to hold dma
stream instances.
Additional .conf files are added for also adding HEAP_MEM_POOL_SIZE
configuration to two test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Update ccs811 dts binding to include GPIO pins for wakeup, reset, and
interrupt and change driver code to get the GPIO pin and controller
info from DT instead of Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SensorTile.box SPI3 bus hosts the LIS2MDL device connected
in 4-wires mode (full duplex MISO and MOSI lines) by default.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Update vl53l0x dts binding to include GPIO XSHUT pin and change
driver code to get the GPIO pin and controller info from DT instead of
Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Experimentation with RSSI checks of BLE scans confirms that the
antenna switch setting is incorrect on the argon, boron, and xenon
platforms: when PCB is selected, performance is best with a uFL
antenna, and vice-versa. Checks against the Particle OpenThread
firmware confirm that the correct practice is to invert the settings.
Though the SKY 13351 SPDT switch datasheet suggests otherwise it seems
the VCTLx signals are active low.
Switch the sense of all antennal selection output operations.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add details for features exposed via headers.
Add power management recommended setup.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Add support for the NXP TWR-KV58F220M development board. This board
features an NXP MKV58F24 MCU, four user LEDs and four buttons,
potentiometer, two TWRPI headers, and a motor control header.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
1) Add cryptographically secure random functions to provide
FIPS 140-2 compliant random functions.
2) Add name to random function choice selectors to ease
selection in SOC .defconfig files
3) Add bulk fill random functions.
Signed-off-by: David Leach <david.leach@nxp.com>
Putting 'if's directly on the defaults is simpler here.
I'm guessing BOARD should always be "musca_{a,b1}_nonsecure" if it isn't
"musca_{a,b1}", so I removed the condition on the
"musca_{a,b1}_nonsecure" default (turning it into an "else").
Avoiding a top-level 'if'/'depends on' also avoids adding direct
dependencies to the BOARD symbol, which looks a bit neater in the
generated docs (though direct dependencies only matter for symbols that
might be selected/implied).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The 1ms wait time has been shown to not be enough. Increasing to 10ms.
This change has been shown to be necessary after
CONFIG_SYS_CLOCK_TICKS_PER_SEC was changed from 128 to 32768
in https://github.com/zephyrproject-rtos/zephyr/pull/16782
Signed-off-by: Sigurd Olav Nevstad <sigurdolav.nevstad@nordicsemi.no>
This MCU has sectors of size 4096, but some partitions were aligned to
0x800 addresses. MCUBoot detects this incosistency and halts. This patch
fixes the partitions to use properly aligned addresses (multiples of
0x1000).
Signed-off-by: Fabio Utzig <utzig@apache.org>
Use this short header style in all Kconfig files:
# <description>
# <copyright>
# <license>
...
Also change all <description>s from
# Kconfig[.extension] - Foo-related options
to just
# Foo-related options
It's clear enough that it's about Kconfig.
The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)
git ls-files '*Kconfig*' | \
xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Building `smp_svr` for this board results in a build error due to
undefined symbols `DT_NXP_KINETIS_UART_4006D000_*` which are related to
uart3 DTS symbols not being generated. This marks uart3's status as OK.
Signed-off-by: Fabio Utzig <utzig@apache.org>
Enable the MX25R32 SPI NOR Flash on the VEGAboard and provide board
config file for the spi_flash sample.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
This utilizes the newly introduced dediprog west flash runner to flash
the image onto the onboard SPI chip.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).
Go for the most common style:
- Indent properties with a single tab, including for choices.
Properties on choices work exactly the same syntactically as
properties on symbols, so not sure how the no-indentation thing
happened.
- Indent help texts with a tab followed by two spaces
- Put a space between 'config' and the symbol name, not a tab. This
also helps when grepping for definitions.
- Do '# A comment' instead of '#A comment'
I tweaked Kconfiglib a bit to find most of the stuff.
Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Unlike most other GPIO controllers which support 32 pins this device
only supports 16. (There is an SX1508B that has 8 pins, but the
driver doesn't support it.)
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Comparing the output of "west boards" with mentions of boards in build
instructions (:board: boardname) found a couple of incorrect board
references.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Convert the NXP Kinetis ADC12 driver from relying on CONFIG_ADC_n
Kconfig defines to using DT_INST defines for instance configuration.
This resolves the issue of having e.g. ADC12 instances 2 and 3
enabled, but not instance 0.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for 1.8v Low speed connector available on the Wistrio
board inorder to access peripherals in a board independent way.
Following peripherals are supported:
1. 12-GPIOs
2. SPI0
3. UART0
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Add support for 3.3v Low speed connector available on the Carbon
board inorder to access peripherals in a board independent way.
Following peripherals are supported:
1. 8-GPIOs
2. I2C0
3. SPI0
4. UART0
5. UART1
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Add support for 3.3v Low speed connector available on the Wistrio
board inorder to access peripherals in a board independent way.
Following peripherals are supported:
1. 7-GPIOs
2. I2C0
3. UART0
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Unused since commit 7809970c8a ("drivers: counter: cmsdk: Convert to new
DT_<COMPAT>_<INSTANCE> defines"). Kconfig.defconfig leftover.
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Added in commit f9efca4b4f ("boards: riscv32: add LiteX VexRiscV
board"), then never used.
Found with a script.
Also change UART_LITEUART from a 'menuconfig' symbol to a 'config'
symbol, as it's no longer followed by symbols that depend on it
(UART_LITEUART_PORT_0 should have been a plain 'config' too).
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
There are two set of code supporting x86_64: x86_64 using x32 ABI,
and x86 long mode, and this consolidates both into one x86_64
architecture and SoC supporting truly 64-bit mode.
() Removes the x86_64:x32 architecture and SoC, and replaces
them with the existing x86 long mode arch and SoC.
() Replace qemu_x86_64 with qemu_x86_long as qemu_x86_64.
() Updates samples and tests to remove reference to
qemu_x86_long.
() Renames CONFIG_X86_LONGMODE to CONFIG_X86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
posix_soc_if.h is meant to be a private header between
the POSIX ARCH, SOC, and maybe boards,
it should not contain definitions meant to be used directly
by the kernel or app.
Some definitions were placed here due to a dependency moebius
loop.
Unravel that by removing all header dependencies in posix_soc_if.h,
move those definitions out to a more logical place,
and while we are here reduce the amount of users of
irq_offload.h in POSIX arch related code
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
The Thingy:52 has a LIS2DH12 low-power accelerometer on the external
I2C bus. Add the necessary description to devicetree.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Unused since commit 7e96ca5d80 ("i2c: Remove non DTS Kconfig params").
intel_s1000_crb probably isn't getting tested in CI, because Kconfiglib
generated a warning for the symbol no longer being given a type, which
would be turned into an error.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.
config FOO
int
default 3
Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):
For a symbol defined in multiple locations (e.g., in a
Kconfig.defconfig file in Zephyr), it is best to only give the
symbol type for the "base" definition of the symbol, and to use
'default' (instead of 'def_<type>' value) for the remaining
definitions. That way, if the base definition of the symbol is
removed, the symbol ends up without a type, which generates a
warning that points to the other definitions. That makes the extra
definitions easier to discover and remove.
It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.
Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Replace:
dt_chosen_reg_addr
dt_chosen_reg_size
dt_node_reg_addr
dt_node_reg_size
with:
dt_chosen_reg_addr_int
dt_chosen_reg_size_int
dt_chosen_reg_addr_hex
dt_chosen_reg_size_hex
dt_node_reg_addr_int
dt_node_reg_size_int
dt_node_reg_addr_hex
dt_node_reg_size_hex
So that we get the proper formatted string for the type of symbol.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Should be within the 'if BOARD_NATIVE_POSIX`, or USB_NATIVE_POSIX will
get enabled whenever USB is (unless a user value overrides it).
Probably didn't cause any problems, since
boards/posix/native_posix/Kconfig.defconfig is only included for this
board.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Configure the pin connected to edge LED as PWM output.
On the new board version 1507.3 this pin also controls a buzzer.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Now that everything is DT based for I2C drivers we can rename the
CONFIG_I2C_[0..5]_NAME define to DT_I2C_[0..5]_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that all I2C drivers utilize DTS we can select HAS_DTS_I2C in a
common place and don't need to do it per driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update board dts files to add User LED and Button support. Also update
the board yaml file to say the boards support gpio.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add binding for arm,mps2-fpgaio-gpio and update device tree and change
FPGA GPIO init code to utilize device tree defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configures the default instance of the sdhc driver for the
mimxrt1050_evk board so applications don't have to configure it
explicitly. Similarly, enables the gpio instance required by the sdhc
driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We need to be able to specify GPIO flags in devicetree without that
preventing translation from the Arduino specifier to the host GPIO
specifier. Set up to ignore the low 6 bits of the flags field when
matching the child specifier, and to copy those bits to the parent
specifier.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Unused since commit 6fd6b7e50a ("xtensa: remove legacy arch
implementation").
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Duplicate definitions elsewhere have been removed.
A couple functions which are defined by the arch interface
to be non-inline, but were implemented inline by native_posix
and intel64, have been moved to non-inline.
Some missing conditional compilation for z_arch_irq_offload()
has been fixed, as this is an optional feature.
Some massaging of native_posix headers to get everything
in the right scope.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
With this commit we add the option to use jlink for
flashing and running samples & tests on Arduino Due
using jlink. Bossac remains the default option.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Unused since commit 0829ddfe9a ("kbuild: Removed KBuild").
This symbol is the only thing in boards/xtensa/xt-sim/Kconfig,
which gets included via
osource "$(BOARD_DIR)/Kconfig"
in boards/Kconfig, so just remove the entire file.
Found with a script.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The RAK811 module used on this board incorporates STM32L151CB-A SoC,
which has more RAM (32 KiB) compared to its companion STM32L151CB.
Hence, fix the doc, dts and Kconfig to include correct part number.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
We enable Memory Protection on stm32 nucleo_g071rb board,
since the respective SoC series implements the ARM MPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Remove the
# Omit prompt to signify a "hidden" option
comments that appear on some symbols. They seem to have been copy-pasted
at random, as there are lots of promptless symbols that don't have them
(that's confusing in itself, because it might give the idea that the
ones with comments are special in some way).
I suspect those comments wouldn't have helped me much if I didn't know
Kconfig either. There's a lot more Kconfig documentation now too, e.g.
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.
Keep some comments that give more information than the symbol having no
prompt.
Also do some minor drive-by cleanup.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Change default flash size and offset to use the new kconfig function
`dt_chosen_reg_addr` instead of deprecated `dt_hex_val`
Signed-off-by: Alex Tsamakos <alex@actinius.com>
A style was recently added that will allow long narrow lists to display
as three columns across the page (with a responsive design that
self-adjusts based on screen width). This looks much better than a long
list that runs down the page.
Adding this directive before a block (or nested under the directive)
will allow the content to be multi-column:
.. rst-class:: rst-columns
as explained in
https://docs.zephyrproject.org/latest/guides/documentation/index.html
in the Multi-column lists section.
This PR tweaks a few remaining documents that have such long narrow
lists.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add configuration file for the stm32mp157c_dk2.
Beacon, Central are working.
Peripheral is not compiling because of .elf exceeding FLASH region,
else should be working.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add shield x_nucleo_idb05a1.
Tested samples with the disco_l475_iot1 (SPI3 disabled to ensure
to test the shield on SPI1, and not the on-board BlueNRG-MS chip):
Beacon, Central and Peripheral have been tested and are working.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Erwan Gouriou <erwang.gouriou@linaro.org>
Enable RTOS, PS2, PWM and ADC for modular MEC15xx
Add extra step to build flashable image.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Move systick activation in soc/ as a Kconfig.defconfig file and
remove activation in boards _defconfig files.
This will allow to deactivate it in a more flexible way
with upcoming LPTIMER as tick source when power management
features are enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
For some reason UART_2 and UART_3 was not marked "okay" in the device
tree, making use difficult.
I have tested both UARTs on a "blue pill" board (stm32_min_dev_blue)
with both polling and RX/TX interrupts and found them to work as
expected.
Signed-off-by: Tommy Vestermark <tovsurf@vestermark.dk>
The POSIX ARCH delegates some of the tasks which normally
are taken care of by the ARCH to the SOC or BOARD levels.
To avoid changes in the kernel-arch IF propagating into
the arch-soc and arch-board interfaces (which would break
off-tree posix boards) isolate them.
Also move arch inlined functions into the arch.h header,
and out from the headers which specify the posix arch-soc
and arch-board interfaces.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
The specification for these arch APIs is to have them inline,
and the bodies were just oneliners calling another function
anyway.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Re-run with updated script to convert integer literal delay arguments to
k_sleep to use the standard timeout macros.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Set the bus speed to 125000 like the other boards.
Remove the SPI definition.
Move the definition of the oscillator frequency from Kconfig
to the device-tree.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Updated connection info and restructered a bit some paragraphs to stay
consistent with the structure of other boards.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
found some references to files (via :zephyr_file: and :zephyr-app:) that
were moved, so the links were broken
Fixes: #19660
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
DTSpec writes this as a single word, presumably to make it easier to
grep for / more precise. Follow along in the rest of the docs now that
our main DT docs page agrees with this usage.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Add duplicate per-CPU data structures (x86_cpuboot, tss, stacks, etc.)
for up to 4 total CPUs, add code in locore and z_arch_start_cpu().
The test board, qemu_x86_long, now defaults to 2 CPUs.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
And set qemu_x86_long board to build with CONFIG_SMP=y by default.
Apparently two benchmark tests - latency_measure and sys_kernel -
do not work with the SMP scheduler, so those tests are disabled.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Apply same scheme for all nucleo_64 pins boards:
-provide a separate arduino connector dtsi file
-provide complete gpio map
-update board.yaml vs arduino support (i2c, spi and gpio)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add KConfig board support to match board jumper settings
Failing to update bank selection will affect GPIOs tied to VTR3
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
The `pwm-led0` alias is required for building fade_led and blink_led
samples. Add a suitable `pwmleds` definition and the mentioned alias
for all Nordic Semiconductor Development Kits that have a PWM node
with "okay" status.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The incomming new NRF clock driver requires extra nrf HAL
and drivers functions, which are only supported in the HW models
after version 1.8
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Fix a possible leak if `realloc` fails here; check the result of the
`realloc` call before updating the pointer, so it can be freed in the
failure case.
Signed-off-by: Noah Pendleton <noah.pendleton@gmail.com>
Now that we have a QEMU board for Cortex-M0, and set as default,
we do not need to have nrf51_pca10028 as default board.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For the qemu_cortex_m0 we implement a custom system clock
driver based on the nRF51 TIMER peripheral. The system
clock is configured to run at 1 MHz frequency.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit configures the qemu_cortex_m0 board to
build with it's custom timer driver, instead of the
default nrf_rtc_timer driver for nRF51x SoCs. It,
additionally, configures a default system clock
frequency to 1MHz, as well as 10 Hz tick frequency.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds some documentation for the
newly introduced qemu_cortex_m0 platform.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit defines qemu_cortex_m0 board, adding
support for Cortex-M0 in QEMU. The added platform
is based on the (nRF51) bbc_microbit board.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This makes it clearer that this is an API that is expected
to be implemented at the architecture level.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Simple naming change, since MULTIBOOT is clear enough by itself and
"namespacing" it to X86 is unnecessary and/or inappropriate.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Implement a simple ACPI parser with enough functionality to
enumerate CPU cores and determine their local APIC IDs.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Mostly build tests now, will be extended to verify CTF output once we
have this feature in sanitycheck.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds a way to specify a custom SPI configuration file to be
used with the image generation tool. For example, this can be
used to reduce the SPI image size to allow faster flashing
(e.g. 512KB instead of 16MB).
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Configure interrupt gpio information (irq-gpios) into the
x-nucleo-iks01a3 shield overlay file.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit introduces separate "compatible" strings for DTS nodes
representing different types of Nordic SPI peripherals. Previously
"nordic,nrf-spi" was used for both SPI and SPIM. SPIS was already
handled separately.
Quite a few files need to be touched by this commit but the changes can
be divided into groups of related or very similar ones, distinguishable
by the initial part of the path to the modified file:
* dts/bindings/spi/
new binding for "nordic,nrf-spim" is added and common fields for all
3 types of Nordic SPI peripherals are extracted to a shared file
* dts/arm/nordic/
"compatible" properties in spiX nodes are updated (when there is no
choice as only one type of SPI peripheral is available) or replaced
with a comment pointing out that the proper type of peripheral needs
to be picked at some upper layer
* drivers/spi/
spi_nrfx_spim driver is updated with the new form of macros generated
from dts
* boards/
all spiX nodes in dts files for boards equipped with an nRF chip are
updated with the proper "compatible" property, according to the type
of SPI peripheral that is currently selected for the board by the
corresponding Kconfig choice option (SPI_x_NRF_SPI*)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit introduces separate "compatible" strings for dts nodes
representing different types of Nordic TWI peripherals. Previously
"nordic,nrf-i2c" was used for both TWI and TWIM, and TWIS was not
supported.
Quite a few files need to be touched by this commit but the changes can
be divided into groups of related or very similar ones, distinguishable
by the initial part of the path to the modified file:
* dts/bindings/i2c/
new bindings for "nordic,nrf-twim" and "nordic,nrf-twis" are added
and the one for "nordic,nrf-i2s" is renamed to "nordic,nrf-twi",
common fields for all these bindings are extracted to a shared file
* dts/arm/nordic/
"compatible" properties in i2cX nodes are updated (when there is no
choice as only one type of TWI peripheral is available) or replaced
with a comment pointing out that the proper type of peripheral needs
to be picked at some upper layer
* drivers/i2c/
both flavors of i2c_nrfx drivers are updated with the new names of
macros generated from dts
* boards/
all i2cX nodes in dts files for boards equipped with an nRF chip are
updated with the proper "compatible" property, according to the type
of TWI peripheral that is currently selected for the board by the
corresponding Kconfig choice option (I2C_x_NRF_TWI*)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable CMSDK GPIO driver on v2m_musca_b1 SoC/Board. Add LEDs that are
on the board and init the pinmux for those LEDs to work.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Utilize CONFIG_TRUSTED_EXECUTION_NONSECURE to decide if we do pinmux.
This Kconfig option is more useful since we only set the _SECURE
version isn't set if we are ignoring the security mode feature.
Move the LED pinmux setup into the not NONSECURE case.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds support for NXP's Freedom K22 board.
Co-authored-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Co-authored-by: Tom Burdick <thomas.burdick@gmail.com>
Signed-off-by: Tom Burdick <thomas.burdick@gmail.com>
Header files of nrfx HALs are not supposed to be included directly
but only with their names prepended with the hal/ directory (so that
an inclusion of an nrfx HAL header clearly differs from an inclusion
of an nrfx driver header).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The QEMU x86 .dts files were re-arranged before long mode was
merged. We don't need this reference to the flash region anymore.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Removed mec15xxevb_assy6853.jpg as its not used and vastly reduced
the image size as the files were extremely large.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enable LiteX DNA ID driver in litex_vexriscv board.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Map eSPI UART traffic to UART1 on MEC1501 modular board.
Remove unnecessary dts fields
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Enable CMSDK GPIO driver on v2m_musca SoC/Board. Add LEDs that are on
the board and init the pinmux for those LEDs to work.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds an extra step at the end of build to generate a flashable
image using Microchip tool available at:
https://github.com/MicrochipTech/CPGZephyrDocs
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This enables the PWM blocks in DTS. Only PWM0 has been enabled
and tested due to board/jumper configurations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Each and every instance has a specific pin.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add RTC timer driver for CC13X2/CC26X2, and use it instead of systick
as system clock. It is necessary to use this timer for power
management support, so that the system can exit from deep sleep upon
expiry of timeouts.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The SensorTile.box is a board designed for IoT applications
embedding a wide range of intelligent low power MEMS sensors,
a STM32L4 microcontroller to manage sensor configuration and
process sensor output data, a micro-USB battery charging
interface and an ST Bluetooth Low Energy module for wireless
communication with a BLE-enabled smartphone.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
For long lists of items, it's better to use a multi-column display to
make better use of the screen space. We used the hlist directive to
accomplish list, but it has a drawback on small (phone) screens because
under the hood, the rendering is done using tables.
Instead, we can take advantage of built-in CSS multi-column support
available in recent browsers. So, convert uses of the hlist directive
to use an rst-class directive to apply a multi-column class to
the entity. The chosen column-width (18em) gives us a 3-column display
on typical window sizes, but will adjust to more or fewer columns
depending on the actual real estate available.
Also, update the documentation guidelines to mention this change.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Enable PS/2 instances in dts and mux data and clk pins.
It also contains new Kconfig switches for the PS/2 controller
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.
Fixes: #18657
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Enabling of testing/default impacts all PR CIs. There isn't that much
extra value for all PRs to have both native_posix and native_posix_64.
Go with native_posix, since most targets are 32-bit on Zephyr.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* add pinmux driver. hsdk board has arduino, mikrobus and
pmod interfaces, which can be confiured for different function,
such as: gpio, spi, uart, iic.
* add introduction for arduino, mikrobus and pmod interfaces.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Add arduino_header support to nucleo f429zi board.
Create a dedicated connector file to hold arduino connector
information for nucleo_f429zi board.
Add missing arduino_spi feature to yaml file.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Add qemu_x86_long board (with CONFIG_X86_LONGMODE=y) for testing.
This requires adding support to soc/ia32 for long mode (trivial),
and adding a quick 64- to 32-bit ELF conversion before invoking
QEMU, which apparently doesn't like 64-bit kernel files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The commit provides default SWO frequency value for efr32_slwstk6061a
board. The SWO frequency is limited by board hardware to 875 kHz.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
There are 2 other timers that could be selected, let's just take the
first 32bits one. This should be sufficient to verify the driver.
Enabling the timer in relevant board's dts file as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert how we get the various chosen properties like "zephyr,console"
to use the new kconfig functions like dt_chosen_to_label.
Because of how kconfig parses things we define a set of variables of the
form DT_CHOSEN_Z_<PROP> since comma's are parsed as field seperators in
macros.
This conversion allows us to remove code in gen_defines.py for the
following chosen properties:
zephyr,console
zephyr,shell-uart
zephyr,bt-uart
zephyr,uart-pipe
zephyr,bt-mon-uart
zephyr,uart-mcumgr
zephyr,bt-c2h-uart
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configuration item custom busy wait is required for all MEC1501
series if its RTOS timer driver is enabled. We moved the selection
of the timer from board level to MEC1501 SoC level.
Frequency selection remains at the board level.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Enables the arm v7m mpu on the lpc54114 m4 core. Reuses the mpu
configuration from the i.mx rt, which has the same mpu.
Tested on hardware with tests/kernel/mem_protect
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Update configuration of arduino_due board to use a common gpio_sam
driver rather than sam3x specific gpio_atmel_sam3. The gpio_atmel_sam3
driver is going to be deprecated.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
stm32mp157c_dk2 Arduino header lack A2 and A3 pins which
are assigned to non GPIO pins.
Remove optional shields properties that are using one of these
pins by providing board overlays to the impacted shields.
Fixes#19079
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename doc/nucleowb55rg.rst to doc/nucleo_wb55rg.rst so the file name
matches the name of the board it is documenting.
Signed-off-by: Robert Weber <robertweber95@gmail.com>
As recommended in cmake/app/boilerplate.cmake, ZEPHYR_BASE should
be preferred to PROJECT_SOURCE_DIR.
Do the change for all boards still referring to PROJECT_SOURCE_DIR.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
* Exlude _m4target from net tests as they assume SERIAL is enabled,
which is not the case (yet).
Fixes: #19065
* Zephyr drivers headers were moved from include/ to include/drivers.
Update pinmux.h path to the new location.
* Add missing status line on joystick_left dts node.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix nucleo_f411re default configuration by deactivating I2C support.
Additionally fix wrong comment and end of file.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The LIS2MDL is not a combo device, but pure magnotemeter.
Hence, '-magn' extension is not adding information and can
be removed from dts compatible name as well as binding filename.
Instead specify '-i2c' or '-spi' to distinguish between the names.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We re-wrote the xtensa arch code, but never got around
to purging the old implementation.
Removed those boards which hadn't been moved to the new
arch code. These were all xt-sim simulator targets and not
real hardware.
Fixes: #18138
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
From the Jailhouse days, this has been a function call. That's silly.
We now inline the EOI in the ISR when in x2APIC mode. Also clean up
z_irq_controller_eoi(), so it now uses the inline macros.
Also, we now enable x2APIC on up_squared by default.
Fixes: #17133
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
XIP support in x86 was something of a mess. This
patch does the following:
- Generic ia32 SOC no longer defines a "flash" region
as generic X86 devices don't have a microcontroller-
like concept of flash. The same has been done for apollo_lake.
- Generic ia32 and apollo_lake SOCs starts memory at 1MB.
- Generic ia32 SOC may optionally have CONFIG_XIP enabled.
The board definition must provide a flash region definition
that gets exposed as DT_PHYS_LOAD_ADDR.
- Fixed definitions for RAM/ROM source addresses in ia32's
linker.ld when XIP is turned off.
- Support for enabling XIP on apollo_lake SOC removed, there's
no use-case.
- acrn and gpmrb boards have flash and XIP related definitions
removed.
- qemu_x86 has a fake flash region added, immediately after system
RAM, for use when XIP is enabled. This used to be in the ia32 SOC.
However, the default for qemu_x86 is to now have XIP disabled.
- Fixed tests/kernel/xip to run by default on boards that enable
XIP by default, plus an additional test to exercise XIP on
qemu_x86 (which supports it but has XIP switched off by default)
The overall effect of this patch is to:
- Remove XIP configuration for SOC/boards where it does not make
any sense to have it
- Support testing XIP on qemu_x86 via tests/kernel/xip, but leave
it off by default for other tests, to ensure it doesn't bit-rot
and that the system works in both scenarios.
- XIP remains an available feature for boards that need it.
Fixes: #18956
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Update a number of boards that have arduino_gpio and arduino_i2c
support in their dts files to show that they support that in the
board.yaml file. This allows coverage on several shield tests that
utilize the tags 'arduino_gpio' and 'arduino_i2c'.
Exlucde stm32mp157c_dk2 from some of the samples right now since the
connector on the board doesn't support A2/A3. Also remove the duplicate
of exluding disco_l475_iot1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the NXP FRDM-K82F development board. This board
features an NXP MK82FN256VLL15 CPU, a user RGB LED and two buttons,
two 32 Mb QSPI flashes, Arduino R3 compatible headers, and a FlexIO
header.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
Since lpuart4 is enabled by default on mimxrt1015_evk but not configured
in the device tree, this leads to a build error after adding the
instance to the lpuart driver. Adjust the mimxrt1015_evk to be the same
as other mimxrt evk boards and enable the lpuart only if BT_UART is
enabled.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
This patch is to add support for the Pico-Pi board which has an i.MX7D
Dual SoC.
The Zephyr is running on the Cortex M4 core and the following features
were validated on this board:
* UART: Zephyr console
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
- dts updated for UART1/2
- Additional check added to _INIT macro to configure flow control mode
- Additional check added to _INIT macro to set CTS/RTS gpios values
- Additional check added for gpio config
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Fixes#3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig
Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts
- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs
- Old Silicon rev is not supported
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
As a precursor to the new GPIO API in which GPIO_DIR_OUT isn't a dts
flag move setting of GPIO_DIR_OUT from the dts to explicitly in the
code. We remove setting the flag in intel_s1000_crb.dts as part of this
cleanup.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We should use OpenOCD from the latest Zephyr SDK as opposed to using TI
OpenOCD.
There is a known issue with the current release (0.10.2) of the SDK in
how it resets the network processor, but we can deal with it
subsequently.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Moved arduino_spi to spi2
Set sck-pin in arduino_spi correctly as pin 25
Moved disabled spi0 miso pin assignment to pin 28
Signed-off-by: Nick Ward <nick.ward@setec.com.au>
Promote a handy and often-overlooked sys.exit() feature: Passing it a
string (or any other non-int object) prints it to stderr and exits with
status 1.
See the documentation at
https://docs.python.org/3/library/sys.html#sys.exit.
This indirectly prints some errors to stderr that previously went to
stdout.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Simplify two loops in create_memread_cmd() by looping over elements
instead of indices, to fix two pylint warnings.
Fixing warnings for a CI check.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Fix pylint warnings like these:
Comparison to True should be just 'expr' (singleton-comparison)
Comparison to False should be 'not expr' (singleton-comparison)
I checked that GPIO.read() only returns True/False in the
python-periphery docs.
Getting rid of pylint warnings for a CI check.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Doesn't use 'self'. Fixes this pylint warning:
boards/xtensa/intel_s1000_crb/support/messenger.py:50:4: R0201:
Method could be a function (no-self-use)
If this function is meant to be internal to messenger.py, then a better
option than @staticmethod might be to turn it into a regular function.
Fixing pylint warnings for a CI check.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Reported by pylint's 'bad-whitespace' warning.
Not gonna enable this warning in the CI check, because it flags stuff
like deliberately aligning assignments and gets too cultish. Just a
cleanup pass.
For whatever reason, the common convention in Python is to skip spaces
around '=' when passing keyword arguments and giving default arguments:
f(x=3, y=4)
def f(x, y=8):
...
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The project's README.rst references the support board docs with an URL
that's not working these days (see
https://github.com/zephyrproject-rtos/infrastructure/issues/134) so fix
that URL reference. While looking for other similar linking cases, I
found a hard URL references that should be using :ref: role, and a
release notes reference to a (now) broken link (fixing that in the
/latest/ version of the 1.10 release notes).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commit adds a note alluding to the fact that these two boards are
primarily included for use with QEMU, but have been tested on actual
hardware as well where appropriate.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
This commit adds a note alluding to the fact that these two boards are
primarily included for use with QEMU, but have been tested on actual
hardware as well where appropriate.
Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
The documentation for the GPMRB incorrectly made reference to the
up_squared board in its high-speed UART configuration section. We
consolidate the related documentation for all boards based on the
Apollo Lake SoC and adjust the language to be more generic.
Fixes: #18808
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
MEC1501 RTOS timer internal counter is on the 32KHz clock domain.
The register interface is on the AHB clock. When the timer is started
hardware synchronizes to the next 32KHz clock edge resulting is a
variable delay moving the value in the preload register into the
count register. The maximum delay is one 32KHz clock period (30.5 us).
We work-around this delay by checking if the timer has been started
and not using the count value which is still 0. Instead we state zero
counts have elapsed.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
While trying out the hello_world sample built for QEMU, I was expecting
the sample app to exit and I'd return to a command prompt. Nope. You
need to exit QEMU manually, so add that step to the sample instructions.
Looking around, there are more uses of QEMU like this that could use
this added step after running the sample app.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
There are a few non-PNG (JPEG and WebP) files that are being
name as PNG files. This causes pdflatex/latexmk to fail due
to them not actually being PNG files. So rename those files
with correct extensions and update the RST files.
Also converted the WebP file in JPEG as PDFLatex cannot parse
WebP image.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This file was added after the mass status 'ok'->'okay' rename. This
rectifies the situation, in particular as 'ok' is not ok anymore.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
Add 'Shield' to the header to help distinguish the FRDM-KW41Z general
board docs from the shield docs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The MSI PLL mode has been disabled but can be used since LSE is
populated on disco_l475_iot1 board. This is requested to enable
USB device controller support.
Fixes#18717
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Instead of having a mix of west and CMake/ninja instructions for
building and flashing, document it using only west. This will help
clarify that west is the default build tool in Zephyr and should also
reduce confusion over what tool to use.
Note that the biggest change is changing the default in
doc/extensions/zephyr/application.py for :tool:, from all to west.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
To avoid a Coverity warning (203449):
https://github.com/zephyrproject-rtos/zephyr/issues/18354
Initialize a pointer to NULL, and check it later before
de-referencing it.
Coverity could not see that posix_print_error_and_exit()
never returns even that it ends with exit()
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
This commit adds the reel_board canbus shield.
On the shield, there is an MCP2515 and a CAN transceiver.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
This commit enables the pullup on CAN0_RX pin (PORTB 19).
The pullup ensures that the CAN controller initializes even
without a transceiver connected.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
now we use hex file instead of elf file for flash command as
PR #17822 suggested, so enable BUILD_OUTPUT_HEX by default for
board sam_e70_xplained.
Fixes: #18181.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Selection of the HFRCO causes the SOC to stay at its power-up frequency
of 19 MHz. Switch to the HFXO to use the configured frequency.
Closes#17630
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Related to #17997, move an include out of a extern "C" block
Background:
Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.
Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.
See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
* CONFIG_SMP can be enabled by smp application, e.g. tests/kernel/smp
* if application is not designed for smp, CONFIG_SMP can be disabled,
and the target works as a single processor.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Now when SMP support for ARC is available we may introduce a simulation
platform which might be used for testing & development for SMP setups.
One important note is stand-alone nSIM (as well as its "Free" flavour)
doesn't support SMP simulation so we have to switch to use of nSIM via
proprietary MetaWare debugger [1] and so:
1. We introduce new emulation target "mdb"
2. It's only possible to run that platform for those who
have MetaWare tools installed and valid license.
Though QEMU port for ARC is in work at the moment and once we
open that port and it has SMP support we'll switch to it and everybody
will be able to try ARC HS with SMP.
[1] https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit includes the initial support of ARC HS Development Kit:
* hsdk soc support
* hsdk board support
* no mmu support, so no userspace
* smp support
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This adds support for SARA-U2 modems. They have different timings on
the PWR_ON pin, don't support AT+CESQ and require a manual GPRS
connection setup.
The VINT pin is used as a more reliable and faster way to power on the
modem.
Based on work by Göran Weinholt <goran.weinholt@endian.se>
Signed-off-by: Michael Scott <mike@foundries.io>
In nRF9160 the reset pin is a dedicated one, it cannot be configured
as a regular GPIO pin, so this option should not be presented to users
building for this SoC, to not generate confusion.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This driver makes use of the nRF RNG peripheral, so it can be used only
for SoCs that are equipped with one, and not all nRF SoCs are.
The option enabling the driver should then depend on `HAS_HW_NRF_RNG`,
which indicates the presence of this peripheral in a given SoC.
This patch removes also entries disabling this driver in default
configurations for nRF9160 SoC, as these were needed only because
of the invalid dependency of the ENTROPY_NRF5_RNG option.
A minor adjustment of Kconfig files of the nrf52_bsim board was
required as well, so that this board's configuration can properly
handle this corrected dependency.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In order to increase code coverage, we force building a Secure
Firmware image by default (i.e. with option
CONFIG_TRUSTED_EXECUTION_SECURE set), when building for
mps2_an521 board. CONFIG_TRUSTED_EXECUTION_SECURE enables
compiling-in all TrustZone-related code in the tree, that is,
all ARM-specific code inside #ifdef CONFIG_ARM_SECURE_FIRMWARE.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add support for driving the on-board LEDs present on the NXP TWR-KE18F
development board using FlexTimer (FTM) PWM modulation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The number of MPU regions appears to be 16 instead of 8,
so we fix that in the board .dts files.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
So far zephyr.elf file was hardcoded in cmake files. Remove it from
there and use cfg.elf_file from python, which can be overwritten by
specifying --elf-file command line option.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Same deal as in commit a84ded74ea ("dts: Replace status = "ok" with
status = "okay""), for newly introduced stuff.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Route these to the equivalent pins for RXD1 and TXD1 on the Arduino
Mega.
Note that uart0 is routed to the debug probe IC on the nRF9160
DK, and uart1 is routed to where the RXD0 and TXD0 Arduino pins are on
the DK. This makes RXD1/TXD1 a logical place to put these UART pins,
since the header layout for the DK board matches the Arduino mega.
This is also necessary to keep some downstream code compiling which
needs to enable the UART2 but doesn't have a good place to put these
pins, since the new DTS parser is enforcing that all required
properties (like tx-pin and rx-pin in this case) are set for nodes
with status = "okay".
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
- update doc for different core configuration.
- fix some bugs in dts related files.
- add dts config and defconfig for different core configuration.
- end files with a newline in boards/arc/emsdp/board.dtsi
- remove unused head in boards/arc/emsdp/doc/index.rst
- ARC_MPU_VER in different core is fixed. so remove some useless code
for ARC_MPU_VER judgements in Kconfig.defconfig.* files for emsdp
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Enable Mailbox support on 96Boards Avenger96 board. This will help
communicating to CortexA7 core.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Add onboard LEDs on 96Boards Avenger96 board. There are 4 user LEDs
on this board but only 3 are enabled. This is due to the fact that
LED0 is connected to unavailable PortZ. Hence, LED0 is ignored and
remaining LEDs are enabled starting from index 0.
Once PortZ is added, this will be fixed.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
After witnessing some strange errors with memory not being
what it should be, lifiting everything above 1MB has solved
it. The Zephyr binary was being loaded into memory containing
reserved regions, resulting in data corruption.
We still simulate XIP for testing purposes by setting up the
memory map as follows:
0x000000 - 0x0FFFFF : Non-present
0x100000 - 0x4FFFFF : "Flash" ROM region
0x500000 - 0x8FFFFF : "SRAM" RAM region
For a total of 9 megabytes of physical RAM used.
Fixes problems observed in some large tests when code coverage
is enabled (which increases the amount of RAM used even more).
Fixes: #17782
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Removes very complex boot-time generation of page tables
with a much simpler runtime generation of them at bootup.
For those x86 boards that enable the MMU in the defconfig,
set the number of page pool pages appropriately.
The MMU_RUNTIME_* flags have been removed. They were an
artifact of the old page table generation and did not
correspond to any hardware state.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For OpenVega board, in the case of the Zero Riscy core,
the flash partition used for the code and data is the
M0 ARM core's 256KB flash region. This is closest to
the RISC core.
The m0_flash node defines where the interrupt vector
is located for the Zero Riscy core, and one needs to
restrict the application so its interrupt vector is
placed accordingly.
Fixes: 34b0516466 ("boards: riscv32: rv32m1_vega:
enable MCUboot for ri5cy core")
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
It is expressed that the BOARD depends on whether NONSECURE is enabled
or not. But it is the other way around. Depending on the selected
board, it may or may not be possible to enable/disable NONSECURE.
The dependency is going in the wrong direction, this reversed edge is
observed to be able to create a cycle in the dependency graph.
Fix the dependency by removing it.
It is left as future work to enforce that enabling/disabling NONSECURE
is done in a way that is compatible with selecting
BOARD_NRF9160_PCA10090 vs BOARD_NRF9160_PCA10090NS.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The "{d,i}ccm" nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are {d,i}ccm.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add SPI support for stm32mp157c_dk2 board. If SPI is selected, SPI4
(Arduino connector compatible SPI) and SPI5 (on front 2x20 GPIO
expander) will be enable by default on stm32mp157c_dk2 board.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
(This could not be triggered in the nrf52_bsim yet,
so just so it is fixed for the future)
Properly handle converting back and forth from absolute to HW
time when either of those is set to TIME_NEVER
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
System clock for m4 core was set to same clock as m7 core.
This is wrong as m4 its value is actually based on clock frequency
value after D1CPRE (sys_d1cpre_ck) divided per HPRE value, 200MHz in
current case.
This also matches the max clock speed for the m4 core (200MHz)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
cores
In order to prevent potential misconfiguration set the clock setting,
which impacts both cores, under board.defconfig file which is used
by both core.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32 clock control subsystem allows to configure a different
frequency value for core clock (SYSCLK) and AHB clock (HCLK).
Though, it is HCLK which is used to feed Cortex Systick timer
which is used in zephyr as reference system clock.
If HCLK frequency is configured to a different value from SYSCLK
frequency, whole system is exposed to desynchro between zephyr clock
subsytem and STM32 HW configuration.
To prevent this, and until zephyr clock subsystem is changed to be
aware of this potential configuration, enforce AHB prescaler value
to 1 (which is current default value in use for all STM32 based
boards).
On STM32H7, enforce D1CPRE which fills the same role as ABH precaler.
On STM32MP1, the equivalent setting is done on A7 core, so it is
not exposed to the same issue as long as SYS_CLOCK_HW_CYCLES_PER_SEC
is set with the 'mlhclk_ck' clock frequency value. Update
matching boards documentation.
Fixes#17188
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Adapted from similar code in the x86_64 port.
Useful when debugging boot problems on actual x86
hardware if a JTAG isn't handy or feasible.
Turn this on for qemu_x86.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Write all the desired values in the debug control flag.
Initally we were oring it, but this variable does not have
the expected initial values as it also depends on fuse
programming settings, therefore we dont have console.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Allow the user to use software slave select instead of the
hardware pin, in order to free the related GPIO and avoid
unwanted SS triggering on the hardware pin. The default SS
is still the hardware pin.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
ARC nSIM simulates pretty much any modern ARC core,
moreover it emulates a lot of different core features so
it is possible to play with them even wo real hardware.
Thus we add yet another ARC core family to be used on simulated
nSIM board.
For now it's just a basic configuration with ARC UART for
smoke-testing of Zephyr on ARC HS CPUs.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
The ARC HS is a family of high performance CPUs from Synopsys
capable of running wide range of applications from heavy DPS
calculation to full-scale OS.
Still as with other ARC cores ARC HS might be tailored to
a particular application.
As opposed to EM cores ARC HS cores always have support of unaligned
data access and by default GCC generates such a data layout with
so we have to always enable unaligned data access in runtime otherwise
on attempt to access such data we'd see "Unaligned memory exception".
Note we had to explicitly mention CONFIG_CPU_ARCEM=y in
all current defconfigs as CPU_ARC{EM|HS} are now parts of a
choice so we cannot simply select ether option in board's Kconfig.
And while at it change "-mmpy-option" of ARC EM to "wlh1"
which is the same as previously used "6" but matches
Programmer's Reference Manual (PRM) and is more human-friendly.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This will give us a possibility to check unaligned read/write support
in simulation.
Note nSIM with S(ecure)EM (with secure option) doesn't support that
mode in HW.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Musca B1 has 2 x 2MB embedded flash memories (eFlash). The flash
memories are connected to the AHB Master Expansion “Code Interface”.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
This property is only declared in bindings/spi/nordic,nrf-spis.yaml ('s'
for 'slave'), not in bindings/spi/nordic,nrf-spi.yaml.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add the link between the i2c and the arduino connector,
here i2c5.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@linaro.org>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@linaro.org>
I2C5 are used by arduino connector.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@linaro.org>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@linaro.org>
We generated a define for each instance to convey its existance of the
form:
#define DT_<COMPAT>_<INSTANCE> 1
However we renamed all other instance defines to be of the form
DT_INST_<INSTANCE>_<FOO>. To make things consistent we now generate a
define of the form:
#define DT_INST_<INSTANCE>_<COMPAT> 1
We also now deprecate the DT_<COMPAT>_<INSTANCE> form and fixup all uses
to use the new form.
Fixes: #17650
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board and SoC was discontinued some time ago and is currently not
maintained in the zephyr tree.
Remove all associated configurations and variants from the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As we now have PPP support, use more generic "serial-net" string instead
of "slip" when setting what kind of networking the board supports.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Expose eSPI block with interrupts enabled for channel 0 & 1
eSPI handshake has been tested using espi driver sample app
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Add a kernel timer driver for the MEC1501 32KHz RTOS timer.
This timer is a count down 32-bit counter clocked at a fixed
32768 Hz. It features one-shot, auto-reload, and halt count down
while the Cortex-M is halted by JTAG/SWD. This driver is based
on the new Intel local APIC driver. The driver was tuned for
accuracy at small sleep values. Added a work-around for RTOS
timer restart issue. RTOS timer driver requires board ticks per
second to be 32768 if tickless operation is configured.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This was always intended to be a bytestring rather than an array, but
full support was missing. Since that has been addressed switch it to
the preferred format.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Particle released documentation with a pre-release flash chip. Correct
the name to the actual as-sold device, and add the corresponding size
property as well as the has-be32k property. Also add an alias so we
can set partitions externally.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The JEDEC API defines the hardware page, sector, and block sizes.
Deprecate the Kconfig settings, remove the `erase-size-block` property,
and add `has-be32k` to indicate that 32K-byte erase is supported.
Rework the driver to use the constants instead of configured values.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The uart node in the native_posix dts has a reg property, but there are
no registers associated with the uart. So remove the property and
remove the unit address associated with the reg (now that its removed).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Clarify a little bit how to fetch and compile Babblesim.
So users will not need to have repo installed,
and to guide them to add the variables to their shell init
script
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
The property is required on all SPI clients, but was missing from
several devicetree nodes. Set it, using the capitalized version of the
node alias when present, with "jedec,spi-nor#0" as the fallback.
Closes#17662
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The binding for arm,cmsdk-timer requires a label so add it into the dts
since its missing on v2m_musca_b1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The bindings for arm,cmsdk-{d}timer requires a label so add it into the
dts since its missing on mps2_an521.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
spi-max-frequency is marked as required in
dts/bindings/mtd/jedec,spi-nor.yaml.
I took the value from the datasheets (133 MHz for all), and guessed that
a dummy entry is fine for QEMU.
Fixes some errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Activate the DTCM for STM32F7 board that have Ethernet.
This is needed because the Ethernet driver puts the DMA buffer
to this section.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
Qemu_x86 didn't reflect emulated program memory size.
It was because chosen zephyr,flash was assigned to flash_simulator
which was helping to generate DT_FLASH properties for sim_flash node.
This change revert choice of flash0 which solve problem with
program memory size. Flash simulator have to use
DT_SOC_NV_FLASH_xxx labels for fetch its property since that.
fixes#15832
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The desired memory map is to have the 0 - 4K page non-present
to catch NULL pointer dereferences,
from 4K - 4MB for the program text (RO, Execute),
ROM (RO, No Execute), and 4MB-8MB for system RAM.
This patch cut text size by 4 KB which allow to meet above
requirements.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:
- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
in order to configure USB clock source.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
When TRUSTED_EXECUTION_NONSECUCRE is selected, we always
define the default board (mps2_an521). We do not need to
OR with TRUSTED_EXECUTION_SECURE, in this Kconfig
conditional.
In addition to that, we make the BOARD_MPS2_AN521 board
to strictly depend on the corresponding SOC, not on the
SOC series.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Signify that the MPS2 AN521 is selected as a QEMU
target. Indicate, also, that this board has support
for COVERAGE.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
CONFIG_ARCH_HAS_USERSPACE is automatically set for
Cortex-M targets with CONFIG_ARM_MPU being set. So
we can remove this from the default setup since it
is redundant.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Because the only difference between native_posix and native_posix_64
should be 32-bit vs 64-bit compilation, the NATIVE_POSIX menu option
is turned into NATIVE_POSIX_32 and the NATIVE_POSIX_64 is added, with
both selecting NATIVE_POSIX. This way nothing changes for the existing
native_posix target, allowing it to share almost everything with the
64-bit version.
Both flavors are made available for CI tests to pick them. This assumes
both 32-bit and 64-bit build environments are available.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
My compiler is rather fussy:
zephyr/boards/posix/native_posix/irq_ctrl.c:133:7:
error: conflicting types for ‘hw_irq_ctrl_get_irq_status’
u64_t hw_irq_ctrl_get_irq_status(void)
^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from zephyr/boards/posix/native_posix/irq_ctrl.c:11:
zephyr/boards/posix/native_posix/irq_ctrl.h:29:10:
note: previous declaration of ‘hw_irq_ctrl_get_irq_status’ was here
uint64_t hw_irq_ctrl_get_irq_status(void);
^~~~~~~~~~~~~~~~~~~~~~~~~~
Make the definition match its declaration.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The spi-nor flash nodes require a jedec-id property as per the binding.
We add the jedec-id's as best we can determine based on the data sheets
for the various flash modules on these boards.
However these id's should be validated by actually reading the value to
ensure they are correct.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove whitelisting and enable broader testing on all boards with needed
features.
Add pwm to board yaml where it applies.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board uses the sam3 gpio driver. gpio_sam was selected by default
causing a conflict and issues when building for this board.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
holyiot_yj16019 board uses nRF52832 SoC, which does not have 802.15.4
radio. Therefore, 802.15.4 should not be listed in it's capabilities.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
At the time these overlays were created the author was unclear on how to
correctly represent SPI chip selects on a target where the peripheral
does not control that signal. As such the pin assignment was present
only as documentation.
Enlightenment was subsequently achieved and the cs-gpios property should
be properly defined.
Note that the mesh feather does not define a chip select to be used with
the spi1 peripheral.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use an assert to catch the situation where we can't find a port
to use for the reset line pin, since it shouldn't really happen.
The case where reset_pin_configure() is executed but no reset
line is selected can't happen due to static asserts in `integrity.c`
that enforce a reset line to be selected when the reset pin
functionality is enabled.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Implementation of pinmux of usdhc depends on board design.
Usdhc driver could change pinmux according to SD mode, SoC
should provide API for this. Board pinmux should register
its pinmux function to SoC.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
1) dts/bindings/mmc/mmc.yaml: specifies common mmc.
2) dts/bindings/mmc/nxp,imx-usdhc.yaml: specifies
nxp usdhc module which inherits mmc.
3) dts/arm/nxp/nxp_rt.dtsi: usdhc support on RT chip.
4) boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts:
usdhc slot support on mimxrt1050_evk board.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
Enables the pyocd runner on the lpcxpresso55s69 board. Note that this
currently requires building pycod from source to pick up fixes in
https://github.com/mbedmicro/pyOCD/pull/690
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts all net samples that enable the mcr20a 802.15.4 driver to use
the frdm_cr20a shield instead of hardcoding configs for the frdm_k64f
base board. This makes it possible to build mcr20a samples for other
base boards with compatible arduino headers.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Match the speed speficied for all boards using the jlink runner when
using the pyocd runner on the same board.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
To allow NRF drivers to include nrfx HAL or drivers headers
like with the real HAL, include the top nrfx/ folder
just as the real nrfx does.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
x-nucleo-iks01a3 shield is an arduino compatible companion board
which can be used on top of Nucleo standard boards. It extend
the Nucleo functionalities adding following MEMS sensor support:
- LSM6DSO accel and gyro
- LIS2MDL magnetometer
- LIS2DW12 accel
- LPS22HH pressure
- HTS221 humidity
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This patch adds support for the STM32 nucleo_g071rb board
from STMicroelectronics.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove unnecessary MCU slow down to 16Mhz when using BLE chip BlueNRG-MS
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Provide doc for stm32h747i_disco.
Includes basic description for building and flashing
individual cores.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The ARC timer is a MHz-scale cycle counter and works very well with
the new 10 kHz default tick rate. Remove the settings for ARC
hardware.
Note that the nsim board definitions are left at 100 Hz. That is a
software emulation environment that (like qemu) exposes the host clock
as "real" time and thus is subject to clock jitter due to host
scheduling.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
These all have what appears to be a promiscuously cut-and-pasted
declaration for a 1000 Hz tick rate. They are all SysTick boards and
will work very well with the new 10 kHz default, so use that instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem
with SIE-200 and CMSDK components targeting the MPS2+ board. The
SSE-200 subsystem implements two Cortex-M33 cores.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
We use the following commands to rename any
SW._GPIO_{CONTROLLER,PIN,FLAGS} to
DT_ALIAS_SW._GPIOS_{CONTROLLER,PIN,FLAGS}
git grep -l SW._GPIO_CONTROLLER | xargs sed -i 's/SW\(.\)_GPIO_CONTROLLER/DT_ALIAS_SW\1_GPIOS_CONTROLLER/g'
git grep -l SW._GPIO_PIN | xargs sed -i 's/SW\(.\)_GPIO_PIN/DT_ALIAS_SW\1_GPIOS_PIN/g'
git grep -l SW._GPIO_FLAGS | xargs sed -i 's/SW\(.\)_GPIO_FLAGS/DT_ALIAS_SW\1_GPIOS_FLAGS/g'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move misc/printk.h to sys/printk.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move pwm.h to drivers/pwm.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move i2c.h to drivers/i2c.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move tracing.h to debug/tracing.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds the necessary bits to utilize the x86_64 toolchain
built by sdk-ng for x86_64 when toolchain variant is either
zephyr or xtools. This allows decoupling the builds from
the host toolchain.
Newlib is also available with this toolchain so remove
the Kconfig restriction on CONFIG_NEWLIB_LIBC.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The libc hooks for Newlib requires CONFIG_SRAM_SIZE and
the symbol "_end" at the end of memory. This is in preparation
for enabling Newlib for x86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is the "flagship" platform for the new local APIC timer driver.
The opportunity is taken clean up the configuration as well, so the
choice of local APIC vs HPET timer requires changing only one Kconfig.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The path was changed during generating Ninja-based build system,
so the path of link script file was wrong when testing the
cross-compiler. Fix it by giving the absolute path for link script.
Signed-off-by: Howard Liu <howardliu7874@hotmail.com>
Add board support for 96Boards Avenger96 board from Arrow Electronics
based on STM32MP157A MPU from ST Microelectronics. This board is one
of the consumer editions boards of the 96Boards family following the
Extented CE form factor. More information about this board can be found
in 96Boards website: https://www.96boards.org/product/avenger96/
By default Zephyr console output is available via RAM console, but it
can also be changed to UART7 exposed as UART0 on 40 pin LS header.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Use Device Tree,and in particular a new 'bt-c2h-uart' to select which
UART is being used to communicate with an external BLE Host when acting
as a Controller.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for two CAN bus controller instances and disable both of
them by default. Enable CAN_1 for the STM boards currently supporting
CAN.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The defines in board.h aren't used/buildable so lets remove it. If
someone wants to support the button/led samples they can add DTS support
for those items.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
YAML document separators are needed e.g. when doing
$ cat doc1.yaml doc2.yaml | <parser>
For the bindings, we never parse concatenated documents. Assume we don't
for any other .yaml files either.
Having document separators in e.g. base.yaml makes !include a bit
confusing, since the !included files are merged and not separate
documents (the merging is done in Python code though, so it makes no
difference for behavior).
The replacement was done with
$ git ls-files '*.yaml' | \
xargs sed -i -e '${/\s*\.\.\.\s*/d;}' -e 's/^\s*---\s*$//'
First pattern removes ... at the end of files, second pattern clears a
line with a lone --- on it.
Some redundant blank lines at the end of files were cleared with
$ git ls-files '*.yaml' | xargs sed -i '${/^\s*$/d}'
This is more about making sure people can understand why every part of a
binding is there than about removing some text.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The zephyr-file role creates a link to the GitHub copy of a file. Some
files have been moved so update the file references in the documentation
(found by scanning for uses of :zephyr-file:)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Fix misspellings and doc issues missed during regular reviews (including
some files without a trailing newline)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
stm32wb is not yet supported on openocd.
But support on pyocd can be enabled thanks to "pack" feature.
Configure board runner with pyocd and provide guidelines
to configure pyocd.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board suppor for 96Boards Meerkat96 board from Novtech based on
NXP i.MX7 multi core processor. Zephyr is ported to run on the single
core Cortex-M co-processor on this board.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/imx7-96/
By default Zephyr console output is available via UART1 available at
the 40pin LS connector.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
stm32l496zg_disco and nucleo_l496zg were depending on STM32L496XG SOC.
With the recent change to STM32L496XX, the dependency should be updated.
Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
Clean up some stray references to cmake in doc, boards and
samples that don't make explicit use of the zephyr app extension,
as well as other minor doc fixes.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The DT spec. only has "okay" and not "ok". The Linux kernel has around
12k "okay"s and 300 "ok"s.
The scripts/dts scripts only check for "disabled", so should be safe re.
those at least.
The replacement was done with
git ls-files | xargs sed -i 's/status\s*=\s*"ok"/status = "okay"/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Updates based on discussion and changes in supported features.
- Make the guide shorter by removing content that's not relevant to
most users who are truly just getting started, such as information
about pre-LTS versions that did not support west, and by being more
concise in some places.
- Decrease the number of colored boxes. At the latest TSC F2F, the
"note / warning / note / tip" contents were identified as a
readability problem.
- Add additional information based on new west features, like "west
boards".
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Hdc1008 driver is renamed into ti_hdc to prepare it to support all
available Texas Instruments HDC sensors (e.g. hdc1080, hdc2080).
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
This can't possibly have worked since the initial merge of the board.
It looks like it was originally written as a port from a KBuild
Makefile fragment but never tested, and has only been touched by
tree-wide changes since then. Try to fix it.
I don't have this hardware, but it should work the same way as
96b_nitrogen if it truly supports pyocd.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
This commit adds counter driver based on RTCC module for SiLabs Gecko
SoCs.
Tested with SLWSTK6061A / BRD4250B wireless starter kit.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Simple renaming and Kconfig reorganization. Choice of local APIC
access method isn't specific to the Jailhouse hypervisor.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add support for reading the onboard potentiometer (ADC0 channel
12) and thermistor (ADC0 channels 0 and 1).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert all board_set_xxer(foo) calls to board_set_xxer_ifndef(foo),
which allows the user to make their own decision at CMake time.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
This helps by letting us add checks for when the runner has already
been set. There is documentation saying you can set
-DBOARD_DEBUG_RUNNER at the command line and have it take effect,
which turns out not to be true for a large number of boards.
A status message helps the user debug.
(We'll address the existing in-tree boards in the next patch.)
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
ARC EM4 is just a baseline configuration of ARC EM family of CPU cores.
But with addition of more featuers like caches, DSP extensions etc
we're effectively getting EM6, EM5D etc templates.
So to not confuse users let's talk about families of ARC cores
as that's what makes sense together with extra features but not
templates itself.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Instead of blind copy of nsim_em.dts re-structure this way:
* nsim.dtsi - Top-level "board" description re-usable for
| all nSIM-based "boards".
|
| Even though it's not needed right now but it
| allows to add other ARC core families in the future.
|
\_ nsim_em.dtsi - Common definitions for boards with ARC EM cores
|
\_ Real boards with ARC EM cores
|
\ nsim_em.dts
\ nsim_sem.dts
\ nsim_em_mpu_stack_guard.dts
\ nsim_sem_mpu_stack_guard.dts
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This will allow us to easily specify other CPUs looking
forward and not rely on any default value.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
ARC nSIM simulates all flavors or ARC cores so there's
no point in limiting its usage to ARC EM family only.
Moreover with upcoming addition of ARC HS family support
in Zephyr we'll be re-using nSIM "board" for them as well.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Builds with coverage enabled are in a continuous state
of bit-rot as no CI job enables it. Introduce a dedicated
x86 target that builds with coverage enabled.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Newer versions of GCC (e.g. gcc 9.1.1) fail to compile the version of
Grub that is used by the Zephyr build_grub.sh script. This patch updates
the version of Grub to the latest (as of June 4 2019) which includes a
number of fixes that solve the problem.
Fixes: #16624
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Add board support (and documentation) for the Intel Gordon Peak
Module Reference Board, a dev board based on the Apollo Lake SoC.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Board LPCXpresso55S69 added to supported zephyr boards, initial simple
configuration to boot board and use UART.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
We do have a multi-architecture latency benchmark now, this one was x86
only, was never used or compiled in and is out-dated.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
1. Add flash partitions.
2. Add macro DT_START_UP_ENTRY_OFFSET. The entry of the RV32M1 is
not the start of the vector table. Add the macro to inform the
entry offset.
3. Update linker file to support MCUboot
a. For normal cases (CONFIG_BOOTLOADER_MCUBOOT is cleared), the
vector table is located last 256bytes of the flash.
b. If CONFIG_BOOTLOADER_MCUBOOT is set, the vector table is located
after the image header of MCUboot.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Configure the LPSPI PCSx pins as GPIO if not dedicated to SPI CS. This
allows using them for SPI GPIO CS.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
While enabling specific I2C ports does indeed belong at the board
level Kconfig, the selection of driver (I2C_DW) is an SoC-level
choice, so it is moved accordingly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Which UARTs are broken out from the SoC on a particular board is
board-specific; don't enable UARTs blindly in the SoC Kconfig.
Also, the default UART options are specified in the driver Kconfig, so
the same defaults specified in the SoC Kconfig are redundant. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Since Kconfig is responsible for enabling/disabling devices at build,
the devices in dt are defaulted to status="ok" to keep the output in
generated_dts_board.conf the same across configurations and simplify
the board-level dts files.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The UART references in dts_fixup.h are actually SoC-specific, not
board-specific, so they are moved. Since this leaves the board fixups
empty, the file is removed.
The SoC fixups are expanded to include the additional two ports that
are present on some revisions of the Apollo Lake.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Add SPI support to the NXP TWR-KE18F development board. There are no
onboard SPI devices, but both SPI busses are available on the primary
Tower System elevator connector.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This enables the ROM bootloader on the CC13x2 / CC26x2 LaunchPad
development boards. The bootloader can be started by holding BTN-1
during reset. This can be useful during development to recover a board
if DAPs get disabled.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
The HiFive1 and HiFive1 Rev B share the same clock initialization
code, so put it in soc/riscv32/riscv-privilege/sifive-freedom.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
The HiFive1 Rev B adds the following features to the
original HiFive1:
- A second UART peripheral 'uart_1'
- A hardware I2C peripheral 'i2c_0'
- Segger J-Link OB
- An ESP32-WROOM attached to the 'spi_1' peripheral bus
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
All three boards use a Skyworks SPDT switch to control whether the
antenna is connected to a PCB antenna or an external u.FL connector.
None of them power up in a state that properly enables an antenna.
Add startup code to configure for the PCB antenna.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/14123
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
[mike@foundries.io: adjusted code to use Zephyr GPIO APIs. boron is
now also based on DTS.]
Signed-off-by: Michael Scott <mike@foundries.io>
MCUboot needs nearly all 8 pages, on some commits even more. This leads
to a overwrite of parts of mcuboot code when an application is flashed.
By improving the size of the boot partition to 10 pages (from 8) and
decrease both application slots by 1 page, MCUboot fits in the boot
loader partition. This is also fixable by an extra .dts, but having an
out of the box working configuration is preferable.
Signed-off-by: Stefan Kraus <stefan.kraus@fau.de>
Documentation update to add instructions to download a
zephyr binary to the target from a Linux host
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Python scripts to download a zephyr binary image (zephyr.bin) to
Intel S1000 from a linux host.
The linux host's SPI master and GPIOs shall be connected to the
corresponding SPI slave and I/Os respectively.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
A YAML file to specify configuration of interface I/Os
such as the SPI device, GPIOs, etc.
The image download script configures the host's SPI and GPIO
interfaces accordingly.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Add partition table to support MCUBoot. A paragraph of
usage comments was also added in the board documentation.
Signed-off-by: Jun Li <jun.r.li@intel.com>
For native_posix, set NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME
by default when a host BT adapter is selected even if TEST
was also set. As using host peripherals one normally needs
also to run with the host time.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
In order to unify the legacy and composite code, move the class and
vendor request handler buffer into the USB device code, just like in
composite mode. The option is renamed from USB_COMPOSITE_BUFFER_SIZE
into USB_REQUEST_BUFFER_SIZE and also replaces the USB_DFU_MAX_XFER_SIZE
and USB_HID_MAX_PAYLOAD_SIZE options.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Use the generic pinmux APIs provided by zephyr to select
alternate functions.
This also contains a fix for a formatting issue in the
documentation for this board. Additionally, the serial
console is now on UART2.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
USB_DC_STM32 comes from Kconfig. We have to add the CONFIG_ prefix
to use USB_DC_STM32 in C code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
OpenISA Vega board has Arduino headers which can be configured for
use with Arduino-compatible shields. To enable this in Zephyr,
let's define the gpio-map for Vega and set the appropriate
arduino_serial linkage.
Signed-off-by: Michael Scott <mike@foundries.io>
Create a dedicated connector file to hold arduino connector
information for disco_l475_iot board.
This should enhance board dts file readability.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Adds a new argument to the jlink runner to reset the device after
loading code to flash. This fixes a problem with the lpcxpresso54114
board where it was necessary to manually reset the board to get new code
to start running after the 'ninja flash' command. This new argument is
optional and false by default because there are some cases were we must
not reset after load, such as when we load the application into ITCM on
imx rt devices.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables the mcux lpi2c shim driver and pin muxes on the mimxrt1060_evk
board. Updates the board documentation and yaml supported list
accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Since there is no NFC antenna connector on the dongle and the pins
P0.09 and P0.10 that are dedicated to NFC functionality are in the
group of just a few ones available for external connections, it seems
more reasonable to configure these pins by default as regular GPIOs,
as users will most likely want to use them in this way.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
These definitions were left incorrect after a gpio-map change was
added to the PR introducing the boron support for the SARA-R4 modem.
Correct the gpio defintions here so that the boron build doesn't
break.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/16289
Signed-off-by: Michael Scott <mike@foundries.io>
Enable pull-up on UART TX pin to reduce power consumption.
If the board is powered by battery the SoC consumes more
power than expected.
The consumption increases because TX pin is floating
(High-Impedance state of pin B from Dual-Supply Bus Transceiver).
Similar to commit b5b728495b
("boards: reel_board: enable pull-up on UART RX pin")
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
I2C support has been added back into the up_squared, leveraging the
new PCIe support in the DesignWare I2C driver.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The legacy PCI support in the DesignWare I2C driver is replaced with
the new PCIe support. The Intel Quark X1000 SoC and the galileo board
configurations are updated accordingly.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The SBL configuration no longer differs in any detail (except its name)
from the "standard" UpSquared configuration, so it is removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This needs to be pushed down to the SoC level, as it's an Apollo Lake
feature, not a feature of the UpSquared. Remove the Apollo Lake
references to the PCI devices because these will not be used when I2C
support is restored.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This option is no longer used in the dts_fixup.h file since there
are no SBL-specific fixups.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The second serial port (UART_1) can be used for connecting to
host serial port. This is used for example by PPP (Point-to-Point
Protocol) implementation in which case the pppd running in Linux host
connects to a pty that is linked to UART_1 in Zephyr.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The Particle.io Boron is an nRF52840-based board with a connected
u-blox SARA-R4 modem. The main board was previously upstreamed
without modem support.
Now that we have a driver to support the SARA-R4 modem, let's enable
it for the Boron board.
Signed-off-by: Michael Scott <mike@foundries.io>
SparkFun offers an Arduino-R3 compatible shield using the SARA-R410M-02B
LTE Cat M1/NB-IoT modem.
Now, that the basic SARA-R4 modem driver is implemented, let's enable
the shield for several MCUs supporting Arduino-R3 compatible headers.
Product Link:
https://www.sparkfun.com/products/14997
Signed-off-by: Michael Scott <mike@foundries.io>
Let's change the specific WNC-M14A2A check into a more generic
MODEM check for enabling ethernet. Many of these pins are used
on the Arduino headers.
Signed-off-by: Michael Scott <mike@foundries.io>
This shield uses a non-standard UART exposed via Arduino-R3
compatible header pins.
It has configurations for FRDM_K64F and nRF52840_PCA10056.
Signed-off-by: Michael Scott <mike@foundries.io>
This commit adds a DTS node for the ARM MPU peripheral in the
device tree of ARMv8-M SoCs (for the secure and the non-secure
DTS descriptions) and updates the fixup files. SoCs:
- nrf9160
- musca_a
- musca_b1
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The ACRN board configuration is not suitable for production use,
but many people are mistakenly using it as a starting point for
real-time applications. I've added a note to clarify.
Signed-off-by: Charles Youse <charles.youse@intel.com>
MHU (Message Handling Unit) enables software to raise interrupts to
the processor cores. It is enabled in SSE 200 subsystems.
This patch aims to implement inter processor communication.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Add support for the NXP TWR-KE18F development board. This board
feautures an NXP MKE18F16 MCU, a selection of user LEDs and
push-buttons, potentiometer, thermistor, CAN interface, and FlexIO
header.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The mikroe_mini_m4_for_stm32 board is developed by Mikroelektronika
not by STMicroelectronics.
Also use more appropriate "mini-m4-for-stm32" board name for
compatible dt property.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Enable the counter capability in the board and add a .conf file for the
nRF52810 running on the PCA10040 board.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The supported field is used by sanitycheck to select which tests will be
run on a particular board. The issue with the counter drivers, and in
particular on nRF ICs, is that the timer peripherals are disabled by
default and need to be enabled on a per-board basis inside a .conf file.
Since this board doesn't have a .conf file in
tests/drivers/counter/counter_basic_api/boards/ the test cannot be run
on this board.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This commit adds support for board: nrf52811_PCA10056.
The nRF52840 DK: PCA10056 is the recommend development kit, it emulates
the nRF52811, and can be used as a starting point for development
before moving over to a custom board.
Please note that this development kit does not support Bluetooth
Direction Finding. What is more it cannot be used with most of Arduino
shields because of PCA10056 PIN layout.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Increase ram size as flash simulator need it for
emulated storage. The qemu_x86 flash size is puted back to
its original value of 4092K
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This commit adds J-Link runner for efr32_slwstk6061a board. To use it
it is necessary to install J-Link Software and Documentation Pack.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit enables internal SoC DC-DC converter on efr32_slwstk6061a
board.
RF components on efr32_slwstk6061a board are connected to the internal
SoC DC-DC converter. Upon startup the DC-DC converter is configured in
the bypass mode. Such configuration provides enough power for the SoC to
boot and perform basic operation. It is not enough however to operate
the radio subsystem. Without this patch enabling radio in Rx or Tx mode
causes voltage drop and triggers brown out detector reset.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Hook up SERCOM1 to I2C, it is connected to the EXT3 header and
the EDBG embedded debugging interface.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
The ADC driver in this PR has been tested working on these nucleo
boards, so ADC support is added to the boards doc.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Some configuration for the boards have to be added into test_adc.c file
so user can test driver with the test cases. Several nucleo boards are
added including F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG.
And also ADC dts and pinmux configuration are added into boards own
pinmux.c and dts file.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Let allow users to select the revision B of the chip on the SAM E70
Xplained Board. The same board exists with SoC revision A or B.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
At the moment there are two images for Nucleo-64 STM32 family board
connectors (img/nucleo_xxxxxx_connectors.png).
The images have the same canvas size (800x619) but different file
size in bytes and different color coding.
The first one (192K, 8-bit colormap) is used for
* nucleo_f070rb
* nucleo_f091rc
* nucleo_f103rb
* nucleo_l053r8
* nucleo_l073rz
The second one (464K, 8-bit/color RGBA) is used for
* nucleo_f030r8
* nucleo_f302r8
* nucleo_f334r8
Applying simultaneous black/white threshold to the images and
comparing them with imagemagick tools shows that the images
have no significant difference. Therefore we can use
nucleo_l073rz_connectors.png for nucleo_f030r8, nucleo_f302r8
and nucleo_f334r8.
Please see https://github.com/zephyrproject-rtos/zephyr/pull/15926
for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
The Holyiot YJ-16019 board is a small, coin cell driven board based on
the Nordic Semiconductors nRF52832. It provides one LED and one push
button.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The approved trademark name is Wi-Fi so update references to WiFi and
other spellings to Wi-Fi in documentation and Kconfig help strings.
(Note that use of spelling variatios of "wifi" in module names, CONFIG
names, link names and such are untouched.)
https://www.wi-fi.org/
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Moves the flash memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the sram memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new argument to the openocd runner to optionally specify the
config file. Updates the rv32m1_vega board to use different openocd
config files for the ri5cy and zero-riscy cores.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Introduces a new rv32m1_vega board configuration for the zero-riscy
core. It assumes that the soc has been reconfigured with openocd to boot
to the zero-riscy core instead of the ri5cy core.
Refactors the board-level device tree so the ri5cy and zero-riscy
configurations share common definitions for the led, button, and sensor
nodes.
Tested with:
- samples/hello_world
- samples/synchronization
- samples/basic/blinky
- samples/basic/button
- samples/sensor/fxos8700
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The stm32_min_dev board blue/black variant support USB device,
but the usb node removed by merge PR #15245, so add it back.
Signed-off-by: Harry Jiang <explora26@gmail.com>
The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The TI CC1352R LaunchPad (LAUNCHXL-CC1352R1) is a development kit that
features the CC1352R SoC.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
The TI CC26x2R LaunchPad (LAUNCHXL-CC26X2R1) is a development kit that
features the CC2652R SoC.
Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
The '#if XIP' in the DTS file never worked properly,
causing the QEMU build to think it has much more RAM
then it actually has. If RAM overflowed, this would not
be caught by the build, instead there would be strange
crashes when the data copy takes place.
The QEMU targets themselves are not XIP, everything
is actually RAM, but the first 4 megabytes are
considered to be a memory-mapped flash region. This
is done to ensure that the XIP data copying infrastructure
doesn't bit-rot on x86. We are at the point where
a lot of things depend on this, so just select it in
the board Kconfig instead of enabling in the
defconfigs.
Fixes: #15835
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix "arduino_i2c not found" issue, similar to #13708
Add arduino interfaces in dts to board nrf52_10040
Signed-off-by: Aaron Tsui <aaron.tsui@outlook.com>
Enables BT_CTLR if BT is enabled, connects shell-uart to uart0,
and enabled NRFX uart driver by default.
Signed-off-by: Tavish Naruka <tavishnaruka@gmail.com>
Implementation of pinmux for the stm32mp157c_dk2 board.
Some UART pin mux definition has been added (mainly for
UART console and UART/SPI Arduino shield support).
This can be completed with pin mux for other stm32mp157c
UART.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for stm32mp1 basic UART API with Zephyr.
UART Console and UART shell are also supported.
Async UART API and USART support is to be done.
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Move SERCOM peripherals to use the raw defines generated from DTS
parsing. This adds aliases to the DTS so that the SERCOM number
can still be used for clocking and pinmux.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
The 96Boards Argonkey mezzanine board has been officially
published on ST website:
https://www.st.com/en/evaluation-tools/steval-mki187v1.html
Update documentation with official picture and website info.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The mimxrt1015_evk board image was corrupted and did not display
properly in the board documentation. Fix it.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This was tested with the hello world application. UART 0 was used
as console for displaying "Hello World! mec15xxevb_assy6853" to
the serial terminal.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
soc : arm : microchip_mec Use rename fault clear function
The Cortex-M core function to clear faults was rename by
upstream. Update to use new name.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
When importing a pre compiled imported library it is currently
required to perform three steps.
This commit introduces a helper function which allows the
user to import a library with a single function call.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
This board and the native_posix board share the POSIX architecture.
Some of the native_posix drivers/backends only rely on the
underlaying operating system API, and do not require any special
HW model to operate.
Therefore it is quite easy to reuse some of them into this board.
Currently the only limitation for some, is the interface they use
in the board to register their command line arguments.
This header provides a minimal shim to rename the, otherwise
equivalent, call.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
A new function pcie_irq_enable() is added to be used in lieu of
irq_enable() when the target device is PCI(e)-attached. The function
attempts to use MSI, when configured in the kernel and supported by
the endpoint; failing that, it will verify that IRQ requested is in
fact routed to the device by the boot firmware before enabling it.
The NS16550 UART driver is updated to use pcie_irq_enable().
The PCI(e) shell is extended to dump information about wired IRQs.
The up_squared devicetree is fixed (reverted?) to IRQ5 for UART1.
The galileo enables MSI by default.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The Atmel SAMD21 (and therefore also the SAMR21) comes with the same
RTC peripheral as the Atmel SAMD20.
Enable it in dts_fixup.h and enable it in the dts for samr21_xpro.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Add the Atmel SAM R21 Xplained Pro Evaluation Kit to zephyr.
So far, UART, SPI, I2C (depends on #14128), debug LED and user button
have been tested.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Since STM32_OSPEEDR_VERY_HIGH_SPEED flag is required for all I2S_CK
pins, lets add this to the STM32F4 pinmux header and remove the
duplicates in board files. While we are at it, let's add the missing
pinmux definitions for I2S_2 also.
Fixes: #9028
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Replace image and reword some sections to indicate the presence of two
board variants: stm32_min_dev_(blue|black)
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Add support for blue pill and black pill variants of the STM32
minimum development board by splitting board configuration into
stm32_min_dev_blue and stm32_min_dev_black.
CODEOWNERS: Add myself (@cbsiddharth) as codeowner for stm32_min_dev
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
We shall not enable by default a system timer in ARM
platforms, namely the SysTick, the Nordic, or the SAM0
RTC timer, simply by assessing the hardware capabilities
(e.g. by conditioning on CPU_CORTEX_M_HAS_SYSTICK).
Instead, now, all ARM platforms needs to explicitly set
their system timer module. Note that this has already
been the case for ca 80% of the ARM platforms.
This clean-up allows us to decouple HW capabilities from
system configuration (for example, Nordic platforms may
enable option CPU_CORTEX_M_HAS_SYSTICK, and still use
the platform-specific RTC timer for system timing).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Reduced flash size for QEMU x86 so it does not consume a lot of RAM
memory where it is simulated.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
This commit adds a flash driver implementation that writes to RAM and
exports statistics through stats.h. It can be used to simulate flash
memory for testing purposes.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Add board support for 96Boards WisTrio LoRa Tracker board from
RAK Wireless. This board is one of the 96Boards IoT Edition platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
We already select HAS_DTS at the arch level for X86 so we don't need to
duplicate it at the board level.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add configuration, pinmux, dts and documentation for the STM32MP157
Discovery board based on the STM32MP157 SoC.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Mark the three distinct choices for how to program the board as
separate options, and add some clarifications on each. For the MCUboot
route, use smp_svr instead of blinky, to give the user a hint about
how to keep their devices up to date from application land.
Signed-off-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
This patch adds support to the nRF9160 for using a dedicated
GPIO pin to reset controllers running on nrf52840_pca10090.
It resets the controller before opening the H4 device, and it
delays the controller from booting until all bytes traveling
to the host have been received and drained from the UART,
thus ensuring that communication can begin from a clean state.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
In order to generalize the currently specialized nRF51 IC setup hook,
make the following changes:
- Generalize the hook to bt_ic_setup()
- Use a weak NOP version by default
- Move the currently existing one to the board folder
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Let one of the MCU interface pins be configured to act
as a reset line. This mitigates the lack of a connection
between the nRF9160 and nRF52840 PINRESET.
Minor refactoring and updated comments.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Add board support files for mimxrt1015_evk, the development board for
i.mxrt1015 (CM7) SoC.
- Add pinmux, dts, and doc.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, basic/button.
Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
added three missing LEDS for stm32f4_disco, in order to run the
samples/basic/disco application on the stm32f4_disco
Signed-off-by: Jan Sturm <jansturm92@googlemail.com>
Be a bit more friendly to users, by providing some hints
about possible reasons why a command line option was not
understood.
Also describe in the help message that which options are
avaliable depends on what has been selected in this build.
Fixes: #15046
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Enables the pyocd runner on mimxrt1060_evk and mimxrt1064_evk boards
using the generic cortex_m target. Note that this target is not capable
of programming flash, therefore can only load an application to internal
SRAM (set CONFIG_CODE_ITCM=y and CONFIG_DATA_DTCM=y) or attach to an
application already programmed to flash by other means (e.g., DAPLink
drag-and-drop).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.
Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.
Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):
For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add configuration, dts and documentation for the MINI-M4 for
STM32 board based on the STM32F415RG SoC.
See https://www.mikroe.com/mini-stm32f4 for more details.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2 identical packages were defined for stm32f412 SoC, invariant "g".
Merge them in new sinclge stm32f412Xg.dtsi.
Update matching boards accordinlgy.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.
The NS16550 UART driver is modified to use pcie.
pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.
This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.
Deficiencies:
64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.
The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Right now only numerical values are printed which must
be looked up in the Designware ARCv2 ISA Programmer's
Reference, which is not public.
Add a non-default Kconfig to print more information at
the expense of footprint, and enable it for all the simulator
targets.
We only print code/parameter details for machine check and
protection violations, more may be added later as desired.
This should cover all the exceptions we commonly encounter
for memory protection.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
SPI is not normally enabled, but some tests assume that there's a device
available. Conditionally enable SPI_2 which is associated with the
on-board flash.
Closes#15374
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Remove 'counter' as a supported feature on several NRF boards as these
boards fail to build tests/drivers/counter/counter_basic_api. This is
due to the fact that we either need explicit board conf files for the
test or have the counter driver enabled via Kconfig.
Fixes#15460
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
for SDK 0.10.0, it consumes more stack size when coverage
enabled, so adjust stack size to fix stack overflow issue.
Fixes: #15206.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Fixes broken CC2520 on quark_se_c1000_devboard configuration after
commit 25d17db.
Fixes#15070
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This is a follow up to commit 436c4262da.
By default the channel 0 of pwm0 is set to the pin that drives led0.
Since the LED is active high, the inversion of polarity is incorrect.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
write_buf and flash_content should be defined as global inside
main. Otherwise Python treats them as local variables and ends
up throwing an error because it thinks they are being used
without being defined.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
for SDK 0.10.0, it consumes more stack size when coverage enabled
on qemu_x86 and mps2_an385 platform, adjust stack size for most of
the test cases, otherwise there will be stack overflow.
Fixes: #14500.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
For some reason we dropped the simulation keyword and this platform is
not running any tests, we are just building the tests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Rename reserved function names in arch/ subdirectory. The Python
script gen_priv_stacks.py was updated to follow the 'z_' prefix
naming.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
* the nsim host timer does not work as expected,
disable it, use cycle count to simulate timer tick
* optmize the freq definition of nsim_em
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
On Clear Linux, the CFLAGS is set and defines a number of aggressive
checks and optimizations. This causes a build failure when generating a
GRUB2 boot loader image using the 'build_grub.sh' script.
Unsetting it within the script allows it to proceed and successfully
build a functional GRUB2 boot loader image to be used with Zephyr.
Fixes: #14289
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Updates the 96b_nitrogen board document to link to the new debugging
guide instead of the opensda page.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the usb_kw24d512 board
document to leverage the new debugging guide covering debug probes and
host tools.
This board does not have an OpenSDA microcontroller, therefore the only
debug probe currently supported is the external J-Link.
Updates the flashing section to reflect that the ``flash`` build system
target is now supported.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the lpcxpresso54114
board document to leverage the new debugging guide covering debug probes
and host tools.
This board supports the LPC-Link2 J-Link onboard debug probe.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the hexiwear board
documents to leverage the new debugging guide covering debug probes and
host tools.
Recommends the OpenSDA J-Link debug probe because the k64 and kw40z
share the same OpenSDA microcontroller, and the kw40z requires Segger
RTT for a console. It is possible to use daplink firmware for the k64,
however it is not recommended because it requires switching the firmware
back to jlink to access the kw40z.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The hexiwear_k64f and hexiwear_kw40z share the same OpenSDA
microcontroller on the hexiwear docking station, so make the jlink the
default firmware on both for consistency. We use jlink instead of
daplink by default because hexiwear_kw40z can only use Segger RTT for
the console (there is no UART available).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The frdm_kw41z board was originally configured in zephyr to use the
jlink runner by default because pyocd didn't yet support the kw41z soc.
Support for kw41z was added in pyocd v0.9.0, so we can now default to
daplink firmware and pyocd.
Now all freedom boards in zephyr consistently use daplink and pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the freedom board
documents to leverage the new debugging guide covering debug probes and
host tools.
These boards support OpenSDA DAPLink and OpenSDA J-Link onboard debug
probes. They can also support an external J-Link probe, but this
requires board modifications (cutting traces) and is therefore not
documented.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the mimxrt1060_evk and
mimxrt1064_evk board documents to leverage the new debugging guide
covering debug probes and host tools.
Neither of these boards have OpenSDA J-Link board-specific firmware,
therefore the only debug probe currently supported is the external
J-Link.
Updates the flashing section to reflect that the ``flash`` build system
target is now supported.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Reworks the programming and debugging section in the mimxrt1020_evk and
mimxrt1050_evk board documents to leverage the new debugging guide
covering debug probes and host tools.
These boards support both the OpenSDA J-Link onboard debug probe and the
J-Link external debug probe.
Corrects an error linking to the wrong OpenSDA J-Link firmware.
Updates the flashing section to reflect that the ``flash`` build system
target is now supported.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
* the original configurations are configured with stack checking
* the new configurations are configured with mpu stack guard
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The GPIO driver is required by this board's initialization code, hence
it is forced to be enabled always, not only enabled by default like on
other boards equipped with an nRF SoC.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This patch enables the GPIO driver by default on all boards equipped
with an nRF SoC (all boards having `CONFIG_SOC_FAMILY_NRF=y` in their
`_defconfig` file).
In vast majority of cases the driver is needed, so it is more
convenient to enable it at board level than in particular
applications.
And if the driver is undesired for some reason, it can be still
disabled in the application config.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Set FLASH_LOAD_OFFSET correctly (accounting for Nordic MBR) when
BOARD_HAS_NRF5_BOOTLOADER is defined and we're not compiling MCUboot.
MCUboot will select USE_CODE_PARTITION, which will make it link
correctly regardless of which board DTS is used (stock/debugger).
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Discovered with pylint3.
Use the placeholder name '_' for unproblematic unused variables. It's
what I'm used to, and pylint knows not to flag it.
Python tip:
for i in range(n):
some_list.append(0)
can be replaced with
some_list += n*[0]
Similarly, 3*'\t' gives '\t\t\t'.
(Relevant here because pylint flagged the loop index as unused.)
To do integer division in Python 3, use // instead of /.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
nrf52840_pca10056 and nrf52_pca10040 was enabling RTT by default
for all samples. It has some implications like forwarding printk
to logger and that, as a default behavior, may not be welcomed.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The nRF91 DK User Guide clearly says "the LEDs are active high,
meaning that writing a logical one ('1') to the output pin will
illuminate the LED".
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enable TIMER1 by default in nrf9160_pca10090 so it can be selected
by user for hardware byte counting in UARTE or other purpose.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Making a clean slate for some pylint CI tests. Only enabling relatively
uncontroversial stuff.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Following fix SRAM size to take into account CCM,
enable CCM and update yaml files in boards including fixed soc
dtsi definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
One of the bullet list items didn't get rendered properly because
continuation line wasn't indented.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
As em7d is configured with HARVARD, CCM will be used not DDR,
SRAM should point to DCCM.
This bug will cause the wrong caculation of heap area,
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
When using V0.10.0 SDK, flashing is not working anymore on
stm32f4_disco.
Using st_nucleo_f4.cfg instead of stm32f4discovery.cfg solves
the issue.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move the original documentation in the arduino_101 board to a common
section in the Bluetooth documentation and document the use of `btmon`
in general.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add the bt-mon-uart chosen node to all the nRF-based boards so that they
can all use CONFIG_BT_DEBUG_MONITOR without additional changes.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Based on prior work by @dcpleung. It's suboptimal, but it provides a
working starting point for ACRN work. The x86 board/SoC abstractions
really need to be refactored to make this "board" (and other x86-based
"boards", both extant and future) cleaner and easier to maintain. Punt.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Added some more content to the section about how to simulate
with BabbleSim and a couple of extra links.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Fixes the apds9960 i2c address on the reel_board. Found while converting
the apds9960 driver to use the i2c address from device tree rather than
a hardcoded value in apds9960.h.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The current flash configurations for all nRF52840's in Zephyr is
VERY constrained when it comes to allowing samples any space for
storage or custom areas. It only leaves the last 4 pages of flash
for "storage".
The nRF52840 is also capable of using OpenThread which defaults
to using the last 4 pages of flash for storing OpenThread-related
network data.
This means that while using OpenThread under any configuration
designed to use mcuboot partition slots, there is no space left
over for storage of any kind.
Let's adjust the partition table to set storage at 8 pages of
flash (32k). This fixes the conflict with OpenThread and leaves
room for future use cases that may arise.
Signed-off-by: Michael Scott <mike@foundries.io>
It is also possible to use 'west' to build the 'hello_world' sample
application for the UP2 (up_squared) board. This patch makes it
explicit in the documentation.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
USB is already being configured in pinmux.c, but for it to be
availiable it also needs to be enabled in the device tree.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
This is a vestiage of how board ports use to work, we have since removed
the need for board.h to exist on all board ports. Remove the file since
its not needed and doesn't do anything useful.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
* separate the ARC MPU driver into 2 parts
* arc_mpu_v2_internal.h for ARC MPUv2
* arc_mpu_v3_internal.h for ARC MPUv3
* For ARC MPUv2, keep the main design, but update and optimize the code
* For ARC MPUv3, implement mpu region split to supprt MPU region overlap
* misc updates and bug fixes
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Linking to API material requires knowing the pecularities of how
doxygen, sphinx, and breathe work. In an attempt to hide some of this
we're preparing the current docs to allow use of configuration defaults
that will let us more simply use a default role that will hunt for a
reference target in the various domains that are available by using a
default "role" of "all". This will let us use the simple notation
`functionname` or `typename` without fully specifying the reference as
:c:func:`functionname`.
This patch cleans up exising docs that were (incorrectly) using single
backtics where double backtics should have been used, and also found
some typos (such as a space between the role name and the reference,
such as :file: `filename`, and a missing colon such as
c:func:`functionname`)
This is a start to address issue #14313
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The build_grub.sh script cherry-picks 3 commits from the master branch
of grub because more recent build tools fail to build the latest stable
release (which is 2.02). This solves the problem on Fedora 29 for
example, but is not sufficient for Clear Linux.
This patch modifies the build_grub.sh script to use
grub-2.02-285-g5bc41db75 (latest from master as of 13 of March 2019).
That version compiles 'out-of-the-box' in the latest Ubuntu, Fedora and
Clear Linux.
There are additional tools required on the host system and the
documentation has been updated accordingly.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Updates the documentation to show PC13 instead
of PB12 as deafult LED Pin. Also adds note
about the default LED based on version of board.
Includes the change that needs to be made to
the dts file for changing default LED pin
Signed-off-by: Suryansh Sharma <suryansh@evilscientist.cc>
efm32pg_stk3402a and lpcxpresso54114_m0 board yaml files didn't set
xtools under the toolchain category, fix that.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can turn this off in application code, but the default should be
SMP.
Oddball note: the SMP setting is in the soc layer and not arch, even
though I think it would be better there. We don't actually have a
per-arch defconfig file included by kconfig.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 to nucleo_l053r8_defconfig.
All STM32 boards seem to have this defined.
Makes samples with ksleep work properly.
Signed-off-by: Anthony Kreft <anthony.kreft@gmail.com>
Since NET_L2_BT no longer "select"s BT and the rest of required BT
features, enable them within the defconfig file.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Configure lvgl defaults for imx rt boards in their respective board
defconfigs rather than the lvgl sample application.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This build target is intended to verify that enabling the
IAMCU ABI doesn't have any bit-rot since we can easily
run this under emulation.
However, the QEMU boards all derive from the generic IA32
SOC definition, which is any pc-like hardware. We need
to disable these mitigations for this target since the
IAMCU compiler doesn't even recognize instructions like
'lfence'.
Fixes: #14315
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Redefining the config will not let another (out-of-source) driver be
chosen instead of the default. The driver is practically forced by the
soc settings. This commit moves default settings from soc/arm/nordic_nrf
into the drivers themselves.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
Fedora 29 (and possibly other disctributions) are nowadays coming with
very recent versions of gcc (8.x) and binutils. These will cause some
compilation error when running the 'grub_build.sh' script to create a
GRUB2 boot loader image.
Fortunately, both issues have been fixed and merged in the upstream
project. This patch modifies the build script to cherry-pick those to
the local cloned version of grub before building it.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Now that we have SDK 0.10.0 we can enable building this board with the
Zephyr toolchain. SDK 0.10.0 introduced support for the ARM v8m based
cores which these boards utilize.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update reserved function names starting with one underscore, replacing
them as follows:
'_k_' with 'z_'
'_K_' with 'Z_'
'_handler_' with 'z_handl_'
'_Cstart' with 'z_cstart'
'_Swap' with 'z_swap'
This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.
Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.
Various generator scripts have also been updated as well as perf,
linker and usb files. These are
drivers/serial/uart_handlers.c
include/linker/kobject-text.ld
kernel/include/syscall_handler.h
scripts/gen_kobject_list.py
scripts/gen_syscall_header.py
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
Appears within an 'if BOARD_NRF52_BSIM' in the same file.
'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. Dependencies on menus work similarly. There are no
"conditional includes" in Kconfig, so 'if FOO' has no special meaning
around a source. Conditional includes wouldn't be possible, because an
if condition could include (directly or indirectly) forward references
to symbols not defined yet.
Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Appears within an 'if BOARD_NATIVE_POSIX' in the same file.
'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. Dependencies on menus work similarly. There are no
"conditional includes" in Kconfig, so 'if FOO' has no special meaning
around a source. Conditional includes wouldn't be possible, because an
if condition could include (directly or indirectly) forward references
to symbols not defined yet.
Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
A new role :zephyr_file: is available that renders to a link to the file
or folder in GitHub. Find appropriate references using :file: and
convert to :zephyr_file: to take advantage of its linking capability.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The nRF52840-based Particle.io boards have an external flash
module that is connected via SPI interface. Originally,
the goal was to place the flash part into deep power down
mode and save 9 uA in sleep mode, but this was never
implemented in a board initialization file.
Let's remove the default y behavior for SPI as each sample
will turn it on if needed, and it can cause certain out of
tree samples to behave badly (where CONFIG_MULTITHREADING=n).
Long term: we need a better solution for handling samples
that don't fit the requirements for certain drivers, but
for now this will clean up some board usability issues.
Signed-off-by: Michael Scott <mike@foundries.io>
Most of these are from source'ing a file within an 'if PINMUX', and then
adding another 'depends on PINMUX' within it.
'if FOO' is just shorthand for adding 'depends on FOO' to each item
within the 'if'. There are no "conditional includes" in Kconfig, so
'if FOO' has no special meaning around a 'source'. Conditional includes
wouldn't be possible, because an 'if' condition could include (directly
or indirectly) forward references to symbols not defined yet.
Tip: When adding a symbol, check its dependencies in the menuconfig
('ninja menuconfig', then / to jump to the symbol). The menuconfig also
shows how the file with the symbol got included, so if you see
duplicated dependencies, it's easy to hunt down where they come from.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
JLink V6.44 (2019-03-01) added support for the imx rt1064 soc, including
programming the internal flash on flexspi2. Updates the mimxrt1064_evk
board to use the internal flash and external sdram memories by default,
now that the debug tools support them.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Do not enable by default both I2C and SPI nodes for the peripherals
with the same instance number, since they use the same MMIO base
address and DTC will issue a warning in such situation.
This patch corrects dts files for the following boards:
- nrf51_pca10028
- nrf52_pca10040
- nrf52840_blip
- nrf52840_pca10056
- nrf52840_pca10059
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
SPI_0 cannot be used simultaneously with I2C_0, since in nRF52832 SoC
these instances share certain hardware resources.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
To build apps for mcuboot, a zephyr,code-partition needs to be
identified in the DTS chosen block. Without this entry, the
following configs will always be 0:
CONFIG_FLASH_LOAD_OFFSET
CONFIG_FLASH_LOAD_SIZE
Signed-off-by: Michael Scott <mike@foundries.io>
According with MISRA-C every switch-clause must terminate with an
unconditional break.
MISRA-C rules 16.1 and 16.3
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Reduce unnecessarily large images of boards (> 1MB)
Also fixed typo in doc title for mec2016evb_assy6797
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The creation of the udev rule requires the user to be root else
it will fail. Update the text of the documentation to make it clearer
and change the shell prompt of the command to '#'
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Added an assert in the logger thread in case there
is no backends, instead of having that thread spinning
forever. Disabled log in qemu_xtensa board due to lack
of backends.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
UART_QMSI_0_BAUDRATE was removed by commit 17c6456678 ("drivers/uart:
Use dts to set uart priorities for QMSI driver").
There's a reference to CONFIG_UART_QMSI_1_BAUDRATE as well, but getting
rid of it requires documentation updates.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
We expect that identifier in yaml will match board name for sanitycheck.
Change the identifier to match so sanitycheck runs propertly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The MMIO addresses for peripherals are being assigned by BIOS
at boot. Different BIOS versions and number of enabled peripherals
affect how those addresses are assigned. This invalidates
the addresses for UART defined in DTS. Turn on PCI enumeration
so UART addresses are probed at boot to avoid non-usable
UART and black console.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.
Fix#13753
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On nrf52810_pca10040 board, the nRF52810 SoC is emulated on nRF52832.
This patch overrides for this board the number of cycles consumed by
one iteration of the internal loop in `nrfx_coredep_delay_us()` (used
by `k_busy_wait()`), so that the value adequate for nRF52832 is used.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In the recent MDK brought by nrfx 1.6.2, these legacy peripherals have
been revealed as available also in nRF52810. This patch allows their
use in Zephyr drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The i.MX RT1064 evk has one ethernet (10/100M) connector via KSZ8081RNB
phy. Enable related dts nodes and config flags
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The command to create the board image binary file assumes the input
is always called zephyr.bin. This is not always the case if custom
name is defined in CONFIG_KERNEL_BIN_NAME. So update the call of
command to use CONFIG_KERNEL_BIN_NAME.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Recent versions of GCC won't build grub-2.02 because they're more
pedantic about warnings. This has been fixed upstream but is not
yet part of any release. The build script is modified to apply the
relevant commits before building.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This fix allows Renode to resemble the time flow of the hardware more
precisely. The performance value was established manually, there is no
indication in the docs on what is the average performance.
It allows tests/posix/common/portability.posix to pass, but fails on
tests/kernel/lifo/lifo_usage/kernel.lifo.usage.
The latter also fails on hardware.
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
This commit adds a patch in the Kconfig.defconfig file of
nRF9160_pca10090 board, that instructs the linker to restrict
the Secure image to the size of its code partition, if the
image is to be combined with a Non-Secure image. Secure images
without accompanying Non-Secure firmware (i.e. with symbol
TRUSTED_EXECUTION_SECURE not set) can use the entire flash.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We do not need to overwrite the reg property of flash0
in nrf9160_pca10090 default partitioning. The property
reflects the flash resources of the SOC, and is passed
in the .dtsi file of nRF9160 SOC definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Most of the other nRF52832 boards have the following settings for
scratch and storage partitions:
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x00070000 0xa000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x0007a000 0x00006000>;
};
Let's adjust the scratch size to align with the others and add the
storage partition so that settings and FS samples will work.
Signed-off-by: Michael Scott <mike@foundries.io>
The MPU should have been enabled on all these boards since they have
Cortex-M7 and need mpu for caching support.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Most of the other nRF52832 boards have the following settings for
scratch and storage partitions:
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x00070000 0xa000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x0007a000 0x00006000>;
};
Let's remove the snowflake settings in BLENano2 which coincidentally
are incorrect: storage overruns the flash area by 0x1000 and causes
a crash when enabling FCB storage.
Signed-off-by: Michael Scott <mike@foundries.io>
Remove most unnecessary instances of `export` and `cmake` use that can
instead be replaced with `zephyr-app-commands` or similar. This is to
avoid documentation using different mechanisms to describe the same
actions and in preparation for documenting `west build` everywhere.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Remove DCACHE_WRITEBACK Kconfig variable definition in Intel S1000
DMA driver. Remove the variable from default configuration as well.
Cache configuration is fixed and the cache operation routines
internally take appropriate action based on the cache configuration.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Added more detailed information how to connect Zephyr instance
to host system like Linux desktop.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The mimxrt1060_evk was missing hwinfo in the supported list. All other
imx rt boards already have it.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Fixes Segger RTT on the hexiwear_kw40z and usb_kw24d512 boards by
setting CONFIG_RTT_CONSOLE=y and CONFIG_USE_SEGGER_RTT=y.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Comment for storage partition could be misleading.
Clarify this is a partition used for file system.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix setting of the I2C bus master device name for the GPIO_PCAL9535A
device and PWM_PCA9685. We need to extract them from the dts otherwise
they will just get set to "".
Fixes#13458
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.
The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enable pull-up on UART RX pin to reduce power consumption.
If the board is powered by battery and the debugger is
not connected via USB to the host, the SoC consumes up
to 2mA more than expected.
The consumption increases because RX pin is floating
(High-Impedance state of pin B from Dual-Supply Bus Transceiver).
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
There are issues using lowercase min and max macros when compiling a C++
application with a third-party toolchain such as GNU ARM Embedded when
using some STL headers i.e. <chrono>.
This is because there are actual C++ functions called min and max
defined in some of the STL headers and these macros interfere with them.
By changing the macros to UPPERCASE, which is consistent with almost all
other pre-processor macros this naming conflict is avoided.
All files that use these macros have been updated.
Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
This is a follow-up to commit e2b38e02bf.
Default PWM instances are enabled in Kconfig and DTS (with channel 0
set to LED0 pin) for these boards so that it is possible to build basic
samples blink_led and fade_led for them without extra modifications.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
For the native_posix board, and for the nrf52_bsim boards,
the sys_trace_irs_exit() call was missing. Add it.
Relates to #13357
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Following introduction of zephyr sdk0.10 and openocd branch
from from 20190130, stm32l4+ SoC support is now available and
flash and debug operations are available on nucleo_l4r5zi board.
Fixes 12094
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:
warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.
The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add nvs support to nucleo_f091rc board. This requires to
add erase-block-size property to stm32f0.dtsi.
Storage partition is set to 4kb at the end of the flash.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The ICCM/DCCM defines come from DT so they should be DT_ prefixed and
not CONFIG_ prefixed. Fix that in arc_mpu_regions.c.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a space in some long doc titles to allow for wrapping in the title
display. Also fixed a table in the mec2016evb board doc.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Print just the basename of the Input and Output filenames
when creating the board specific image for Intel S1000 CRB
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Be consistent in how board docs are named and move all to index.rst.
This will make the URL to the board documentation predictable and easier
to remember.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The phrase "Zephyr applications use the ..." in many boards and
inconsistently. This is just to say what is the board identify is.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
